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WSL2-Linux-Kernel
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WSL2-Linux-Kernel/include/linux/mtd/nand-ecc-mxic.h

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mtd: nand: mxic-ecc: Support SPI pipelined mode Introduce the support for another possible configuration: the ECC engine may work as DMA master (pipelined) and move itself the data to/from the NAND chip into the buffer, applying the necessary corrections/computations on the fly. This driver offers an ECC engine implementation that must be instatiated from a SPI controller driver. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20211216111654.238086-17-miquel.raynal@bootlin.com
2021-12-16 14:16:42 +03:00
/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright © 2019 Macronix
* Author: Miquèl Raynal <miquel.raynal@bootlin.com>
*
* Header for the Macronix external ECC engine.
*/
#ifndef __MTD_NAND_ECC_MXIC_H__
#define __MTD_NAND_ECC_MXIC_H__
#include <linux/platform_device.h>
#include <linux/device.h>
struct mxic_ecc_engine;
spi: mxic: Add support for pipelined ECC operations Some SPI-NAND chips do not have a proper on-die ECC engine providing error correction/detection. This is particularly an issue on embedded devices with limited resources because all the computations must happen in software, unless an external hardware engine is provided. These external engines are new and can be of two categories: external or pipelined. Macronix is providing both, the former being already supported. The second, however, is very SoC implementation dependent and must be instantiated by the SPI host controller directly. An entire subsystem has been contributed to support these engines which makes the insertion into another subsystem such as SPI quite straightforward without the need for a lot of specific functions. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Reviewed-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/linux-mtd/20220202144536.393792-1-miquel.raynal@bootlin.com
2022-02-02 17:45:36 +03:00
#if IS_ENABLED(CONFIG_MTD_NAND_ECC_MXIC) && IS_REACHABLE(CONFIG_MTD_NAND_CORE)
mtd: nand: mxic-ecc: Support SPI pipelined mode Introduce the support for another possible configuration: the ECC engine may work as DMA master (pipelined) and move itself the data to/from the NAND chip into the buffer, applying the necessary corrections/computations on the fly. This driver offers an ECC engine implementation that must be instatiated from a SPI controller driver. Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20211216111654.238086-17-miquel.raynal@bootlin.com
2021-12-16 14:16:42 +03:00
struct nand_ecc_engine_ops *mxic_ecc_get_pipelined_ops(void);
struct nand_ecc_engine *mxic_ecc_get_pipelined_engine(struct platform_device *spi_pdev);
void mxic_ecc_put_pipelined_engine(struct nand_ecc_engine *eng);
int mxic_ecc_process_data_pipelined(struct nand_ecc_engine *eng,
unsigned int direction, dma_addr_t dirmap);
#else /* !CONFIG_MTD_NAND_ECC_MXIC */
static inline struct nand_ecc_engine_ops *mxic_ecc_get_pipelined_ops(void)
{
return NULL;
}
static inline struct nand_ecc_engine *
mxic_ecc_get_pipelined_engine(struct platform_device *spi_pdev)
{
return ERR_PTR(-EOPNOTSUPP);
}
static inline void mxic_ecc_put_pipelined_engine(struct nand_ecc_engine *eng) {}
static inline int mxic_ecc_process_data_pipelined(struct nand_ecc_engine *eng,
unsigned int direction,
dma_addr_t dirmap)
{
return -EOPNOTSUPP;
}
#endif /* CONFIG_MTD_NAND_ECC_MXIC */
#endif /* __MTD_NAND_ECC_MXIC_H__ */