2019-06-04 11:11:33 +03:00
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/* SPDX-License-Identifier: GPL-2.0-only */
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2016-07-11 13:48:49 +03:00
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/*
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* LED driver for TI lp3952 controller
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*
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* Copyright (C) 2016, DAQRI, LLC.
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* Author: Tony Makkiel <tony.makkiel@daqri.com>
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*/
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#ifndef LEDS_LP3952_H_
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#define LEDS_LP3952_H_
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#define LP3952_NAME "lp3952"
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#define LP3952_CMD_REG_COUNT 8
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#define LP3952_BRIGHT_MAX 4
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#define LP3952_LABEL_MAX_LEN 15
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#define LP3952_REG_LED_CTRL 0x00
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#define LP3952_REG_R1_BLNK_TIME_CTRL 0x01
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#define LP3952_REG_R1_BLNK_CYCLE_CTRL 0x02
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#define LP3952_REG_G1_BLNK_TIME_CTRL 0x03
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#define LP3952_REG_G1_BLNK_CYCLE_CTRL 0x04
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#define LP3952_REG_B1_BLNK_TIME_CTRL 0x05
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#define LP3952_REG_B1_BLNK_CYCLE_CTRL 0x06
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#define LP3952_REG_ENABLES 0x0B
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#define LP3952_REG_PAT_GEN_CTRL 0x11
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#define LP3952_REG_RGB1_MAX_I_CTRL 0x12
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#define LP3952_REG_RGB2_MAX_I_CTRL 0x13
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#define LP3952_REG_CMD_0 0x50
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#define LP3952_REG_RESET 0x60
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#define REG_MAX LP3952_REG_RESET
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#define LP3952_PATRN_LOOP BIT(1)
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#define LP3952_PATRN_GEN_EN BIT(2)
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#define LP3952_INT_B00ST_LDR BIT(2)
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#define LP3952_ACTIVE_MODE BIT(6)
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#define LP3952_LED_MASK_ALL 0x3f
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/* Transition Time in ms */
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enum lp3952_tt {
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TT0,
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TT55,
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TT110,
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TT221,
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TT422,
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TT885,
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TT1770,
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TT3539
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};
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/* Command Execution Time in ms */
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enum lp3952_cet {
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CET197,
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CET393,
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CET590,
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CET786,
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CET1180,
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CET1376,
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CET1573,
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CET1769,
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CET1966,
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CET2163,
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CET2359,
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CET2556,
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CET2763,
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CET2949,
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CET3146
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};
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/* Max Current in % */
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enum lp3952_colour_I_log_0 {
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I0,
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I7,
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I14,
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I21,
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I32,
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I46,
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I71,
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I100
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};
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enum lp3952_leds {
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LP3952_BLUE_2,
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LP3952_GREEN_2,
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LP3952_RED_2,
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LP3952_BLUE_1,
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LP3952_GREEN_1,
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LP3952_RED_1,
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LP3952_LED_ALL
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};
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struct lp3952_ctrl_hdl {
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struct led_classdev cdev;
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char name[LP3952_LABEL_MAX_LEN];
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enum lp3952_leds channel;
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void *priv;
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};
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struct ptrn_gen_cmd {
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union {
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struct {
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u16 tt:3;
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u16 b:3;
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u16 cet:4;
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u16 g:3;
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u16 r:3;
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};
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struct {
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u8 lsb;
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u8 msb;
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} bytes;
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};
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} __packed;
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struct lp3952_led_array {
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struct regmap *regmap;
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struct i2c_client *client;
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struct gpio_desc *enable_gpio;
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struct lp3952_ctrl_hdl leds[LP3952_LED_ALL];
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};
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#endif /* LEDS_LP3952_H_ */
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