2013-11-06 17:57:36 +04:00
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/*
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* Generic barrier definitions, originally based on MN10300 definitions.
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2012-03-28 21:30:03 +04:00
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*
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* It should be possible to use these on really simple architectures,
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* but it serves more as a starting point for new ports.
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*
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* Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
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* Written by David Howells (dhowells@redhat.com)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public Licence
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* as published by the Free Software Foundation; either version
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* 2 of the Licence, or (at your option) any later version.
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*/
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#ifndef __ASM_GENERIC_BARRIER_H
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#define __ASM_GENERIC_BARRIER_H
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#ifndef __ASSEMBLY__
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2013-11-06 17:57:36 +04:00
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#include <linux/compiler.h>
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#ifndef nop
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#define nop() asm volatile ("nop")
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#endif
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2012-03-28 21:30:03 +04:00
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/*
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2013-11-06 17:57:36 +04:00
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* Force strict CPU ordering. And yes, this is required on UP too when we're
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* talking to devices.
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2012-03-28 21:30:03 +04:00
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*
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2013-11-06 17:57:36 +04:00
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* Fall back to compiler barriers if nothing better is provided.
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2012-03-28 21:30:03 +04:00
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*/
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2013-11-06 17:57:36 +04:00
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#ifndef mb
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#define mb() barrier()
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#endif
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#ifndef rmb
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2012-03-28 21:30:03 +04:00
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#define rmb() mb()
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2013-11-06 17:57:36 +04:00
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#endif
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#ifndef wmb
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#define wmb() mb()
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#endif
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2014-12-12 02:02:06 +03:00
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#ifndef dma_rmb
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#define dma_rmb() rmb()
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#endif
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#ifndef dma_wmb
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#define dma_wmb() wmb()
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#endif
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2013-11-06 17:57:36 +04:00
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#ifndef read_barrier_depends
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#define read_barrier_depends() do { } while (0)
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#endif
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2012-03-28 21:30:03 +04:00
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2015-12-27 14:50:07 +03:00
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#ifndef __smp_mb
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#define __smp_mb() mb()
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#endif
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#ifndef __smp_rmb
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#define __smp_rmb() rmb()
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#endif
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#ifndef __smp_wmb
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#define __smp_wmb() wmb()
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#endif
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#ifndef __smp_read_barrier_depends
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#define __smp_read_barrier_depends() read_barrier_depends()
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#endif
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2012-03-28 21:30:03 +04:00
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#ifdef CONFIG_SMP
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2015-03-11 19:12:02 +03:00
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#ifndef smp_mb
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2015-12-27 14:50:07 +03:00
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#define smp_mb() __smp_mb()
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2015-03-11 19:12:02 +03:00
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#endif
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#ifndef smp_rmb
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2015-12-27 14:50:07 +03:00
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#define smp_rmb() __smp_rmb()
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2015-03-11 19:12:02 +03:00
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#endif
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#ifndef smp_wmb
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2015-12-27 14:50:07 +03:00
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#define smp_wmb() __smp_wmb()
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2015-03-11 19:12:02 +03:00
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#endif
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#ifndef smp_read_barrier_depends
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2015-12-27 14:50:07 +03:00
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#define smp_read_barrier_depends() __smp_read_barrier_depends()
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2015-03-11 19:12:02 +03:00
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#endif
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2015-07-01 19:24:26 +03:00
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#else /* !CONFIG_SMP */
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2015-03-11 19:12:02 +03:00
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#ifndef smp_mb
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2012-03-28 21:30:03 +04:00
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#define smp_mb() barrier()
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2015-03-11 19:12:02 +03:00
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#endif
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#ifndef smp_rmb
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2012-03-28 21:30:03 +04:00
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#define smp_rmb() barrier()
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2015-03-11 19:12:02 +03:00
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#endif
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#ifndef smp_wmb
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2012-03-28 21:30:03 +04:00
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#define smp_wmb() barrier()
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2015-03-11 19:12:02 +03:00
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#endif
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#ifndef smp_read_barrier_depends
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2013-11-06 17:57:36 +04:00
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#define smp_read_barrier_depends() do { } while (0)
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2012-03-28 21:30:03 +04:00
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#endif
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2015-07-01 19:24:26 +03:00
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#endif /* CONFIG_SMP */
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2015-03-11 19:12:02 +03:00
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2015-12-27 14:50:07 +03:00
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#ifndef __smp_store_mb
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#define __smp_store_mb(var, value) do { WRITE_ONCE(var, value); __smp_mb(); } while (0)
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#endif
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#ifndef __smp_mb__before_atomic
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#define __smp_mb__before_atomic() __smp_mb()
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#endif
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#ifndef __smp_mb__after_atomic
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#define __smp_mb__after_atomic() __smp_mb()
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#endif
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#ifndef __smp_store_release
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#define __smp_store_release(p, v) \
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do { \
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compiletime_assert_atomic_type(*p); \
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__smp_mb(); \
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WRITE_ONCE(*p, v); \
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} while (0)
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#endif
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#ifndef __smp_load_acquire
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#define __smp_load_acquire(p) \
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({ \
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typeof(*p) ___p1 = READ_ONCE(*p); \
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compiletime_assert_atomic_type(*p); \
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__smp_mb(); \
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___p1; \
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})
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#endif
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#ifdef CONFIG_SMP
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#ifndef smp_store_mb
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#define smp_store_mb(var, value) __smp_store_mb(var, value)
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#endif
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#ifndef smp_mb__before_atomic
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#define smp_mb__before_atomic() __smp_mb__before_atomic()
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#endif
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#ifndef smp_mb__after_atomic
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#define smp_mb__after_atomic() __smp_mb__after_atomic()
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#endif
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#ifndef smp_store_release
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#define smp_store_release(p, v) __smp_store_release(p, v)
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#endif
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#ifndef smp_load_acquire
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#define smp_load_acquire(p) __smp_load_acquire(p)
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#endif
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#else /* !CONFIG_SMP */
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2015-05-12 11:51:55 +03:00
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#ifndef smp_store_mb
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2015-12-27 14:50:07 +03:00
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#define smp_store_mb(var, value) do { WRITE_ONCE(var, value); barrier(); } while (0)
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2013-11-06 17:57:36 +04:00
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#endif
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2012-03-28 21:30:03 +04:00
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arch: Prepare for smp_mb__{before,after}_atomic()
Since the smp_mb__{before,after}*() ops are fundamentally dependent on
how an arch can implement atomics it doesn't make sense to have 3
variants of them. They must all be the same.
Furthermore, the 3 variants suggest they're only valid for those 3
atomic ops, while we have many more where they could be applied.
So move away from
smp_mb__{before,after}_{atomic,clear}_{dec,inc,bit}() and reduce the
interface to just the two: smp_mb__{before,after}_atomic().
This patch prepares the way by introducing default implementations in
asm-generic/barrier.h that default to a full barrier and providing
__deprecated inlines for the previous 6 barriers if they're not
provided by the arch.
This should allow for a mostly painless transition (lots of deprecated
warns in the interim).
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Acked-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Link: http://lkml.kernel.org/n/tip-wr59327qdyi9mbzn6x937s4e@git.kernel.org
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: "Chen, Gong" <gong.chen@linux.intel.com>
Cc: John Sullivan <jsrhbz@kanargh.force9.co.uk>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Mauro Carvalho Chehab <m.chehab@samsung.com>
Cc: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Cc: "Theodore Ts'o" <tytso@mit.edu>
Cc: linux-arch@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2014-02-06 21:16:07 +04:00
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#ifndef smp_mb__before_atomic
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2015-12-27 14:50:07 +03:00
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#define smp_mb__before_atomic() barrier()
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arch: Prepare for smp_mb__{before,after}_atomic()
Since the smp_mb__{before,after}*() ops are fundamentally dependent on
how an arch can implement atomics it doesn't make sense to have 3
variants of them. They must all be the same.
Furthermore, the 3 variants suggest they're only valid for those 3
atomic ops, while we have many more where they could be applied.
So move away from
smp_mb__{before,after}_{atomic,clear}_{dec,inc,bit}() and reduce the
interface to just the two: smp_mb__{before,after}_atomic().
This patch prepares the way by introducing default implementations in
asm-generic/barrier.h that default to a full barrier and providing
__deprecated inlines for the previous 6 barriers if they're not
provided by the arch.
This should allow for a mostly painless transition (lots of deprecated
warns in the interim).
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Acked-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Link: http://lkml.kernel.org/n/tip-wr59327qdyi9mbzn6x937s4e@git.kernel.org
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: "Chen, Gong" <gong.chen@linux.intel.com>
Cc: John Sullivan <jsrhbz@kanargh.force9.co.uk>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Mauro Carvalho Chehab <m.chehab@samsung.com>
Cc: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Cc: "Theodore Ts'o" <tytso@mit.edu>
Cc: linux-arch@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2014-02-06 21:16:07 +04:00
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#endif
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#ifndef smp_mb__after_atomic
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2015-12-27 14:50:07 +03:00
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#define smp_mb__after_atomic() barrier()
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arch: Prepare for smp_mb__{before,after}_atomic()
Since the smp_mb__{before,after}*() ops are fundamentally dependent on
how an arch can implement atomics it doesn't make sense to have 3
variants of them. They must all be the same.
Furthermore, the 3 variants suggest they're only valid for those 3
atomic ops, while we have many more where they could be applied.
So move away from
smp_mb__{before,after}_{atomic,clear}_{dec,inc,bit}() and reduce the
interface to just the two: smp_mb__{before,after}_atomic().
This patch prepares the way by introducing default implementations in
asm-generic/barrier.h that default to a full barrier and providing
__deprecated inlines for the previous 6 barriers if they're not
provided by the arch.
This should allow for a mostly painless transition (lots of deprecated
warns in the interim).
Signed-off-by: Peter Zijlstra <peterz@infradead.org>
Acked-by: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Link: http://lkml.kernel.org/n/tip-wr59327qdyi9mbzn6x937s4e@git.kernel.org
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: "Chen, Gong" <gong.chen@linux.intel.com>
Cc: John Sullivan <jsrhbz@kanargh.force9.co.uk>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Mauro Carvalho Chehab <m.chehab@samsung.com>
Cc: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>
Cc: "Theodore Ts'o" <tytso@mit.edu>
Cc: linux-arch@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2014-02-06 21:16:07 +04:00
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#endif
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2015-12-27 15:10:52 +03:00
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#ifndef smp_store_release
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2013-11-06 17:57:36 +04:00
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#define smp_store_release(p, v) \
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do { \
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compiletime_assert_atomic_type(*p); \
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2015-12-27 14:50:07 +03:00
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barrier(); \
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locking, arch: use WRITE_ONCE()/READ_ONCE() in smp_store_release()/smp_load_acquire()
Replace ACCESS_ONCE() macro in smp_store_release() and smp_load_acquire()
with WRITE_ONCE() and READ_ONCE() on x86, arm, arm64, ia64, metag, mips,
powerpc, s390, sparc and asm-generic since ACCESS_ONCE() does not work
reliably on non-scalar types.
WRITE_ONCE() and READ_ONCE() were introduced in the following commits:
230fa253df63 ("kernel: Provide READ_ONCE and ASSIGN_ONCE")
43239cbe79fc ("kernel: Change ASSIGN_ONCE(val, x) to WRITE_ONCE(x, val)")
Signed-off-by: Andrey Konovalov <andreyknvl@google.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Davidlohr Bueso <dbueso@suse.de>
Acked-by: Michael Ellerman <mpe@ellerman.id.au> (powerpc)
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Cc: Alexander Duyck <alexander.h.duyck@redhat.com>
Cc: Andre Przywara <andre.przywara@arm.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Borislav Petkov <bp@suse.de>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Christian Borntraeger <borntraeger@de.ibm.com>
Cc: David S. Miller <davem@davemloft.net>
Cc: Davidlohr Bueso <dave@stgolabs.net>
Cc: Dmitry Vyukov <dvyukov@google.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: linux-arch@vger.kernel.org
Link: http://lkml.kernel.org/r/1438528264-714-1-git-send-email-andreyknvl@google.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-08-02 18:11:04 +03:00
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WRITE_ONCE(*p, v); \
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2013-11-06 17:57:36 +04:00
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} while (0)
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2015-12-27 15:10:52 +03:00
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#endif
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2013-11-06 17:57:36 +04:00
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2015-12-27 15:10:52 +03:00
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#ifndef smp_load_acquire
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2013-11-06 17:57:36 +04:00
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#define smp_load_acquire(p) \
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({ \
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locking, arch: use WRITE_ONCE()/READ_ONCE() in smp_store_release()/smp_load_acquire()
Replace ACCESS_ONCE() macro in smp_store_release() and smp_load_acquire()
with WRITE_ONCE() and READ_ONCE() on x86, arm, arm64, ia64, metag, mips,
powerpc, s390, sparc and asm-generic since ACCESS_ONCE() does not work
reliably on non-scalar types.
WRITE_ONCE() and READ_ONCE() were introduced in the following commits:
230fa253df63 ("kernel: Provide READ_ONCE and ASSIGN_ONCE")
43239cbe79fc ("kernel: Change ASSIGN_ONCE(val, x) to WRITE_ONCE(x, val)")
Signed-off-by: Andrey Konovalov <andreyknvl@google.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Acked-by: Davidlohr Bueso <dbueso@suse.de>
Acked-by: Michael Ellerman <mpe@ellerman.id.au> (powerpc)
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Cc: Alexander Duyck <alexander.h.duyck@redhat.com>
Cc: Andre Przywara <andre.przywara@arm.com>
Cc: Arnd Bergmann <arnd@arndb.de>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Borislav Petkov <bp@suse.de>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Christian Borntraeger <borntraeger@de.ibm.com>
Cc: David S. Miller <davem@davemloft.net>
Cc: Davidlohr Bueso <dave@stgolabs.net>
Cc: Dmitry Vyukov <dvyukov@google.com>
Cc: Fenghua Yu <fenghua.yu@intel.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Heiko Carstens <heiko.carstens@de.ibm.com>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Martin Schwidefsky <schwidefsky@de.ibm.com>
Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com>
Cc: Paul Mackerras <paulus@samba.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Russell King <linux@arm.linux.org.uk>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Tony Luck <tony.luck@intel.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: linux-arch@vger.kernel.org
Link: http://lkml.kernel.org/r/1438528264-714-1-git-send-email-andreyknvl@google.com
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2015-08-02 18:11:04 +03:00
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typeof(*p) ___p1 = READ_ONCE(*p); \
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2013-11-06 17:57:36 +04:00
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compiletime_assert_atomic_type(*p); \
|
2015-12-27 14:50:07 +03:00
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|
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barrier(); \
|
2013-11-06 17:57:36 +04:00
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|
|
___p1; \
|
|
|
|
})
|
2015-12-27 15:10:52 +03:00
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|
|
#endif
|
2013-11-06 17:57:36 +04:00
|
|
|
|
2016-05-26 11:35:03 +03:00
|
|
|
#endif /* CONFIG_SMP */
|
2015-12-27 14:50:07 +03:00
|
|
|
|
2015-12-27 19:23:01 +03:00
|
|
|
/* Barriers for virtual machine guests when talking to an SMP host */
|
|
|
|
#define virt_mb() __smp_mb()
|
|
|
|
#define virt_rmb() __smp_rmb()
|
|
|
|
#define virt_wmb() __smp_wmb()
|
|
|
|
#define virt_read_barrier_depends() __smp_read_barrier_depends()
|
|
|
|
#define virt_store_mb(var, value) __smp_store_mb(var, value)
|
|
|
|
#define virt_mb__before_atomic() __smp_mb__before_atomic()
|
|
|
|
#define virt_mb__after_atomic() __smp_mb__after_atomic()
|
|
|
|
#define virt_store_release(p, v) __smp_store_release(p, v)
|
|
|
|
#define virt_load_acquire(p) __smp_load_acquire(p)
|
|
|
|
|
2016-06-01 20:23:54 +03:00
|
|
|
/**
|
|
|
|
* smp_acquire__after_ctrl_dep() - Provide ACQUIRE ordering after a control dependency
|
|
|
|
*
|
|
|
|
* A control dependency provides a LOAD->STORE order, the additional RMB
|
|
|
|
* provides LOAD->LOAD order, together they provide LOAD->{LOAD,STORE} order,
|
|
|
|
* aka. (load)-ACQUIRE.
|
|
|
|
*
|
|
|
|
* Architectures that do not do load speculation can have this be barrier().
|
|
|
|
*/
|
|
|
|
#ifndef smp_acquire__after_ctrl_dep
|
|
|
|
#define smp_acquire__after_ctrl_dep() smp_rmb()
|
|
|
|
#endif
|
|
|
|
|
|
|
|
/**
|
|
|
|
* smp_cond_load_acquire() - (Spin) wait for cond with ACQUIRE ordering
|
|
|
|
* @ptr: pointer to the variable to wait on
|
|
|
|
* @cond: boolean expression to wait for
|
|
|
|
*
|
|
|
|
* Equivalent to using smp_load_acquire() on the condition variable but employs
|
|
|
|
* the control dependency of the wait to reduce the barrier on many platforms.
|
|
|
|
*
|
|
|
|
* Due to C lacking lambda expressions we load the value of *ptr into a
|
|
|
|
* pre-named variable @VAL to be used in @cond.
|
|
|
|
*/
|
|
|
|
#ifndef smp_cond_load_acquire
|
|
|
|
#define smp_cond_load_acquire(ptr, cond_expr) ({ \
|
|
|
|
typeof(ptr) __PTR = (ptr); \
|
|
|
|
typeof(*ptr) VAL; \
|
|
|
|
for (;;) { \
|
|
|
|
VAL = READ_ONCE(*__PTR); \
|
|
|
|
if (cond_expr) \
|
|
|
|
break; \
|
|
|
|
cpu_relax(); \
|
|
|
|
} \
|
|
|
|
smp_acquire__after_ctrl_dep(); \
|
|
|
|
VAL; \
|
|
|
|
})
|
|
|
|
#endif
|
|
|
|
|
2012-03-28 21:30:03 +04:00
|
|
|
#endif /* !__ASSEMBLY__ */
|
|
|
|
#endif /* __ASM_GENERIC_BARRIER_H */
|