2018-11-15 19:13:50 +03:00
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// SPDX-License-Identifier: GPL-2.0+
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//
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// AMD ALSA SoC PCM Driver
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//
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//Copyright 2016 Advanced Micro Devices, Inc.
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2018-11-12 08:34:55 +03:00
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#include <linux/platform_device.h>
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#include <linux/module.h>
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#include <linux/err.h>
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#include <linux/io.h>
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2018-11-12 08:35:00 +03:00
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#include <linux/pm_runtime.h>
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2018-11-12 08:34:55 +03:00
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include <sound/soc-dai.h>
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#include "acp3x.h"
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2020-05-18 07:39:05 +03:00
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#define DRV_NAME "acp3x_rv_i2s_dma"
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2018-11-12 08:34:55 +03:00
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2018-11-12 08:34:57 +03:00
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static const struct snd_pcm_hardware acp3x_pcm_hardware_playback = {
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.info = SNDRV_PCM_INFO_INTERLEAVED |
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SNDRV_PCM_INFO_BLOCK_TRANSFER |
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SNDRV_PCM_INFO_BATCH |
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2019-12-28 16:41:00 +03:00
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SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
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2018-11-12 08:34:57 +03:00
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SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME,
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.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 |
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SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S24_LE |
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SNDRV_PCM_FMTBIT_S32_LE,
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.channels_min = 2,
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.channels_max = 8,
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.rates = SNDRV_PCM_RATE_8000_96000,
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.rate_min = 8000,
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.rate_max = 96000,
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.buffer_bytes_max = PLAYBACK_MAX_NUM_PERIODS * PLAYBACK_MAX_PERIOD_SIZE,
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.period_bytes_min = PLAYBACK_MIN_PERIOD_SIZE,
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.period_bytes_max = PLAYBACK_MAX_PERIOD_SIZE,
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.periods_min = PLAYBACK_MIN_NUM_PERIODS,
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.periods_max = PLAYBACK_MAX_NUM_PERIODS,
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};
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static const struct snd_pcm_hardware acp3x_pcm_hardware_capture = {
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.info = SNDRV_PCM_INFO_INTERLEAVED |
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SNDRV_PCM_INFO_BLOCK_TRANSFER |
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SNDRV_PCM_INFO_BATCH |
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2019-12-28 16:41:00 +03:00
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SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
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SNDRV_PCM_INFO_PAUSE | SNDRV_PCM_INFO_RESUME,
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2018-11-12 08:34:57 +03:00
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.formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S8 |
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SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S24_LE |
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SNDRV_PCM_FMTBIT_S32_LE,
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.channels_min = 2,
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.channels_max = 2,
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.rates = SNDRV_PCM_RATE_8000_48000,
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.rate_min = 8000,
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.rate_max = 48000,
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.buffer_bytes_max = CAPTURE_MAX_NUM_PERIODS * CAPTURE_MAX_PERIOD_SIZE,
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.period_bytes_min = CAPTURE_MIN_PERIOD_SIZE,
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.period_bytes_max = CAPTURE_MAX_PERIOD_SIZE,
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.periods_min = CAPTURE_MIN_NUM_PERIODS,
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.periods_max = CAPTURE_MAX_NUM_PERIODS,
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};
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2018-11-12 08:34:56 +03:00
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static irqreturn_t i2s_irq_handler(int irq, void *dev_id)
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{
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2019-12-28 16:40:55 +03:00
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struct i2s_dev_data *rv_i2s_data;
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2018-11-12 08:34:56 +03:00
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u16 play_flag, cap_flag;
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u32 val;
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2019-12-28 16:40:55 +03:00
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rv_i2s_data = dev_id;
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2018-11-12 08:34:56 +03:00
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if (!rv_i2s_data)
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return IRQ_NONE;
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play_flag = 0;
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cap_flag = 0;
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val = rv_readl(rv_i2s_data->acp3x_base + mmACP_EXTERNAL_INTR_STAT);
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if ((val & BIT(BT_TX_THRESHOLD)) && rv_i2s_data->play_stream) {
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rv_writel(BIT(BT_TX_THRESHOLD), rv_i2s_data->acp3x_base +
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mmACP_EXTERNAL_INTR_STAT);
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snd_pcm_period_elapsed(rv_i2s_data->play_stream);
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play_flag = 1;
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}
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2019-12-28 16:40:58 +03:00
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if ((val & BIT(I2S_TX_THRESHOLD)) &&
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rv_i2s_data->i2ssp_play_stream) {
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rv_writel(BIT(I2S_TX_THRESHOLD),
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rv_i2s_data->acp3x_base + mmACP_EXTERNAL_INTR_STAT);
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snd_pcm_period_elapsed(rv_i2s_data->i2ssp_play_stream);
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play_flag = 1;
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}
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2018-11-12 08:34:56 +03:00
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if ((val & BIT(BT_RX_THRESHOLD)) && rv_i2s_data->capture_stream) {
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rv_writel(BIT(BT_RX_THRESHOLD), rv_i2s_data->acp3x_base +
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mmACP_EXTERNAL_INTR_STAT);
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snd_pcm_period_elapsed(rv_i2s_data->capture_stream);
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cap_flag = 1;
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}
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2019-12-28 16:40:58 +03:00
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if ((val & BIT(I2S_RX_THRESHOLD)) &&
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rv_i2s_data->i2ssp_capture_stream) {
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rv_writel(BIT(I2S_RX_THRESHOLD),
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rv_i2s_data->acp3x_base + mmACP_EXTERNAL_INTR_STAT);
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snd_pcm_period_elapsed(rv_i2s_data->i2ssp_capture_stream);
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cap_flag = 1;
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}
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2018-11-12 08:34:56 +03:00
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if (play_flag | cap_flag)
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return IRQ_HANDLED;
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else
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return IRQ_NONE;
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}
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2018-11-12 08:34:57 +03:00
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static void config_acp3x_dma(struct i2s_stream_instance *rtd, int direction)
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{
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u16 page_idx;
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2019-12-28 16:40:56 +03:00
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u32 low, high, val, acp_fifo_addr, reg_fifo_addr;
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2020-02-11 16:12:28 +03:00
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u32 reg_dma_size, reg_fifo_size;
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2019-12-28 16:40:56 +03:00
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dma_addr_t addr;
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2018-11-12 08:34:57 +03:00
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2019-12-28 16:40:56 +03:00
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addr = rtd->dma_addr;
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2018-11-12 08:34:57 +03:00
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2019-12-28 16:40:56 +03:00
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if (direction == SNDRV_PCM_STREAM_PLAYBACK) {
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switch (rtd->i2s_instance) {
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case I2S_BT_INSTANCE:
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val = ACP_SRAM_BT_PB_PTE_OFFSET;
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break;
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case I2S_SP_INSTANCE:
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default:
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val = ACP_SRAM_SP_PB_PTE_OFFSET;
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}
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} else {
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switch (rtd->i2s_instance) {
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case I2S_BT_INSTANCE:
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val = ACP_SRAM_BT_CP_PTE_OFFSET;
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break;
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case I2S_SP_INSTANCE:
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default:
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val = ACP_SRAM_SP_CP_PTE_OFFSET;
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}
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}
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2018-11-12 08:34:57 +03:00
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/* Group Enable */
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rv_writel(ACP_SRAM_PTE_OFFSET | BIT(31), rtd->acp3x_base +
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mmACPAXI2AXI_ATU_BASE_ADDR_GRP_1);
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rv_writel(PAGE_SIZE_4K_ENABLE, rtd->acp3x_base +
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mmACPAXI2AXI_ATU_PAGE_SIZE_GRP_1);
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for (page_idx = 0; page_idx < rtd->num_pages; page_idx++) {
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/* Load the low address of page int ACP SRAM through SRBM */
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low = lower_32_bits(addr);
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high = upper_32_bits(addr);
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rv_writel(low, rtd->acp3x_base + mmACP_SCRATCH_REG_0 + val);
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high |= BIT(31);
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rv_writel(high, rtd->acp3x_base + mmACP_SCRATCH_REG_0 + val
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+ 4);
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/* Move to next physically contiguos page */
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val += 8;
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2019-08-02 16:51:24 +03:00
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addr += PAGE_SIZE;
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2018-11-12 08:34:57 +03:00
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}
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if (direction == SNDRV_PCM_STREAM_PLAYBACK) {
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2019-12-28 16:40:56 +03:00
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switch (rtd->i2s_instance) {
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case I2S_BT_INSTANCE:
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reg_dma_size = mmACP_BT_TX_DMA_SIZE;
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acp_fifo_addr = ACP_SRAM_PTE_OFFSET +
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BT_PB_FIFO_ADDR_OFFSET;
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reg_fifo_addr = mmACP_BT_TX_FIFOADDR;
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reg_fifo_size = mmACP_BT_TX_FIFOSIZE;
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rv_writel(I2S_BT_TX_MEM_WINDOW_START,
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rtd->acp3x_base + mmACP_BT_TX_RINGBUFADDR);
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break;
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case I2S_SP_INSTANCE:
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default:
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reg_dma_size = mmACP_I2S_TX_DMA_SIZE;
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acp_fifo_addr = ACP_SRAM_PTE_OFFSET +
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SP_PB_FIFO_ADDR_OFFSET;
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reg_fifo_addr = mmACP_I2S_TX_FIFOADDR;
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reg_fifo_size = mmACP_I2S_TX_FIFOSIZE;
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rv_writel(I2S_SP_TX_MEM_WINDOW_START,
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rtd->acp3x_base + mmACP_I2S_TX_RINGBUFADDR);
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}
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2018-11-12 08:34:57 +03:00
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} else {
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2019-12-28 16:40:56 +03:00
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switch (rtd->i2s_instance) {
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case I2S_BT_INSTANCE:
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reg_dma_size = mmACP_BT_RX_DMA_SIZE;
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acp_fifo_addr = ACP_SRAM_PTE_OFFSET +
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BT_CAPT_FIFO_ADDR_OFFSET;
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reg_fifo_addr = mmACP_BT_RX_FIFOADDR;
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reg_fifo_size = mmACP_BT_RX_FIFOSIZE;
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rv_writel(I2S_BT_RX_MEM_WINDOW_START,
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rtd->acp3x_base + mmACP_BT_RX_RINGBUFADDR);
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break;
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2018-11-12 08:34:57 +03:00
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2019-12-28 16:40:56 +03:00
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case I2S_SP_INSTANCE:
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default:
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reg_dma_size = mmACP_I2S_RX_DMA_SIZE;
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acp_fifo_addr = ACP_SRAM_PTE_OFFSET +
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SP_CAPT_FIFO_ADDR_OFFSET;
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reg_fifo_addr = mmACP_I2S_RX_FIFOADDR;
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reg_fifo_size = mmACP_I2S_RX_FIFOSIZE;
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rv_writel(I2S_SP_RX_MEM_WINDOW_START,
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rtd->acp3x_base + mmACP_I2S_RX_RINGBUFADDR);
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}
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}
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rv_writel(DMA_SIZE, rtd->acp3x_base + reg_dma_size);
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rv_writel(acp_fifo_addr, rtd->acp3x_base + reg_fifo_addr);
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rv_writel(FIFO_SIZE, rtd->acp3x_base + reg_fifo_size);
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rv_writel(BIT(I2S_RX_THRESHOLD) | BIT(BT_RX_THRESHOLD)
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| BIT(I2S_TX_THRESHOLD) | BIT(BT_TX_THRESHOLD),
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rtd->acp3x_base + mmACP_EXTERNAL_INTR_CNTL);
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2018-11-12 08:34:57 +03:00
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}
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2019-10-02 08:31:53 +03:00
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static int acp3x_dma_open(struct snd_soc_component *component,
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struct snd_pcm_substream *substream)
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2018-11-12 08:34:57 +03:00
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{
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2019-12-28 16:40:55 +03:00
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struct snd_pcm_runtime *runtime;
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struct snd_soc_pcm_runtime *prtd;
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struct i2s_dev_data *adata;
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struct i2s_stream_instance *i2s_data;
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int ret;
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runtime = substream->runtime;
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prtd = substream->private_data;
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component = snd_soc_rtdcom_lookup(prtd, DRV_NAME);
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adata = dev_get_drvdata(component->dev);
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i2s_data = kzalloc(sizeof(*i2s_data), GFP_KERNEL);
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2018-11-12 08:34:57 +03:00
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if (!i2s_data)
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return -EINVAL;
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
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runtime->hw = acp3x_pcm_hardware_playback;
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else
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runtime->hw = acp3x_pcm_hardware_capture;
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ret = snd_pcm_hw_constraint_integer(runtime,
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SNDRV_PCM_HW_PARAM_PERIODS);
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if (ret < 0) {
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dev_err(component->dev, "set integer constraint failed\n");
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2018-11-15 00:31:48 +03:00
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kfree(i2s_data);
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2018-11-12 08:34:57 +03:00
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return ret;
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}
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2019-12-28 16:40:56 +03:00
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if (!adata->play_stream && !adata->capture_stream &&
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adata->i2ssp_play_stream && !adata->i2ssp_capture_stream)
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2018-11-12 08:34:57 +03:00
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rv_writel(1, adata->acp3x_base + mmACP_EXTERNAL_INTR_ENB);
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i2s_data->acp3x_base = adata->acp3x_base;
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runtime->private_data = i2s_data;
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2019-12-28 16:40:56 +03:00
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return ret;
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2018-11-12 08:34:57 +03:00
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}
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2019-05-10 04:41:07 +03:00
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2019-10-02 08:31:53 +03:00
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static int acp3x_dma_hw_params(struct snd_soc_component *component,
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struct snd_pcm_substream *substream,
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2018-11-12 08:34:57 +03:00
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struct snd_pcm_hw_params *params)
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{
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2019-12-28 16:40:56 +03:00
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struct i2s_stream_instance *rtd;
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struct snd_soc_pcm_runtime *prtd;
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struct snd_soc_card *card;
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struct acp3x_platform_info *pinfo;
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2020-05-06 13:26:00 +03:00
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struct i2s_dev_data *adata;
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2018-11-12 08:34:57 +03:00
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u64 size;
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2019-12-28 16:40:56 +03:00
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prtd = substream->private_data;
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card = prtd->card;
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pinfo = snd_soc_card_get_drvdata(card);
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2020-05-06 13:26:00 +03:00
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adata = dev_get_drvdata(component->dev);
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2019-12-28 16:40:56 +03:00
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rtd = substream->runtime->private_data;
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2018-11-12 08:34:57 +03:00
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if (!rtd)
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return -EINVAL;
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2020-05-06 13:26:00 +03:00
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if (pinfo) {
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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2019-12-28 16:40:56 +03:00
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rtd->i2s_instance = pinfo->play_i2s_instance;
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2020-05-06 13:26:00 +03:00
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switch (rtd->i2s_instance) {
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case I2S_BT_INSTANCE:
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adata->play_stream = substream;
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break;
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case I2S_SP_INSTANCE:
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default:
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adata->i2ssp_play_stream = substream;
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}
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} else {
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2019-12-28 16:40:56 +03:00
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rtd->i2s_instance = pinfo->cap_i2s_instance;
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2020-05-06 13:26:00 +03:00
|
|
|
switch (rtd->i2s_instance) {
|
|
|
|
case I2S_BT_INSTANCE:
|
|
|
|
adata->capture_stream = substream;
|
|
|
|
break;
|
|
|
|
case I2S_SP_INSTANCE:
|
|
|
|
default:
|
|
|
|
adata->i2ssp_capture_stream = substream;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
} else {
|
2019-12-28 16:40:56 +03:00
|
|
|
pr_err("pinfo failed\n");
|
2020-05-06 13:26:00 +03:00
|
|
|
}
|
2018-11-12 08:34:57 +03:00
|
|
|
size = params_buffer_bytes(params);
|
2019-12-10 17:25:52 +03:00
|
|
|
rtd->dma_addr = substream->dma_buffer.addr;
|
|
|
|
rtd->num_pages = (PAGE_ALIGN(size) >> PAGE_SHIFT);
|
|
|
|
config_acp3x_dma(rtd, substream->stream);
|
|
|
|
return 0;
|
2018-11-12 08:34:57 +03:00
|
|
|
}
|
|
|
|
|
2019-10-02 08:31:53 +03:00
|
|
|
static snd_pcm_uframes_t acp3x_dma_pointer(struct snd_soc_component *component,
|
|
|
|
struct snd_pcm_substream *substream)
|
2018-11-12 08:34:57 +03:00
|
|
|
{
|
2019-12-28 16:40:56 +03:00
|
|
|
struct snd_soc_pcm_runtime *prtd;
|
|
|
|
struct snd_soc_card *card;
|
2019-12-28 16:40:55 +03:00
|
|
|
struct i2s_stream_instance *rtd;
|
|
|
|
u32 pos;
|
|
|
|
u32 buffersize;
|
|
|
|
u64 bytescount;
|
2019-05-10 04:41:07 +03:00
|
|
|
|
2019-12-28 16:40:56 +03:00
|
|
|
prtd = substream->private_data;
|
|
|
|
card = prtd->card;
|
2019-12-28 16:40:55 +03:00
|
|
|
rtd = substream->runtime->private_data;
|
2019-12-28 16:40:56 +03:00
|
|
|
|
2019-05-10 04:41:07 +03:00
|
|
|
buffersize = frames_to_bytes(substream->runtime,
|
|
|
|
substream->runtime->buffer_size);
|
|
|
|
bytescount = acp_get_byte_count(rtd, substream->stream);
|
|
|
|
if (bytescount > rtd->bytescount)
|
|
|
|
bytescount -= rtd->bytescount;
|
|
|
|
pos = do_div(bytescount, buffersize);
|
2018-11-12 08:34:57 +03:00
|
|
|
return bytes_to_frames(substream->runtime, pos);
|
|
|
|
}
|
|
|
|
|
2019-10-02 08:31:53 +03:00
|
|
|
static int acp3x_dma_new(struct snd_soc_component *component,
|
|
|
|
struct snd_soc_pcm_runtime *rtd)
|
2018-11-12 08:34:57 +03:00
|
|
|
{
|
2019-08-02 16:51:23 +03:00
|
|
|
struct device *parent = component->dev->parent;
|
2019-12-10 17:25:52 +03:00
|
|
|
snd_pcm_set_managed_buffer_all(rtd->pcm, SNDRV_DMA_TYPE_DEV,
|
|
|
|
parent, MIN_BUFFER, MAX_BUFFER);
|
2019-02-04 18:37:47 +03:00
|
|
|
return 0;
|
2018-11-12 08:34:57 +03:00
|
|
|
}
|
|
|
|
|
2019-10-02 08:31:53 +03:00
|
|
|
static int acp3x_dma_mmap(struct snd_soc_component *component,
|
|
|
|
struct snd_pcm_substream *substream,
|
2018-11-12 08:34:57 +03:00
|
|
|
struct vm_area_struct *vma)
|
|
|
|
{
|
|
|
|
return snd_pcm_lib_default_mmap(substream, vma);
|
|
|
|
}
|
|
|
|
|
2019-10-02 08:31:53 +03:00
|
|
|
static int acp3x_dma_close(struct snd_soc_component *component,
|
|
|
|
struct snd_pcm_substream *substream)
|
2018-11-12 08:34:57 +03:00
|
|
|
{
|
2019-12-28 16:40:55 +03:00
|
|
|
struct snd_soc_pcm_runtime *prtd;
|
|
|
|
struct i2s_dev_data *adata;
|
|
|
|
|
|
|
|
prtd = substream->private_data;
|
|
|
|
component = snd_soc_rtdcom_lookup(prtd, DRV_NAME);
|
|
|
|
adata = dev_get_drvdata(component->dev);
|
2018-11-12 08:34:57 +03:00
|
|
|
|
|
|
|
|
|
|
|
/* Disable ACP irq, when the current stream is being closed and
|
|
|
|
* another stream is also not active.
|
|
|
|
*/
|
2019-12-28 16:40:56 +03:00
|
|
|
if (!adata->play_stream && !adata->capture_stream &&
|
|
|
|
!adata->i2ssp_play_stream && !adata->i2ssp_capture_stream)
|
2018-11-12 08:34:57 +03:00
|
|
|
rv_writel(0, adata->acp3x_base + mmACP_EXTERNAL_INTR_ENB);
|
2020-01-27 14:26:03 +03:00
|
|
|
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
|
|
|
|
adata->play_stream = NULL;
|
|
|
|
adata->i2ssp_play_stream = NULL;
|
|
|
|
} else {
|
|
|
|
adata->capture_stream = NULL;
|
|
|
|
adata->i2ssp_capture_stream = NULL;
|
|
|
|
}
|
2018-11-12 08:34:57 +03:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2018-11-12 08:34:55 +03:00
|
|
|
static const struct snd_soc_component_driver acp3x_i2s_component = {
|
2019-10-02 08:31:53 +03:00
|
|
|
.name = DRV_NAME,
|
|
|
|
.open = acp3x_dma_open,
|
|
|
|
.close = acp3x_dma_close,
|
|
|
|
.hw_params = acp3x_dma_hw_params,
|
|
|
|
.pointer = acp3x_dma_pointer,
|
|
|
|
.mmap = acp3x_dma_mmap,
|
|
|
|
.pcm_construct = acp3x_dma_new,
|
2018-11-12 08:34:55 +03:00
|
|
|
};
|
|
|
|
|
|
|
|
static int acp3x_audio_probe(struct platform_device *pdev)
|
|
|
|
{
|
|
|
|
struct resource *res;
|
|
|
|
struct i2s_dev_data *adata;
|
|
|
|
unsigned int irqflags;
|
2019-12-28 16:40:59 +03:00
|
|
|
int status;
|
2018-11-12 08:34:55 +03:00
|
|
|
|
|
|
|
if (!pdev->dev.platform_data) {
|
|
|
|
dev_err(&pdev->dev, "platform_data not retrieved\n");
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
irqflags = *((unsigned int *)(pdev->dev.platform_data));
|
|
|
|
|
|
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
|
|
if (!res) {
|
2019-12-28 16:40:55 +03:00
|
|
|
dev_err(&pdev->dev, "IORESOURCE_MEM FAILED\n");
|
2019-09-25 12:45:45 +03:00
|
|
|
return -ENODEV;
|
2018-11-12 08:34:55 +03:00
|
|
|
}
|
|
|
|
|
2019-01-15 02:40:10 +03:00
|
|
|
adata = devm_kzalloc(&pdev->dev, sizeof(*adata), GFP_KERNEL);
|
|
|
|
if (!adata)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
2018-11-12 08:34:55 +03:00
|
|
|
adata->acp3x_base = devm_ioremap(&pdev->dev, res->start,
|
|
|
|
resource_size(res));
|
2019-12-28 16:40:55 +03:00
|
|
|
if (!adata->acp3x_base)
|
|
|
|
return -ENOMEM;
|
2018-11-12 08:34:55 +03:00
|
|
|
|
2018-11-12 08:34:56 +03:00
|
|
|
res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
|
|
|
|
if (!res) {
|
|
|
|
dev_err(&pdev->dev, "IORESOURCE_IRQ FAILED\n");
|
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
|
|
|
|
adata->i2s_irq = res->start;
|
2018-11-12 08:34:55 +03:00
|
|
|
|
|
|
|
dev_set_drvdata(&pdev->dev, adata);
|
|
|
|
status = devm_snd_soc_register_component(&pdev->dev,
|
|
|
|
&acp3x_i2s_component,
|
2019-12-28 16:40:55 +03:00
|
|
|
NULL, 0);
|
2018-11-12 08:34:55 +03:00
|
|
|
if (status) {
|
2019-12-28 16:40:55 +03:00
|
|
|
dev_err(&pdev->dev, "Fail to register acp i2s component\n");
|
2019-12-28 16:40:59 +03:00
|
|
|
return -ENODEV;
|
2018-11-12 08:34:55 +03:00
|
|
|
}
|
2018-11-12 08:34:56 +03:00
|
|
|
status = devm_request_irq(&pdev->dev, adata->i2s_irq, i2s_irq_handler,
|
|
|
|
irqflags, "ACP3x_I2S_IRQ", adata);
|
|
|
|
if (status) {
|
|
|
|
dev_err(&pdev->dev, "ACP3x I2S IRQ request failed\n");
|
2019-12-28 16:40:59 +03:00
|
|
|
return -ENODEV;
|
2018-11-12 08:34:56 +03:00
|
|
|
}
|
2018-11-12 08:34:55 +03:00
|
|
|
|
2019-12-28 16:40:59 +03:00
|
|
|
pm_runtime_set_autosuspend_delay(&pdev->dev, 2000);
|
2018-11-12 08:35:00 +03:00
|
|
|
pm_runtime_use_autosuspend(&pdev->dev);
|
|
|
|
pm_runtime_enable(&pdev->dev);
|
2019-12-28 16:40:59 +03:00
|
|
|
pm_runtime_allow(&pdev->dev);
|
2018-11-12 08:34:55 +03:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int acp3x_audio_remove(struct platform_device *pdev)
|
|
|
|
{
|
2018-11-12 08:35:00 +03:00
|
|
|
pm_runtime_disable(&pdev->dev);
|
2018-11-12 08:34:55 +03:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2018-11-12 08:35:01 +03:00
|
|
|
static int acp3x_resume(struct device *dev)
|
|
|
|
{
|
2019-12-28 16:40:55 +03:00
|
|
|
struct i2s_dev_data *adata;
|
2019-12-28 16:40:56 +03:00
|
|
|
u32 val, reg_val, frmt_val;
|
2018-11-12 08:35:01 +03:00
|
|
|
|
2019-12-28 16:40:56 +03:00
|
|
|
reg_val = 0;
|
|
|
|
frmt_val = 0;
|
2019-12-28 16:40:55 +03:00
|
|
|
adata = dev_get_drvdata(dev);
|
2018-11-12 08:35:01 +03:00
|
|
|
|
|
|
|
if (adata->play_stream && adata->play_stream->runtime) {
|
|
|
|
struct i2s_stream_instance *rtd =
|
|
|
|
adata->play_stream->runtime->private_data;
|
|
|
|
config_acp3x_dma(rtd, SNDRV_PCM_STREAM_PLAYBACK);
|
2019-12-28 16:40:56 +03:00
|
|
|
switch (rtd->i2s_instance) {
|
|
|
|
case I2S_BT_INSTANCE:
|
|
|
|
reg_val = mmACP_BTTDM_ITER;
|
|
|
|
frmt_val = mmACP_BTTDM_TXFRMT;
|
|
|
|
break;
|
|
|
|
case I2S_SP_INSTANCE:
|
|
|
|
default:
|
|
|
|
reg_val = mmACP_I2STDM_ITER;
|
|
|
|
frmt_val = mmACP_I2STDM_TXFRMT;
|
2018-11-12 08:35:01 +03:00
|
|
|
}
|
2020-03-27 17:14:29 +03:00
|
|
|
rv_writel((rtd->xfer_resolution << 3),
|
|
|
|
rtd->acp3x_base + reg_val);
|
2018-11-12 08:35:01 +03:00
|
|
|
}
|
|
|
|
if (adata->capture_stream && adata->capture_stream->runtime) {
|
|
|
|
struct i2s_stream_instance *rtd =
|
|
|
|
adata->capture_stream->runtime->private_data;
|
|
|
|
config_acp3x_dma(rtd, SNDRV_PCM_STREAM_CAPTURE);
|
2019-12-28 16:40:56 +03:00
|
|
|
switch (rtd->i2s_instance) {
|
|
|
|
case I2S_BT_INSTANCE:
|
|
|
|
reg_val = mmACP_BTTDM_IRER;
|
|
|
|
frmt_val = mmACP_BTTDM_RXFRMT;
|
|
|
|
break;
|
|
|
|
case I2S_SP_INSTANCE:
|
|
|
|
default:
|
|
|
|
reg_val = mmACP_I2STDM_IRER;
|
|
|
|
frmt_val = mmACP_I2STDM_RXFRMT;
|
2018-11-12 08:35:01 +03:00
|
|
|
}
|
2020-03-27 17:14:29 +03:00
|
|
|
rv_writel((rtd->xfer_resolution << 3),
|
|
|
|
rtd->acp3x_base + reg_val);
|
2019-12-28 16:40:56 +03:00
|
|
|
}
|
|
|
|
if (adata->tdm_mode == TDM_ENABLE) {
|
|
|
|
rv_writel(adata->tdm_fmt, adata->acp3x_base + frmt_val);
|
|
|
|
val = rv_readl(adata->acp3x_base + reg_val);
|
|
|
|
rv_writel(val | 0x2, adata->acp3x_base + reg_val);
|
2018-11-12 08:35:01 +03:00
|
|
|
}
|
|
|
|
rv_writel(1, adata->acp3x_base + mmACP_EXTERNAL_INTR_ENB);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
2018-11-12 08:35:00 +03:00
|
|
|
static int acp3x_pcm_runtime_suspend(struct device *dev)
|
|
|
|
{
|
2019-12-28 16:40:55 +03:00
|
|
|
struct i2s_dev_data *adata;
|
2018-11-12 08:35:00 +03:00
|
|
|
|
2019-12-28 16:40:56 +03:00
|
|
|
adata = dev_get_drvdata(dev);
|
2018-11-12 08:35:00 +03:00
|
|
|
|
|
|
|
rv_writel(0, adata->acp3x_base + mmACP_EXTERNAL_INTR_ENB);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int acp3x_pcm_runtime_resume(struct device *dev)
|
|
|
|
{
|
2019-12-28 16:40:55 +03:00
|
|
|
struct i2s_dev_data *adata;
|
2018-11-12 08:35:00 +03:00
|
|
|
|
2019-12-28 16:40:56 +03:00
|
|
|
adata = dev_get_drvdata(dev);
|
2019-12-28 16:40:59 +03:00
|
|
|
|
2018-11-12 08:35:00 +03:00
|
|
|
rv_writel(1, adata->acp3x_base + mmACP_EXTERNAL_INTR_ENB);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static const struct dev_pm_ops acp3x_pm_ops = {
|
|
|
|
.runtime_suspend = acp3x_pcm_runtime_suspend,
|
|
|
|
.runtime_resume = acp3x_pcm_runtime_resume,
|
2018-11-12 08:35:01 +03:00
|
|
|
.resume = acp3x_resume,
|
2018-11-12 08:35:00 +03:00
|
|
|
};
|
|
|
|
|
2018-11-12 08:34:55 +03:00
|
|
|
static struct platform_driver acp3x_dma_driver = {
|
|
|
|
.probe = acp3x_audio_probe,
|
|
|
|
.remove = acp3x_audio_remove,
|
|
|
|
.driver = {
|
2019-12-28 16:40:55 +03:00
|
|
|
.name = "acp3x_rv_i2s_dma",
|
2018-11-12 08:35:00 +03:00
|
|
|
.pm = &acp3x_pm_ops,
|
2018-11-12 08:34:55 +03:00
|
|
|
},
|
|
|
|
};
|
|
|
|
|
|
|
|
module_platform_driver(acp3x_dma_driver);
|
|
|
|
|
2019-12-28 16:40:55 +03:00
|
|
|
MODULE_AUTHOR("Vishnuvardhanrao.Ravulapati@amd.com");
|
2018-11-12 08:34:55 +03:00
|
|
|
MODULE_AUTHOR("Maruthi.Bayyavarapu@amd.com");
|
|
|
|
MODULE_AUTHOR("Vijendar.Mukunda@amd.com");
|
|
|
|
MODULE_DESCRIPTION("AMD ACP 3.x PCM Driver");
|
|
|
|
MODULE_LICENSE("GPL v2");
|
2020-05-18 07:39:05 +03:00
|
|
|
MODULE_ALIAS("platform:"DRV_NAME);
|