2019-01-07 14:07:41 +03:00
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/* SPDX-License-Identifier: GPL-2.0 */
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2013-06-05 16:26:45 +04:00
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/*
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* Driver for the Synopsys DesignWare DMA Controller
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*
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* Copyright (C) 2013 Intel Corporation
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*/
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2014-09-23 18:18:15 +04:00
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#ifndef _DMA_DW_INTERNAL_H
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#define _DMA_DW_INTERNAL_H
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2014-09-23 18:18:11 +04:00
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#include <linux/dma/dw.h>
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2013-06-05 16:26:45 +04:00
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#include "regs.h"
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2019-01-07 14:07:38 +03:00
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int do_dma_probe(struct dw_dma_chip *chip);
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int do_dma_remove(struct dw_dma_chip *chip);
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void do_dw_dma_on(struct dw_dma *dw);
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void do_dw_dma_off(struct dw_dma *dw);
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int do_dw_dma_disable(struct dw_dma_chip *chip);
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int do_dw_dma_enable(struct dw_dma_chip *chip);
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2013-06-05 16:26:45 +04:00
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2014-08-19 21:29:16 +04:00
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extern bool dw_dma_filter(struct dma_chan *chan, void *param);
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2013-06-05 16:26:45 +04:00
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2019-08-20 16:15:45 +03:00
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#ifdef CONFIG_ACPI
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void dw_dma_acpi_controller_register(struct dw_dma *dw);
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void dw_dma_acpi_controller_free(struct dw_dma *dw);
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#else /* !CONFIG_ACPI */
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static inline void dw_dma_acpi_controller_register(struct dw_dma *dw) {}
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static inline void dw_dma_acpi_controller_free(struct dw_dma *dw) {}
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#endif /* !CONFIG_ACPI */
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2019-08-20 16:15:46 +03:00
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struct platform_device;
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#ifdef CONFIG_OF
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struct dw_dma_platform_data *dw_dma_parse_dt(struct platform_device *pdev);
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void dw_dma_of_controller_register(struct dw_dma *dw);
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void dw_dma_of_controller_free(struct dw_dma *dw);
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#else
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static inline struct dw_dma_platform_data *dw_dma_parse_dt(struct platform_device *pdev)
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{
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return NULL;
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}
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static inline void dw_dma_of_controller_register(struct dw_dma *dw) {}
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static inline void dw_dma_of_controller_free(struct dw_dma *dw) {}
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#endif
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2019-08-20 16:15:39 +03:00
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struct dw_dma_chip_pdata {
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const struct dw_dma_platform_data *pdata;
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int (*probe)(struct dw_dma_chip *chip);
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int (*remove)(struct dw_dma_chip *chip);
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struct dw_dma_chip *chip;
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};
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static __maybe_unused const struct dw_dma_chip_pdata dw_dma_chip_pdata = {
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.probe = dw_dma_probe,
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.remove = dw_dma_remove,
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};
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static const struct dw_dma_platform_data idma32_pdata = {
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.nr_channels = 8,
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.chan_allocation_order = CHAN_ALLOCATION_ASCENDING,
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.chan_priority = CHAN_PRIORITY_ASCENDING,
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.block_size = 131071,
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.nr_masters = 1,
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.data_width = {4},
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.multi_block = {1, 1, 1, 1, 1, 1, 1, 1},
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};
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static __maybe_unused const struct dw_dma_chip_pdata idma32_chip_pdata = {
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.pdata = &idma32_pdata,
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.probe = idma32_dma_probe,
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.remove = idma32_dma_remove,
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};
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2021-07-12 14:39:40 +03:00
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static const struct dw_dma_platform_data xbar_pdata = {
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.nr_channels = 8,
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.chan_allocation_order = CHAN_ALLOCATION_ASCENDING,
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.chan_priority = CHAN_PRIORITY_ASCENDING,
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.block_size = 131071,
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.nr_masters = 1,
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.data_width = {4},
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.quirks = DW_DMA_QUIRK_XBAR_PRESENT,
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};
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static __maybe_unused const struct dw_dma_chip_pdata xbar_chip_pdata = {
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.pdata = &xbar_pdata,
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.probe = idma32_dma_probe,
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.remove = idma32_dma_remove,
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};
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2014-09-23 18:18:15 +04:00
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#endif /* _DMA_DW_INTERNAL_H */
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