2012-11-13 00:28:33 +04:00
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/*
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* Copyright 2012 Philippe Reynes <tremyfr@yahoo.fr>
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* Copyright 2012 Armadeus Systems <support@armadeus.com>
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*
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* Based on code which is: Copyright 2012 Sascha Hauer, Pengutronix
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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/dts-v1/;
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2013-04-07 06:49:34 +04:00
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#include "imx27.dtsi"
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2012-11-13 00:28:33 +04:00
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/ {
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model = "Armadeus Systems APF27 module";
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compatible = "armadeus,imx27-apf27", "fsl,imx27";
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memory {
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reg = <0xa0000000 0x04000000>;
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};
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clocks {
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#address-cells = <1>;
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#size-cells = <0>;
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osc26m {
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compatible = "fsl,imx-osc26m", "fixed-clock";
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clock-frequency = <0>;
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};
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};
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2012-12-31 07:32:48 +04:00
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};
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2012-11-13 00:28:33 +04:00
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2013-11-28 11:19:31 +04:00
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&iomuxc {
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imx27-apf27 {
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pinctrl_fec1: fec1grp {
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fsl,pins = <
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MX27_PAD_SD3_CMD__FEC_TXD0 0x0
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MX27_PAD_SD3_CLK__FEC_TXD1 0x0
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MX27_PAD_ATA_DATA0__FEC_TXD2 0x0
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MX27_PAD_ATA_DATA1__FEC_TXD3 0x0
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MX27_PAD_ATA_DATA2__FEC_RX_ER 0x0
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MX27_PAD_ATA_DATA3__FEC_RXD1 0x0
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MX27_PAD_ATA_DATA4__FEC_RXD2 0x0
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MX27_PAD_ATA_DATA5__FEC_RXD3 0x0
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MX27_PAD_ATA_DATA6__FEC_MDIO 0x0
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MX27_PAD_ATA_DATA7__FEC_MDC 0x0
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MX27_PAD_ATA_DATA8__FEC_CRS 0x0
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MX27_PAD_ATA_DATA9__FEC_TX_CLK 0x0
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MX27_PAD_ATA_DATA10__FEC_RXD0 0x0
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MX27_PAD_ATA_DATA11__FEC_RX_DV 0x0
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MX27_PAD_ATA_DATA12__FEC_RX_CLK 0x0
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MX27_PAD_ATA_DATA13__FEC_COL 0x0
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MX27_PAD_ATA_DATA14__FEC_TX_ER 0x0
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MX27_PAD_ATA_DATA15__FEC_TX_EN 0x0
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>;
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};
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pinctrl_uart1: uart1grp {
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fsl,pins = <
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MX27_PAD_UART1_TXD__UART1_TXD 0x0
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MX27_PAD_UART1_RXD__UART1_RXD 0x0
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>;
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};
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};
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};
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2012-12-31 07:32:48 +04:00
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&uart1 {
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2013-11-28 11:19:31 +04:00
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1>;
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2012-12-31 07:32:48 +04:00
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status = "okay";
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};
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2012-11-13 00:28:33 +04:00
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2012-12-31 07:32:48 +04:00
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&fec {
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2013-11-28 11:19:31 +04:00
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_fec1>;
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2012-12-31 07:32:48 +04:00
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status = "okay";
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};
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2012-11-13 00:28:33 +04:00
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2012-12-31 07:32:48 +04:00
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&nfc {
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status = "okay";
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nand-bus-width = <16>;
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nand-ecc-mode = "hw";
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nand-on-flash-bbt;
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2012-11-13 00:28:33 +04:00
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2012-12-31 07:32:48 +04:00
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partition@0 {
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label = "u-boot";
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reg = <0x0 0x100000>;
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};
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2012-11-13 00:28:33 +04:00
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2012-12-31 07:32:48 +04:00
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partition@100000 {
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label = "env";
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reg = <0x100000 0x80000>;
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};
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2012-11-13 00:28:33 +04:00
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2012-12-31 07:32:48 +04:00
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partition@180000 {
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label = "env2";
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reg = <0x180000 0x80000>;
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};
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2012-11-13 00:28:33 +04:00
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2012-12-31 07:32:48 +04:00
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partition@200000 {
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label = "firmware";
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reg = <0x200000 0x80000>;
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};
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2012-11-13 00:28:33 +04:00
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2012-12-31 07:32:48 +04:00
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partition@280000 {
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label = "dtb";
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reg = <0x280000 0x80000>;
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};
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2012-11-13 00:28:33 +04:00
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2012-12-31 07:32:48 +04:00
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partition@300000 {
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label = "kernel";
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reg = <0x300000 0x500000>;
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};
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2012-11-13 00:28:33 +04:00
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2012-12-31 07:32:48 +04:00
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partition@800000 {
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label = "rootfs";
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reg = <0x800000 0xf800000>;
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2012-11-13 00:28:33 +04:00
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};
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};
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