2005-07-27 22:44:44 +04:00
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#ifndef _ASM_ARCH_IRQ_H
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#define _ASM_ARCH_IRQ_H
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#include "hwregs/intr_vect.h"
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/* Number of non-cpu interrupts. */
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#define NR_IRQS 0x50 /* Exceptions + IRQs */
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#define NR_REAL_IRQS 0x20 /* IRQs */
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#define FIRST_IRQ 0x31 /* Exception number for first IRQ */
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#ifndef __ASSEMBLY__
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/* Global IRQ vector. */
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typedef void (*irqvectptr)(void);
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struct etrax_interrupt_vector {
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irqvectptr v[256];
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};
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extern struct etrax_interrupt_vector *etrax_irv; /* head.S */
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void mask_irq(int irq);
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void unmask_irq(int irq);
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void set_exception_vector(int n, irqvectptr addr);
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/* Save registers so that they match pt_regs. */
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#define SAVE_ALL \
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"subq 12,$sp\n\t" \
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"move $erp,[$sp]\n\t" \
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"subq 4,$sp\n\t" \
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"move $srp,[$sp]\n\t" \
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"subq 4,$sp\n\t" \
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"move $ccs,[$sp]\n\t" \
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"subq 4,$sp\n\t" \
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"move $spc,[$sp]\n\t" \
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"subq 4,$sp\n\t" \
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"move $mof,[$sp]\n\t" \
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"subq 4,$sp\n\t" \
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"move $srs,[$sp]\n\t" \
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"subq 4,$sp\n\t" \
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"move.d $acr,[$sp]\n\t" \
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"subq 14*4,$sp\n\t" \
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"movem $r13,[$sp]\n\t" \
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"subq 4,$sp\n\t" \
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"move.d $r10,[$sp]\n"
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#define STR2(x) #x
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#define STR(x) STR2(x)
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#define IRQ_NAME2(nr) nr##_interrupt(void)
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#define IRQ_NAME(nr) IRQ_NAME2(IRQ##nr)
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/*
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* The reason for setting the S-bit when debugging the kernel is that we want
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* hardware breakpoints to remain active while we are in an exception handler.
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* Note that we cannot simply copy S1, since we may come here from user-space,
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* or any context where the S-bit wasn't set.
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*/
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#ifdef CONFIG_ETRAX_KGDB
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#define KGDB_FIXUP \
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"move $ccs, $r10\n\t" \
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"or.d (1<<9), $r10\n\t" \
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"move $r10, $ccs\n\t"
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#else
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#define KGDB_FIXUP ""
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#endif
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/*
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* Make sure the causing IRQ is blocked, then call do_IRQ. After that, unblock
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* and jump to ret_from_intr which is found in entry.S.
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*
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* The reason for blocking the IRQ is to allow an sti() before the handler,
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* which will acknowledge the interrupt, is run. The actual blocking is made
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* by crisv32_do_IRQ.
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*/
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#define BUILD_IRQ(nr, mask) \
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void IRQ_NAME(nr); \
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__asm__ ( \
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".text\n\t" \
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"IRQ" #nr "_interrupt:\n\t" \
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SAVE_ALL \
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KGDB_FIXUP \
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"move.d "#nr",$r10\n\t" \
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"move.d $sp,$r12\n\t" \
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"jsr crisv32_do_IRQ\n\t" \
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"moveq 1, $r11\n\t" \
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"jump ret_from_intr\n\t" \
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"nop\n\t");
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/*
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* This is subtle. The timer interrupt is crucial and it should not be disabled
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* for too long. However, if it had been a normal interrupt as per BUILD_IRQ, it
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* would have been BLOCK'ed, and then softirq's are run before we return here to
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* UNBLOCK. If the softirq's take too much time to run, the timer irq won't run
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* and the watchdog will kill us.
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*
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* Furthermore, if a lot of other irq's occur before we return here, the
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* multiple_irq handler is run and it prioritizes the timer interrupt. However
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* if we had BLOCK'edit here, we would not get the multiple_irq at all.
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*
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* The non-blocking here is based on the knowledge that the timer interrupt is
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2006-07-02 06:29:14 +04:00
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* registred as a fast interrupt (IRQF_DISABLED) so that we _know_ there will not
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2005-07-27 22:44:44 +04:00
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* be an sti() before the timer irq handler is run to acknowledge the interrupt.
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*/
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#define BUILD_TIMER_IRQ(nr, mask) \
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void IRQ_NAME(nr); \
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__asm__ ( \
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".text\n\t" \
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"IRQ" #nr "_interrupt:\n\t" \
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SAVE_ALL \
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KGDB_FIXUP \
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"move.d "#nr",$r10\n\t" \
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"move.d $sp,$r12\n\t" \
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"jsr crisv32_do_IRQ\n\t" \
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"moveq 0,$r11\n\t" \
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"jump ret_from_intr\n\t" \
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"nop\n\t");
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#endif /* __ASSEMBLY__ */
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#endif /* _ASM_ARCH_IRQ_H */
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