2019-06-04 11:11:33 +03:00
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/* SPDX-License-Identifier: GPL-2.0-only */
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2005-04-17 02:20:36 +04:00
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/*
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* linux/arch/arm/lib/copypage.S
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*
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* Copyright (C) 1995-1999 Russell King
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*
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* ASM optimised string functions
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*/
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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2005-09-09 23:08:59 +04:00
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#include <asm/asm-offsets.h>
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2009-09-15 13:26:33 +04:00
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#include <asm/cache.h>
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2005-04-17 02:20:36 +04:00
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2009-09-15 13:26:33 +04:00
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#define COPY_COUNT (PAGE_SZ / (2 * L1_CACHE_BYTES) PLD( -1 ))
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2005-04-17 02:20:36 +04:00
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.text
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.align 5
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/*
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* StrongARM optimised copy_page routine
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* now 1.78bytes/cycle, was 1.60 bytes/cycle (50MHz bus -> 89MB/s)
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* Note that we probably achieve closer to the 100MB/s target with
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* the core clock switching.
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*/
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ENTRY(copy_page)
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stmfd sp!, {r4, lr} @ 2
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PLD( pld [r1, #0] )
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2009-09-15 13:26:33 +04:00
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PLD( pld [r1, #L1_CACHE_BYTES] )
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2005-04-17 02:20:36 +04:00
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mov r2, #COPY_COUNT @ 1
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ldmia r1!, {r3, r4, ip, lr} @ 4+1
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2009-09-15 13:26:33 +04:00
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1: PLD( pld [r1, #2 * L1_CACHE_BYTES])
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PLD( pld [r1, #3 * L1_CACHE_BYTES])
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2:
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.rept (2 * L1_CACHE_BYTES / 16 - 1)
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2005-04-17 02:20:36 +04:00
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stmia r0!, {r3, r4, ip, lr} @ 4
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ldmia r1!, {r3, r4, ip, lr} @ 4
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2009-09-15 13:26:33 +04:00
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.endr
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2005-04-17 02:20:36 +04:00
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subs r2, r2, #1 @ 1
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stmia r0!, {r3, r4, ip, lr} @ 4
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2019-02-18 02:57:38 +03:00
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ldmiagt r1!, {r3, r4, ip, lr} @ 4
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2005-04-17 02:20:36 +04:00
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bgt 1b @ 1
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2019-02-18 02:57:38 +03:00
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PLD( ldmiaeq r1!, {r3, r4, ip, lr} )
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2005-04-17 02:20:36 +04:00
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PLD( beq 2b )
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2006-06-25 14:23:45 +04:00
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ldmfd sp!, {r4, pc} @ 3
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2008-08-28 14:22:32 +04:00
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ENDPROC(copy_page)
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