2019-05-19 15:07:45 +03:00
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# SPDX-License-Identifier: GPL-2.0-only
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2014-06-10 18:06:10 +04:00
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menu "TI OMAP/AM/DM/DRA Family"
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depends on ARCH_MULTI_V6 || ARCH_MULTI_V7
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2020-11-16 13:57:13 +03:00
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config OMAP_HWMOD
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bool
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2010-07-05 17:31:47 +04:00
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config ARCH_OMAP2
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2012-03-06 04:02:18 +04:00
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bool "TI OMAP2"
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2013-04-23 17:30:51 +04:00
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depends on ARCH_MULTI_V6
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2013-05-01 02:02:26 +04:00
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select ARCH_OMAP2PLUS
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2010-07-05 17:31:47 +04:00
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select CPU_V6
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2020-11-16 13:57:13 +03:00
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select OMAP_HWMOD
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2012-07-05 19:05:15 +04:00
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select SOC_HAS_OMAP2_SDRC
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2010-07-05 17:31:47 +04:00
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config ARCH_OMAP3
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2012-03-06 04:02:18 +04:00
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bool "TI OMAP3"
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2013-04-23 17:30:51 +04:00
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depends on ARCH_MULTI_V7
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2013-05-01 02:02:26 +04:00
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select ARCH_OMAP2PLUS
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2021-01-15 11:06:12 +03:00
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select ARM_CPU_SUSPEND
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2020-11-16 13:57:13 +03:00
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select OMAP_HWMOD
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2012-09-14 13:20:34 +04:00
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select OMAP_INTERCONNECT
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2021-01-15 11:06:12 +03:00
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select PM_OPP
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ARM: config: sort select statements alphanumerically
As suggested by Andrew Morton:
This is a pet peeve of mine. Any time there's a long list of items
(header file inclusions, kconfig entries, array initalisers, etc) and
someone wants to add a new item, they *always* go and stick it at the
end of the list.
Guys, don't do this. Either put the new item into a randomly-chosen
position or, probably better, alphanumerically sort the list.
lets sort all our select statements alphanumerically. This commit was
created by the following perl:
while (<>) {
while (/\\\s*$/) {
$_ .= <>;
}
undef %selects if /^\s*config\s+/;
if (/^\s+select\s+(\w+).*/) {
if (defined($selects{$1})) {
if ($selects{$1} eq $_) {
print STDERR "Warning: removing duplicated $1 entry\n";
} else {
print STDERR "Error: $1 differently selected\n".
"\tOld: $selects{$1}\n".
"\tNew: $_\n";
exit 1;
}
}
$selects{$1} = $_;
next;
}
if (%selects and (/^\s*$/ or /^\s+help/ or /^\s+---help---/ or
/^endif/ or /^endchoice/)) {
foreach $k (sort (keys %selects)) {
print "$selects{$k}";
}
undef %selects;
}
print;
}
if (%selects) {
foreach $k (sort (keys %selects)) {
print "$selects{$k}";
}
}
It found two duplicates:
Warning: removing duplicated S5P_SETUP_MIPIPHY entry
Warning: removing duplicated HARDIRQS_SW_RESEND entry
and they are identical duplicates, hence the shrinkage in the diffstat
of two lines.
We have four testers reporting success of this change (Tony, Stephen,
Linus and Sekhar.)
Acked-by: Jason Cooper <jason@lakedaemon.net>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-10-06 20:12:25 +04:00
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select SOC_HAS_OMAP2_SDRC
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2016-05-20 02:20:17 +03:00
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select ARM_ERRATA_430973
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2010-07-05 17:31:47 +04:00
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config ARCH_OMAP4
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2012-03-06 04:02:18 +04:00
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bool "TI OMAP4"
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2013-04-23 17:30:51 +04:00
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depends on ARCH_MULTI_V7
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2013-05-01 02:02:26 +04:00
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select ARCH_OMAP2PLUS
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ARM: config: sort select statements alphanumerically
As suggested by Andrew Morton:
This is a pet peeve of mine. Any time there's a long list of items
(header file inclusions, kconfig entries, array initalisers, etc) and
someone wants to add a new item, they *always* go and stick it at the
end of the list.
Guys, don't do this. Either put the new item into a randomly-chosen
position or, probably better, alphanumerically sort the list.
lets sort all our select statements alphanumerically. This commit was
created by the following perl:
while (<>) {
while (/\\\s*$/) {
$_ .= <>;
}
undef %selects if /^\s*config\s+/;
if (/^\s+select\s+(\w+).*/) {
if (defined($selects{$1})) {
if ($selects{$1} eq $_) {
print STDERR "Warning: removing duplicated $1 entry\n";
} else {
print STDERR "Error: $1 differently selected\n".
"\tOld: $selects{$1}\n".
"\tNew: $_\n";
exit 1;
}
}
$selects{$1} = $_;
next;
}
if (%selects and (/^\s*$/ or /^\s+help/ or /^\s+---help---/ or
/^endif/ or /^endchoice/)) {
foreach $k (sort (keys %selects)) {
print "$selects{$k}";
}
undef %selects;
}
print;
}
if (%selects) {
foreach $k (sort (keys %selects)) {
print "$selects{$k}";
}
}
It found two duplicates:
Warning: removing duplicated S5P_SETUP_MIPIPHY entry
Warning: removing duplicated HARDIRQS_SW_RESEND entry
and they are identical duplicates, hence the shrinkage in the diffstat
of two lines.
We have four testers reporting success of this change (Tony, Stephen,
Linus and Sekhar.)
Acked-by: Jason Cooper <jason@lakedaemon.net>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-10-06 20:12:25 +04:00
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select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP
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2021-01-15 11:06:12 +03:00
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select ARM_CPU_SUSPEND
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ARM: config: sort select statements alphanumerically
As suggested by Andrew Morton:
This is a pet peeve of mine. Any time there's a long list of items
(header file inclusions, kconfig entries, array initalisers, etc) and
someone wants to add a new item, they *always* go and stick it at the
end of the list.
Guys, don't do this. Either put the new item into a randomly-chosen
position or, probably better, alphanumerically sort the list.
lets sort all our select statements alphanumerically. This commit was
created by the following perl:
while (<>) {
while (/\\\s*$/) {
$_ .= <>;
}
undef %selects if /^\s*config\s+/;
if (/^\s+select\s+(\w+).*/) {
if (defined($selects{$1})) {
if ($selects{$1} eq $_) {
print STDERR "Warning: removing duplicated $1 entry\n";
} else {
print STDERR "Error: $1 differently selected\n".
"\tOld: $selects{$1}\n".
"\tNew: $_\n";
exit 1;
}
}
$selects{$1} = $_;
next;
}
if (%selects and (/^\s*$/ or /^\s+help/ or /^\s+---help---/ or
/^endif/ or /^endchoice/)) {
foreach $k (sort (keys %selects)) {
print "$selects{$k}";
}
undef %selects;
}
print;
}
if (%selects) {
foreach $k (sort (keys %selects)) {
print "$selects{$k}";
}
}
It found two duplicates:
Warning: removing duplicated S5P_SETUP_MIPIPHY entry
Warning: removing duplicated HARDIRQS_SW_RESEND entry
and they are identical duplicates, hence the shrinkage in the diffstat
of two lines.
We have four testers reporting success of this change (Tony, Stephen,
Linus and Sekhar.)
Acked-by: Jason Cooper <jason@lakedaemon.net>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-10-06 20:12:25 +04:00
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select ARM_ERRATA_720789
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select ARM_GIC
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2013-02-28 03:28:14 +04:00
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select HAVE_ARM_SCU if SMP
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2013-02-16 04:02:20 +04:00
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select HAVE_ARM_TWD if SMP
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ARM: config: sort select statements alphanumerically
As suggested by Andrew Morton:
This is a pet peeve of mine. Any time there's a long list of items
(header file inclusions, kconfig entries, array initalisers, etc) and
someone wants to add a new item, they *always* go and stick it at the
end of the list.
Guys, don't do this. Either put the new item into a randomly-chosen
position or, probably better, alphanumerically sort the list.
lets sort all our select statements alphanumerically. This commit was
created by the following perl:
while (<>) {
while (/\\\s*$/) {
$_ .= <>;
}
undef %selects if /^\s*config\s+/;
if (/^\s+select\s+(\w+).*/) {
if (defined($selects{$1})) {
if ($selects{$1} eq $_) {
print STDERR "Warning: removing duplicated $1 entry\n";
} else {
print STDERR "Error: $1 differently selected\n".
"\tOld: $selects{$1}\n".
"\tNew: $_\n";
exit 1;
}
}
$selects{$1} = $_;
next;
}
if (%selects and (/^\s*$/ or /^\s+help/ or /^\s+---help---/ or
/^endif/ or /^endchoice/)) {
foreach $k (sort (keys %selects)) {
print "$selects{$k}";
}
undef %selects;
}
print;
}
if (%selects) {
foreach $k (sort (keys %selects)) {
print "$selects{$k}";
}
}
It found two duplicates:
Warning: removing duplicated S5P_SETUP_MIPIPHY entry
Warning: removing duplicated HARDIRQS_SW_RESEND entry
and they are identical duplicates, hence the shrinkage in the diffstat
of two lines.
We have four testers reporting success of this change (Tony, Stephen,
Linus and Sekhar.)
Acked-by: Jason Cooper <jason@lakedaemon.net>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-10-06 20:12:25 +04:00
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select OMAP_INTERCONNECT
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2015-06-06 02:38:08 +03:00
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select OMAP_INTERCONNECT_BARRIER
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2014-06-19 13:19:10 +04:00
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select PL310_ERRATA_588369 if CACHE_L2X0
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select PL310_ERRATA_727915 if CACHE_L2X0
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2021-01-15 11:06:12 +03:00
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select PM_OPP
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2014-12-19 17:37:54 +03:00
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select PM if CPU_IDLE
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2013-03-21 18:42:17 +04:00
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select ARM_ERRATA_754322
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select ARM_ERRATA_775420
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2016-05-24 19:12:29 +03:00
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select OMAP_INTERCONNECT
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2010-07-05 17:31:47 +04:00
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2012-04-03 13:24:58 +04:00
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config SOC_OMAP5
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bool "TI OMAP5"
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2013-04-23 17:30:51 +04:00
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depends on ARCH_MULTI_V7
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2013-05-01 02:02:26 +04:00
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select ARCH_OMAP2PLUS
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2021-01-15 11:06:12 +03:00
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select ARM_CPU_SUSPEND
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2012-04-03 13:24:58 +04:00
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select ARM_GIC
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2013-06-03 17:55:41 +04:00
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select HAVE_ARM_SCU if SMP
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2012-11-12 18:33:44 +04:00
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select HAVE_ARM_ARCH_TIMER
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2013-07-25 03:55:23 +04:00
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select ARM_ERRATA_798181 if SMP
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2015-09-10 00:18:14 +03:00
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select OMAP_INTERCONNECT
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2015-06-06 02:38:08 +03:00
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select OMAP_INTERCONNECT_BARRIER
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2021-01-15 11:06:12 +03:00
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select PM_OPP
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2015-10-16 22:16:21 +03:00
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select ZONE_DMA if ARM_LPAE
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2012-04-03 13:24:58 +04:00
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2013-05-01 02:02:26 +04:00
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config SOC_AM33XX
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2013-08-09 01:32:08 +04:00
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bool "TI AM33XX"
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2013-05-01 02:02:26 +04:00
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depends on ARCH_MULTI_V7
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select ARCH_OMAP2PLUS
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2021-01-15 11:06:12 +03:00
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select ARM_CPU_SUSPEND
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2013-05-01 02:02:26 +04:00
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config SOC_AM43XX
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bool "TI AM43x"
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depends on ARCH_MULTI_V7
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select ARCH_OMAP2PLUS
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select ARM_GIC
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select MACH_OMAP_GENERIC
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2015-07-11 00:05:48 +03:00
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select HAVE_ARM_SCU
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2015-12-14 23:34:05 +03:00
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select GENERIC_CLOCKEVENTS_BROADCAST
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2015-12-14 23:34:06 +03:00
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select HAVE_ARM_TWD
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2016-05-12 21:20:52 +03:00
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select ARM_ERRATA_754322
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select ARM_ERRATA_775420
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2016-10-19 23:44:12 +03:00
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select OMAP_INTERCONNECT
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2021-01-15 11:06:12 +03:00
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select ARM_CPU_SUSPEND
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2013-05-01 02:02:26 +04:00
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2014-01-10 13:25:28 +04:00
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config SOC_DRA7XX
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bool "TI DRA7XX"
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depends on ARCH_MULTI_V7
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select ARCH_OMAP2PLUS
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2021-01-15 11:06:12 +03:00
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select ARM_CPU_SUSPEND
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2014-01-10 13:25:28 +04:00
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select ARM_GIC
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2015-09-10 00:18:13 +03:00
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select HAVE_ARM_SCU if SMP
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2014-01-10 13:25:28 +04:00
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select HAVE_ARM_ARCH_TIMER
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2013-12-03 14:27:25 +04:00
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select IRQ_CROSSBAR
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2015-03-26 02:25:09 +03:00
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select ARM_ERRATA_798181 if SMP
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2015-09-10 00:18:13 +03:00
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select OMAP_INTERCONNECT
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2015-06-06 02:38:08 +03:00
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select OMAP_INTERCONNECT_BARRIER
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2021-01-15 11:06:12 +03:00
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select PM_OPP
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2015-10-16 22:16:21 +03:00
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select ZONE_DMA if ARM_LPAE
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2017-08-10 19:56:20 +03:00
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select PINCTRL_TI_IODELAY if OF && PINCTRL
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2014-01-10 13:25:28 +04:00
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2013-05-01 02:02:26 +04:00
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config ARCH_OMAP2PLUS
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bool
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select ARCH_HAS_BANDGAP
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2019-12-16 16:21:26 +03:00
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select ARCH_HAS_RESET_CONTROLLER
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2013-05-01 02:02:26 +04:00
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select ARCH_OMAP
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select CLKSRC_MMIO
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select GENERIC_IRQ_CHIP
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2016-06-02 15:10:16 +03:00
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select GPIOLIB
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2013-09-26 02:44:39 +04:00
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select MACH_OMAP_GENERIC
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2014-11-20 20:13:42 +03:00
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select MEMORY
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2015-04-20 20:36:31 +03:00
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select MFD_SYSCON
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2013-05-01 02:02:26 +04:00
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select OMAP_DM_TIMER
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2014-11-20 20:13:42 +03:00
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select OMAP_GPMC
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2013-05-01 02:02:26 +04:00
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select PINCTRL
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2021-01-15 11:06:12 +03:00
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select PM
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select PM_GENERIC_DOMAINS
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select PM_GENERIC_DOMAINS_OF
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2019-12-16 16:21:26 +03:00
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select RESET_CONTROLLER
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2013-05-01 02:02:26 +04:00
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select SOC_BUS
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2017-10-11 00:23:43 +03:00
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select TI_SYSC
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2014-09-16 01:15:02 +04:00
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select OMAP_IRQCHIP
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2015-10-05 19:40:58 +03:00
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select CLKSRC_TI_32K
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2013-05-01 02:02:26 +04:00
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help
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Systems based on OMAP2, OMAP3, OMAP4 or OMAP5
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2015-06-06 02:38:08 +03:00
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config OMAP_INTERCONNECT_BARRIER
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bool
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select ARM_HEAVY_MB
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2013-05-01 02:02:26 +04:00
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if ARCH_OMAP2PLUS
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menu "TI OMAP2/3/4 Specific Features"
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config ARCH_OMAP2PLUS_TYPICAL
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bool "Typical OMAP configuration"
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default y
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select AEABI
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select HIGHMEM
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select I2C
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select I2C_OMAP
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select MENELAUS if ARCH_OMAP2
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2013-02-07 14:51:46 +04:00
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select NEON if CPU_V7
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2013-05-01 02:02:26 +04:00
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select REGULATOR
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2015-11-26 18:22:23 +03:00
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select REGULATOR_FIXED_VOLTAGE
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2013-05-01 02:02:26 +04:00
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select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4
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select TWL4030_POWER if ARCH_OMAP3 || ARCH_OMAP4
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select VFP
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help
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Compile a kernel suitable for booting most boards
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config SOC_HAS_OMAP2_SDRC
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bool "OMAP2 SDRAM Controller support"
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config SOC_HAS_REALTIME_COUNTER
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bool "Real time free running counter"
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2013-02-07 11:55:39 +04:00
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depends on SOC_OMAP5 || SOC_DRA7XX
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2013-05-01 02:02:26 +04:00
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default y
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2005-11-10 17:26:51 +03:00
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comment "OMAP Core Type"
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2012-03-06 04:02:18 +04:00
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depends on ARCH_OMAP2
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2005-11-10 17:26:51 +03:00
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2011-01-28 03:39:40 +03:00
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config SOC_OMAP2420
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2005-11-10 17:26:51 +03:00
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bool "OMAP2420 support"
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2012-03-06 04:02:18 +04:00
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depends on ARCH_OMAP2
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2010-07-05 17:31:47 +04:00
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default y
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2006-06-27 03:16:12 +04:00
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select OMAP_DM_TIMER
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2012-07-05 19:05:15 +04:00
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select SOC_HAS_OMAP2_SDRC
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2005-11-10 17:26:51 +03:00
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2011-01-28 03:39:40 +03:00
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config SOC_OMAP2430
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2006-12-07 04:14:05 +03:00
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bool "OMAP2430 support"
|
2012-03-06 04:02:18 +04:00
|
|
|
depends on ARCH_OMAP2
|
2010-07-05 17:31:47 +04:00
|
|
|
default y
|
2012-07-05 19:05:15 +04:00
|
|
|
select SOC_HAS_OMAP2_SDRC
|
2006-12-07 04:14:05 +03:00
|
|
|
|
2011-01-28 03:39:40 +03:00
|
|
|
config SOC_OMAP3430
|
2008-10-09 18:51:41 +04:00
|
|
|
bool "OMAP3430 support"
|
2012-03-06 04:02:18 +04:00
|
|
|
depends on ARCH_OMAP3
|
2010-07-05 17:31:47 +04:00
|
|
|
default y
|
2012-07-05 19:05:15 +04:00
|
|
|
select SOC_HAS_OMAP2_SDRC
|
2008-10-09 18:51:41 +04:00
|
|
|
|
2012-05-10 22:10:07 +04:00
|
|
|
config SOC_TI81XX
|
2011-12-13 22:46:44 +04:00
|
|
|
bool "TI81XX support"
|
2012-03-06 04:02:18 +04:00
|
|
|
depends on ARCH_OMAP3
|
2011-02-16 19:31:39 +03:00
|
|
|
default y
|
|
|
|
|
|
2013-09-26 02:44:39 +04:00
|
|
|
comment "OMAP Legacy Platform Data Board Type"
|
2012-03-06 04:02:18 +04:00
|
|
|
depends on ARCH_OMAP2PLUS
|
2005-11-10 17:26:51 +03:00
|
|
|
|
|
|
|
|
config MACH_OMAP_GENERIC
|
2013-09-26 02:44:39 +04:00
|
|
|
bool
|
2005-11-10 17:26:51 +03:00
|
|
|
|
2009-08-28 21:51:37 +04:00
|
|
|
config MACH_OMAP2_TUSB6010
|
|
|
|
|
bool
|
2011-01-28 03:39:40 +03:00
|
|
|
depends on ARCH_OMAP2 && SOC_OMAP2420
|
2009-08-28 21:51:37 +04:00
|
|
|
default y if MACH_NOKIA_N8X0
|
|
|
|
|
|
2009-10-23 01:48:13 +04:00
|
|
|
config MACH_NOKIA_N810
|
|
|
|
|
bool
|
|
|
|
|
|
|
|
|
|
config MACH_NOKIA_N810_WIMAX
|
|
|
|
|
bool
|
|
|
|
|
|
2009-08-28 21:51:38 +04:00
|
|
|
config MACH_NOKIA_N8X0
|
|
|
|
|
bool "Nokia N800/N810"
|
2011-01-28 03:39:40 +03:00
|
|
|
depends on SOC_OMAP2420
|
2010-07-05 17:31:47 +04:00
|
|
|
default y
|
2009-10-23 01:48:13 +04:00
|
|
|
select MACH_NOKIA_N810
|
|
|
|
|
select MACH_NOKIA_N810_WIMAX
|
2009-08-28 21:51:38 +04:00
|
|
|
|
2009-12-09 02:33:14 +03:00
|
|
|
config OMAP3_SDRC_AC_TIMING
|
|
|
|
|
bool "Enable SDRC AC timing register changes"
|
2010-02-12 23:26:48 +03:00
|
|
|
depends on ARCH_OMAP3
|
2009-12-09 02:33:14 +03:00
|
|
|
help
|
|
|
|
|
If you know that none of your system initiators will attempt to
|
|
|
|
|
access SDRAM during CORE DVFS, select Y here. This should boost
|
|
|
|
|
SDRAM performance at lower CORE OPPs. There are relatively few
|
|
|
|
|
users who will wish to say yes at this point - almost everyone will
|
|
|
|
|
wish to say no. Selecting yes without understanding what is
|
|
|
|
|
going on could result in system crashes;
|
|
|
|
|
|
2010-07-05 17:31:47 +04:00
|
|
|
endmenu
|
|
|
|
|
|
|
|
|
|
endif
|
2014-06-10 18:06:10 +04:00
|
|
|
|
ARM: OMAP5 / DRA7: Introduce workaround for 801819
Add workaround for Cortex-A15 ARM erratum 801819 which says in summary
that "A livelock can occur in the L2 cache arbitration that might
prevent a snoop from completing. Under certain conditions this can
cause the system to deadlock. "
Recommended workaround is as follows:
Do both of the following:
1) Do not use the write-back no-allocate memory type.
2) Do not issue write-back cacheable stores at any time when the cache
is disabled (SCTLR.C=0) and the MMU is enabled (SCTLR.M=1). Because it
is implementation defined whether cacheable stores update the cache when
the cache is disabled it is not expected that any portable code will
execute cacheable stores when the cache is disabled.
For implementations of Cortex-A15 configured without the “L2 arbitration
register slice” option (typically one or two core systems), you must
also do the following:
3) Disable write-streaming in each CPU by setting ACTLR[28:25] = 0b1111
So, we provide an option to disable write streaming on OMAP5 and DRA7.
It is a rare condition to occur and may be enabled selectively based
on platform acceptance of risk.
Applies to: A15 revisions r2p0, r2p1, r2p2, r2p3 or r2p4 and REVIDR[3]
is set to 0.
Based on ARM errata Document revision 18.0 (22 Nov 2013)
Note: the configuration for the workaround needs to be done with
each CPU bringup, since CPU0 bringup is done by bootloader, it is
recommended to have the workaround in the bootloader, kernel also does
ensure that CPU0 has the workaround and makes the workaround active
when CPU1 gets active.
With CONFIG_SMP disabled, it is expected to be done by the bootloader.
This does show significant degradation in synthetic tests such as
mbw (https://packages.qa.debian.org/m/mbw.html)
mbw -n 100 100|grep AVG (on a test platform)
Without enabling the erratum:
AVG Method: MEMCPY Elapsed: 0.13406 MiB: 100.00000 Copy: 745.913 MiB/s
AVG Method: DUMB Elapsed: 0.06746 MiB: 100.00000 Copy: 1482.357 MiB/s
AVG Method: MCBLOCK Elapsed: 0.03058 MiB: 100.00000 Copy: 3270.569 MiB/s
After enabling the erratum:
AVG Method: MEMCPY Elapsed: 0.13757 MiB: 100.00000 Copy: 726.913 MiB/s
AVG Method: DUMB Elapsed: 0.12024 MiB: 100.00000 Copy: 831.668 MiB/s
AVG Method: MCBLOCK Elapsed: 0.09243 MiB: 100.00000 Copy: 1081.942 MiB/s
Most benchmarks are designed for specific performance analysis, so
overall usecase must be considered before making a decision to
enable/disable the erratum workaround.
Pending internal investigation, the erratum is kept disabled by default.
Cc: Russell King <rmk+kernel@arm.linux.org.uk>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Tony Lindgren <tony@atomide.com>
Suggested-by: Richard Woodruff <r-woodruff2@ti.com>
Suggested-by: Brad Griffis <bgriffis@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2015-08-06 18:54:24 +03:00
|
|
|
config OMAP5_ERRATA_801819
|
|
|
|
|
bool "Errata 801819: An eviction from L1 data cache might stall indefinitely"
|
|
|
|
|
depends on SOC_OMAP5 || SOC_DRA7XX
|
|
|
|
|
help
|
|
|
|
|
A livelock can occur in the L2 cache arbitration that might prevent
|
|
|
|
|
a snoop from completing. Under certain conditions this can cause the
|
|
|
|
|
system to deadlock.
|
|
|
|
|
|
2014-06-10 18:06:10 +04:00
|
|
|
endmenu
|
