2008-09-15 22:01:52 +04:00
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/*
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2010-06-18 04:19:13 +04:00
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* Afatech AF9013 demodulator driver
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2008-09-15 22:01:52 +04:00
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*
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* Copyright (C) 2007 Antti Palosaari <crope@iki.fi>
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2011-11-29 03:58:11 +04:00
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* Copyright (C) 2011 Antti Palosaari <crope@iki.fi>
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2008-09-15 22:01:52 +04:00
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*
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* Thanks to Afatech who kindly provided information.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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*/
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#include "af9013_priv.h"
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2013-11-02 12:11:47 +04:00
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/* Max transfer size done by I2C transfer functions */
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#define MAX_XFER_SIZE 64
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2008-09-15 22:01:52 +04:00
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struct af9013_state {
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struct i2c_adapter *i2c;
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2011-11-29 03:58:11 +04:00
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struct dvb_frontend fe;
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2008-09-15 22:01:52 +04:00
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struct af9013_config config;
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2010-10-07 23:34:55 +04:00
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/* tuner/demod RF and IF AGC limits used for signal strength calc */
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u8 signal_strength_en, rf_50, rf_80, if_50, if_80;
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2008-09-15 22:01:52 +04:00
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u16 signal_strength;
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u32 ber;
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u32 ucblocks;
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u16 snr;
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2011-11-29 03:58:11 +04:00
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u32 bandwidth_hz;
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2015-06-07 20:53:52 +03:00
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enum fe_status fe_status;
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2011-11-29 03:58:11 +04:00
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unsigned long set_frontend_jiffies;
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unsigned long read_status_jiffies;
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bool first_tune;
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bool i2c_gate_state;
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unsigned int statistics_step:3;
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struct delayed_work statistics_work;
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2008-09-15 22:01:52 +04:00
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};
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2011-11-29 03:58:11 +04:00
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/* write multiple registers */
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static int af9013_wr_regs_i2c(struct af9013_state *priv, u8 mbox, u16 reg,
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const u8 *val, int len)
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2008-09-15 22:01:52 +04:00
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{
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2011-11-29 03:58:11 +04:00
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int ret;
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2013-11-02 12:11:47 +04:00
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u8 buf[MAX_XFER_SIZE];
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2011-11-29 03:58:11 +04:00
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struct i2c_msg msg[1] = {
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{
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.addr = priv->config.i2c_addr,
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.flags = 0,
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2013-11-02 12:11:47 +04:00
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.len = 3 + len,
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2011-11-29 03:58:11 +04:00
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.buf = buf,
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}
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};
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2013-11-02 12:11:47 +04:00
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if (3 + len > sizeof(buf)) {
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dev_warn(&priv->i2c->dev,
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"%s: i2c wr reg=%04x: len=%d is too big!\n",
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KBUILD_MODNAME, reg, len);
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return -EINVAL;
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}
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2011-11-29 03:58:11 +04:00
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buf[0] = (reg >> 8) & 0xff;
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buf[1] = (reg >> 0) & 0xff;
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2008-09-15 22:01:52 +04:00
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buf[2] = mbox;
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memcpy(&buf[3], val, len);
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2011-11-29 03:58:11 +04:00
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ret = i2c_transfer(priv->i2c, msg, 1);
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if (ret == 1) {
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ret = 0;
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} else {
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2012-09-13 03:23:43 +04:00
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dev_warn(&priv->i2c->dev, "%s: i2c wr failed=%d reg=%04x " \
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"len=%d\n", KBUILD_MODNAME, ret, reg, len);
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2011-11-29 03:58:11 +04:00
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ret = -EREMOTEIO;
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2008-09-15 22:01:52 +04:00
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}
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2011-11-29 03:58:11 +04:00
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return ret;
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2008-09-15 22:01:52 +04:00
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}
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2011-11-29 03:58:11 +04:00
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/* read multiple registers */
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static int af9013_rd_regs_i2c(struct af9013_state *priv, u8 mbox, u16 reg,
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u8 *val, int len)
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2008-09-15 22:01:52 +04:00
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{
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2011-11-29 03:58:11 +04:00
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int ret;
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u8 buf[3];
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struct i2c_msg msg[2] = {
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{
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.addr = priv->config.i2c_addr,
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.flags = 0,
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.len = 3,
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.buf = buf,
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}, {
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.addr = priv->config.i2c_addr,
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.flags = I2C_M_RD,
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.len = len,
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.buf = val,
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}
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};
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buf[0] = (reg >> 8) & 0xff;
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buf[1] = (reg >> 0) & 0xff;
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buf[2] = mbox;
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ret = i2c_transfer(priv->i2c, msg, 2);
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if (ret == 2) {
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ret = 0;
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} else {
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2012-09-13 03:23:43 +04:00
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dev_warn(&priv->i2c->dev, "%s: i2c rd failed=%d reg=%04x " \
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"len=%d\n", KBUILD_MODNAME, ret, reg, len);
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2011-11-29 03:58:11 +04:00
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ret = -EREMOTEIO;
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}
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return ret;
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2008-09-15 22:01:52 +04:00
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}
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2011-11-29 03:58:11 +04:00
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/* write multiple registers */
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static int af9013_wr_regs(struct af9013_state *priv, u16 reg, const u8 *val,
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int len)
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2008-09-15 22:01:52 +04:00
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{
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2011-11-29 03:58:11 +04:00
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int ret, i;
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u8 mbox = (0 << 7)|(0 << 6)|(1 << 1)|(1 << 0);
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2012-01-05 09:23:28 +04:00
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if ((priv->config.ts_mode == AF9013_TS_USB) &&
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((reg & 0xff00) != 0xff00) && ((reg & 0xff00) != 0xae00)) {
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2011-11-29 03:58:11 +04:00
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mbox |= ((len - 1) << 2);
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ret = af9013_wr_regs_i2c(priv, mbox, reg, val, len);
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} else {
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for (i = 0; i < len; i++) {
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ret = af9013_wr_regs_i2c(priv, mbox, reg+i, val+i, 1);
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if (ret)
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goto err;
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}
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}
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err:
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return 0;
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}
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/* read multiple registers */
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static int af9013_rd_regs(struct af9013_state *priv, u16 reg, u8 *val, int len)
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{
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int ret, i;
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u8 mbox = (0 << 7)|(0 << 6)|(1 << 1)|(0 << 0);
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2012-01-05 09:23:28 +04:00
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if ((priv->config.ts_mode == AF9013_TS_USB) &&
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((reg & 0xff00) != 0xff00) && ((reg & 0xff00) != 0xae00)) {
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2011-11-29 03:58:11 +04:00
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mbox |= ((len - 1) << 2);
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ret = af9013_rd_regs_i2c(priv, mbox, reg, val, len);
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} else {
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for (i = 0; i < len; i++) {
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ret = af9013_rd_regs_i2c(priv, mbox, reg+i, val+i, 1);
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if (ret)
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goto err;
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}
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}
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err:
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return 0;
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2008-09-15 22:01:52 +04:00
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}
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/* write single register */
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2011-11-29 03:58:11 +04:00
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static int af9013_wr_reg(struct af9013_state *priv, u16 reg, u8 val)
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2008-09-15 22:01:52 +04:00
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{
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2011-11-29 03:58:11 +04:00
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return af9013_wr_regs(priv, reg, &val, 1);
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2008-09-15 22:01:52 +04:00
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}
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/* read single register */
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2011-11-29 03:58:11 +04:00
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static int af9013_rd_reg(struct af9013_state *priv, u16 reg, u8 *val)
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2008-09-15 22:01:52 +04:00
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{
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2011-11-29 03:58:11 +04:00
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return af9013_rd_regs(priv, reg, val, 1);
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}
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2008-09-15 22:01:52 +04:00
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2011-11-29 03:58:11 +04:00
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static int af9013_write_ofsm_regs(struct af9013_state *state, u16 reg, u8 *val,
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u8 len)
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{
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u8 mbox = (1 << 7)|(1 << 6)|((len - 1) << 2)|(1 << 1)|(1 << 0);
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return af9013_wr_regs_i2c(state, mbox, reg, val, len);
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2008-09-15 22:01:52 +04:00
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}
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2011-11-29 03:58:11 +04:00
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static int af9013_wr_reg_bits(struct af9013_state *state, u16 reg, int pos,
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int len, u8 val)
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2008-09-15 22:01:52 +04:00
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{
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int ret;
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u8 tmp, mask;
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2011-11-29 03:58:11 +04:00
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/* no need for read if whole reg is written */
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if (len != 8) {
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ret = af9013_rd_reg(state, reg, &tmp);
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if (ret)
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return ret;
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2008-09-15 22:01:52 +04:00
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2011-11-29 03:58:11 +04:00
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mask = (0xff >> (8 - len)) << pos;
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val <<= pos;
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tmp &= ~mask;
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val |= tmp;
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}
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2008-09-15 22:01:52 +04:00
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2011-11-29 03:58:11 +04:00
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return af9013_wr_reg(state, reg, val);
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2008-09-15 22:01:52 +04:00
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}
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2011-11-29 03:58:11 +04:00
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static int af9013_rd_reg_bits(struct af9013_state *state, u16 reg, int pos,
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int len, u8 *val)
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2008-09-15 22:01:52 +04:00
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{
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int ret;
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u8 tmp;
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2011-11-29 03:58:11 +04:00
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ret = af9013_rd_reg(state, reg, &tmp);
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2008-09-15 22:01:52 +04:00
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if (ret)
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return ret;
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2011-11-29 03:58:11 +04:00
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*val = (tmp >> pos);
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*val &= (0xff >> (8 - len));
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2008-09-15 22:01:52 +04:00
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return 0;
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}
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static int af9013_set_gpio(struct af9013_state *state, u8 gpio, u8 gpioval)
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{
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int ret;
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u8 pos;
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u16 addr;
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2012-09-13 03:23:43 +04:00
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dev_dbg(&state->i2c->dev, "%s: gpio=%d gpioval=%02x\n",
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__func__, gpio, gpioval);
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2011-11-29 03:58:11 +04:00
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/*
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* GPIO0 & GPIO1 0xd735
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* GPIO2 & GPIO3 0xd736
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*/
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2008-09-15 22:01:52 +04:00
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switch (gpio) {
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case 0:
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case 1:
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addr = 0xd735;
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break;
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case 2:
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case 3:
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addr = 0xd736;
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break;
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default:
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2012-09-13 03:23:43 +04:00
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dev_err(&state->i2c->dev, "%s: invalid gpio=%d\n",
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KBUILD_MODNAME, gpio);
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2008-09-15 22:01:52 +04:00
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ret = -EINVAL;
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2011-11-29 03:58:11 +04:00
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goto err;
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2012-09-28 12:37:22 +04:00
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}
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2008-09-15 22:01:52 +04:00
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switch (gpio) {
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case 0:
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case 2:
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pos = 0;
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break;
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case 1:
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case 3:
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default:
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pos = 4;
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break;
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2012-09-28 12:37:22 +04:00
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}
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2008-09-15 22:01:52 +04:00
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2011-11-29 03:58:11 +04:00
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ret = af9013_wr_reg_bits(state, addr, pos, 4, gpioval);
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if (ret)
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goto err;
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2008-09-15 22:01:52 +04:00
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2011-11-29 03:58:11 +04:00
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return ret;
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err:
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2012-09-13 03:23:43 +04:00
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dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
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2008-09-15 22:01:52 +04:00
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return ret;
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}
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2012-09-13 03:23:43 +04:00
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static u32 af9013_div(struct af9013_state *state, u32 a, u32 b, u32 x)
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2008-09-15 22:01:52 +04:00
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{
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u32 r = 0, c = 0, i;
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2011-11-29 03:58:11 +04:00
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2012-09-13 03:23:43 +04:00
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dev_dbg(&state->i2c->dev, "%s: a=%d b=%d x=%d\n", __func__, a, b, x);
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2008-09-15 22:01:52 +04:00
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if (a > b) {
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c = a / b;
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a = a - c * b;
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}
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for (i = 0; i < x; i++) {
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if (a >= b) {
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r += 1;
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a -= b;
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}
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a <<= 1;
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r <<= 1;
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}
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r = (c << (u32)x) + r;
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|
2012-09-13 03:23:43 +04:00
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dev_dbg(&state->i2c->dev, "%s: a=%d b=%d x=%d r=%d r=%x\n",
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__func__, a, b, x, r, r);
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2008-09-15 22:01:52 +04:00
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return r;
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}
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|
2011-11-29 03:58:11 +04:00
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static int af9013_power_ctrl(struct af9013_state *state, u8 onoff)
|
2008-09-15 22:01:52 +04:00
|
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{
|
2011-11-29 03:58:11 +04:00
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int ret, i;
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u8 tmp;
|
2010-09-13 03:48:58 +04:00
|
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2012-09-13 03:23:43 +04:00
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dev_dbg(&state->i2c->dev, "%s: onoff=%d\n", __func__, onoff);
|
2011-11-29 03:58:11 +04:00
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|
/* enable reset */
|
|
|
|
ret = af9013_wr_reg_bits(state, 0xd417, 4, 1, 1);
|
|
|
|
if (ret)
|
|
|
|
goto err;
|
|
|
|
|
|
|
|
/* start reset mechanism */
|
|
|
|
ret = af9013_wr_reg(state, 0xaeff, 1);
|
|
|
|
if (ret)
|
|
|
|
goto err;
|
|
|
|
|
|
|
|
/* wait reset performs */
|
|
|
|
for (i = 0; i < 150; i++) {
|
|
|
|
ret = af9013_rd_reg_bits(state, 0xd417, 1, 1, &tmp);
|
|
|
|
if (ret)
|
|
|
|
goto err;
|
|
|
|
|
|
|
|
if (tmp)
|
|
|
|
break; /* reset done */
|
|
|
|
|
|
|
|
usleep_range(5000, 25000);
|
2008-09-15 22:01:52 +04:00
|
|
|
}
|
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
if (!tmp)
|
|
|
|
return -ETIMEDOUT;
|
2008-09-15 22:01:52 +04:00
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
if (onoff) {
|
|
|
|
/* clear reset */
|
|
|
|
ret = af9013_wr_reg_bits(state, 0xd417, 1, 1, 0);
|
2008-09-15 22:01:52 +04:00
|
|
|
if (ret)
|
2011-11-29 03:58:11 +04:00
|
|
|
goto err;
|
|
|
|
|
|
|
|
/* disable reset */
|
|
|
|
ret = af9013_wr_reg_bits(state, 0xd417, 4, 1, 0);
|
|
|
|
|
|
|
|
/* power on */
|
|
|
|
ret = af9013_wr_reg_bits(state, 0xd73a, 3, 1, 0);
|
|
|
|
} else {
|
|
|
|
/* power off */
|
|
|
|
ret = af9013_wr_reg_bits(state, 0xd73a, 3, 1, 1);
|
2008-09-15 22:01:52 +04:00
|
|
|
}
|
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
return ret;
|
|
|
|
err:
|
2012-09-13 03:23:43 +04:00
|
|
|
dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
|
2008-09-15 22:01:52 +04:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
static int af9013_statistics_ber_unc_start(struct dvb_frontend *fe)
|
2008-09-15 22:01:52 +04:00
|
|
|
{
|
2011-11-29 03:58:11 +04:00
|
|
|
struct af9013_state *state = fe->demodulator_priv;
|
2008-09-15 22:01:52 +04:00
|
|
|
int ret;
|
|
|
|
|
2012-09-13 03:23:43 +04:00
|
|
|
dev_dbg(&state->i2c->dev, "%s:\n", __func__);
|
2008-09-15 22:01:52 +04:00
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
/* reset and start BER counter */
|
|
|
|
ret = af9013_wr_reg_bits(state, 0xd391, 4, 1, 1);
|
|
|
|
if (ret)
|
|
|
|
goto err;
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
err:
|
2012-09-13 03:23:43 +04:00
|
|
|
dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
|
2011-11-29 03:58:11 +04:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int af9013_statistics_ber_unc_result(struct dvb_frontend *fe)
|
|
|
|
{
|
|
|
|
struct af9013_state *state = fe->demodulator_priv;
|
|
|
|
int ret;
|
|
|
|
u8 buf[5];
|
|
|
|
|
2012-09-13 03:23:43 +04:00
|
|
|
dev_dbg(&state->i2c->dev, "%s:\n", __func__);
|
2011-11-29 03:58:11 +04:00
|
|
|
|
|
|
|
/* check if error bit count is ready */
|
|
|
|
ret = af9013_rd_reg_bits(state, 0xd391, 4, 1, &buf[0]);
|
|
|
|
if (ret)
|
|
|
|
goto err;
|
|
|
|
|
|
|
|
if (!buf[0]) {
|
2012-09-13 03:23:43 +04:00
|
|
|
dev_dbg(&state->i2c->dev, "%s: not ready\n", __func__);
|
2011-11-29 03:58:11 +04:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = af9013_rd_regs(state, 0xd387, buf, 5);
|
|
|
|
if (ret)
|
|
|
|
goto err;
|
|
|
|
|
|
|
|
state->ber = (buf[2] << 16) | (buf[1] << 8) | buf[0];
|
|
|
|
state->ucblocks += (buf[4] << 8) | buf[3];
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
err:
|
2012-09-13 03:23:43 +04:00
|
|
|
dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
|
2011-11-29 03:58:11 +04:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int af9013_statistics_snr_start(struct dvb_frontend *fe)
|
|
|
|
{
|
|
|
|
struct af9013_state *state = fe->demodulator_priv;
|
|
|
|
int ret;
|
|
|
|
|
2012-09-13 03:23:43 +04:00
|
|
|
dev_dbg(&state->i2c->dev, "%s:\n", __func__);
|
2011-11-29 03:58:11 +04:00
|
|
|
|
|
|
|
/* start SNR meas */
|
|
|
|
ret = af9013_wr_reg_bits(state, 0xd2e1, 3, 1, 1);
|
|
|
|
if (ret)
|
|
|
|
goto err;
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
err:
|
2012-09-13 03:23:43 +04:00
|
|
|
dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
|
2011-11-29 03:58:11 +04:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int af9013_statistics_snr_result(struct dvb_frontend *fe)
|
|
|
|
{
|
|
|
|
struct af9013_state *state = fe->demodulator_priv;
|
|
|
|
int ret, i, len;
|
|
|
|
u8 buf[3], tmp;
|
|
|
|
u32 snr_val;
|
|
|
|
const struct af9013_snr *uninitialized_var(snr_lut);
|
|
|
|
|
2012-09-13 03:23:43 +04:00
|
|
|
dev_dbg(&state->i2c->dev, "%s:\n", __func__);
|
2011-11-29 03:58:11 +04:00
|
|
|
|
|
|
|
/* check if SNR ready */
|
|
|
|
ret = af9013_rd_reg_bits(state, 0xd2e1, 3, 1, &tmp);
|
|
|
|
if (ret)
|
|
|
|
goto err;
|
|
|
|
|
|
|
|
if (!tmp) {
|
2012-09-13 03:23:43 +04:00
|
|
|
dev_dbg(&state->i2c->dev, "%s: not ready\n", __func__);
|
2011-11-29 03:58:11 +04:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* read value */
|
|
|
|
ret = af9013_rd_regs(state, 0xd2e3, buf, 3);
|
|
|
|
if (ret)
|
|
|
|
goto err;
|
|
|
|
|
|
|
|
snr_val = (buf[2] << 16) | (buf[1] << 8) | buf[0];
|
|
|
|
|
|
|
|
/* read current modulation */
|
|
|
|
ret = af9013_rd_reg(state, 0xd3c1, &tmp);
|
|
|
|
if (ret)
|
|
|
|
goto err;
|
|
|
|
|
|
|
|
switch ((tmp >> 6) & 3) {
|
|
|
|
case 0:
|
|
|
|
len = ARRAY_SIZE(qpsk_snr_lut);
|
|
|
|
snr_lut = qpsk_snr_lut;
|
2008-09-15 22:01:52 +04:00
|
|
|
break;
|
2011-11-29 03:58:11 +04:00
|
|
|
case 1:
|
|
|
|
len = ARRAY_SIZE(qam16_snr_lut);
|
|
|
|
snr_lut = qam16_snr_lut;
|
2008-09-15 22:01:52 +04:00
|
|
|
break;
|
2011-11-29 03:58:11 +04:00
|
|
|
case 2:
|
|
|
|
len = ARRAY_SIZE(qam64_snr_lut);
|
|
|
|
snr_lut = qam64_snr_lut;
|
2008-09-15 22:01:52 +04:00
|
|
|
break;
|
|
|
|
default:
|
2011-11-29 03:58:11 +04:00
|
|
|
goto err;
|
2008-09-15 22:01:52 +04:00
|
|
|
}
|
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
for (i = 0; i < len; i++) {
|
|
|
|
tmp = snr_lut[i].snr;
|
2008-09-15 22:01:52 +04:00
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
if (snr_val < snr_lut[i].val)
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
state->snr = tmp * 10; /* dB/10 */
|
2008-09-15 22:01:52 +04:00
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
return ret;
|
|
|
|
err:
|
2012-09-13 03:23:43 +04:00
|
|
|
dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
|
2011-11-29 03:58:11 +04:00
|
|
|
return ret;
|
|
|
|
}
|
2008-09-15 22:01:52 +04:00
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
static int af9013_statistics_signal_strength(struct dvb_frontend *fe)
|
|
|
|
{
|
|
|
|
struct af9013_state *state = fe->demodulator_priv;
|
|
|
|
int ret = 0;
|
|
|
|
u8 buf[2], rf_gain, if_gain;
|
|
|
|
int signal_strength;
|
|
|
|
|
2012-09-13 03:23:43 +04:00
|
|
|
dev_dbg(&state->i2c->dev, "%s:\n", __func__);
|
2011-11-29 03:58:11 +04:00
|
|
|
|
|
|
|
if (!state->signal_strength_en)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
ret = af9013_rd_regs(state, 0xd07c, buf, 2);
|
|
|
|
if (ret)
|
|
|
|
goto err;
|
|
|
|
|
|
|
|
rf_gain = buf[0];
|
|
|
|
if_gain = buf[1];
|
|
|
|
|
|
|
|
signal_strength = (0xffff / \
|
|
|
|
(9 * (state->rf_50 + state->if_50) - \
|
|
|
|
11 * (state->rf_80 + state->if_80))) * \
|
|
|
|
(10 * (rf_gain + if_gain) - \
|
|
|
|
11 * (state->rf_80 + state->if_80));
|
|
|
|
if (signal_strength < 0)
|
|
|
|
signal_strength = 0;
|
|
|
|
else if (signal_strength > 0xffff)
|
|
|
|
signal_strength = 0xffff;
|
|
|
|
|
|
|
|
state->signal_strength = signal_strength;
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
err:
|
2012-09-13 03:23:43 +04:00
|
|
|
dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
|
2008-09-15 22:01:52 +04:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
static void af9013_statistics_work(struct work_struct *work)
|
2008-09-15 22:01:52 +04:00
|
|
|
{
|
2011-11-29 03:58:11 +04:00
|
|
|
struct af9013_state *state = container_of(work,
|
|
|
|
struct af9013_state, statistics_work.work);
|
|
|
|
unsigned int next_msec;
|
|
|
|
|
|
|
|
/* update only signal strength when demod is not locked */
|
|
|
|
if (!(state->fe_status & FE_HAS_LOCK)) {
|
|
|
|
state->statistics_step = 0;
|
|
|
|
state->ber = 0;
|
|
|
|
state->snr = 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
switch (state->statistics_step) {
|
|
|
|
default:
|
|
|
|
state->statistics_step = 0;
|
|
|
|
case 0:
|
2012-04-20 15:04:48 +04:00
|
|
|
af9013_statistics_signal_strength(&state->fe);
|
2011-11-29 03:58:11 +04:00
|
|
|
state->statistics_step++;
|
|
|
|
next_msec = 300;
|
|
|
|
break;
|
|
|
|
case 1:
|
2012-04-20 15:04:48 +04:00
|
|
|
af9013_statistics_snr_start(&state->fe);
|
2011-11-29 03:58:11 +04:00
|
|
|
state->statistics_step++;
|
|
|
|
next_msec = 200;
|
|
|
|
break;
|
|
|
|
case 2:
|
2012-04-20 15:04:48 +04:00
|
|
|
af9013_statistics_ber_unc_start(&state->fe);
|
2011-11-29 03:58:11 +04:00
|
|
|
state->statistics_step++;
|
|
|
|
next_msec = 1000;
|
|
|
|
break;
|
|
|
|
case 3:
|
2012-04-20 15:04:48 +04:00
|
|
|
af9013_statistics_snr_result(&state->fe);
|
2011-11-29 03:58:11 +04:00
|
|
|
state->statistics_step++;
|
|
|
|
next_msec = 400;
|
|
|
|
break;
|
|
|
|
case 4:
|
2012-04-20 15:04:48 +04:00
|
|
|
af9013_statistics_ber_unc_result(&state->fe);
|
2011-11-29 03:58:11 +04:00
|
|
|
state->statistics_step++;
|
|
|
|
next_msec = 100;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
schedule_delayed_work(&state->statistics_work,
|
|
|
|
msecs_to_jiffies(next_msec));
|
|
|
|
}
|
|
|
|
|
|
|
|
static int af9013_get_tune_settings(struct dvb_frontend *fe,
|
|
|
|
struct dvb_frontend_tune_settings *fesettings)
|
|
|
|
{
|
|
|
|
fesettings->min_delay_ms = 800;
|
|
|
|
fesettings->step_size = 0;
|
|
|
|
fesettings->max_drift = 0;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2011-12-31 05:25:27 +04:00
|
|
|
static int af9013_set_frontend(struct dvb_frontend *fe)
|
2011-11-29 03:58:11 +04:00
|
|
|
{
|
|
|
|
struct af9013_state *state = fe->demodulator_priv;
|
|
|
|
struct dtv_frontend_properties *c = &fe->dtv_property_cache;
|
|
|
|
int ret, i, sampling_freq;
|
|
|
|
bool auto_mode, spec_inv;
|
|
|
|
u8 buf[6];
|
|
|
|
u32 if_frequency, freq_cw;
|
|
|
|
|
2012-09-13 03:23:43 +04:00
|
|
|
dev_dbg(&state->i2c->dev, "%s: frequency=%d bandwidth_hz=%d\n",
|
|
|
|
__func__, c->frequency, c->bandwidth_hz);
|
2011-11-29 03:58:11 +04:00
|
|
|
|
|
|
|
/* program tuner */
|
|
|
|
if (fe->ops.tuner_ops.set_params)
|
2011-12-24 19:24:33 +04:00
|
|
|
fe->ops.tuner_ops.set_params(fe);
|
2011-11-29 03:58:11 +04:00
|
|
|
|
|
|
|
/* program CFOE coefficients */
|
|
|
|
if (c->bandwidth_hz != state->bandwidth_hz) {
|
|
|
|
for (i = 0; i < ARRAY_SIZE(coeff_lut); i++) {
|
|
|
|
if (coeff_lut[i].clock == state->config.clock &&
|
|
|
|
coeff_lut[i].bandwidth_hz == c->bandwidth_hz) {
|
|
|
|
break;
|
|
|
|
}
|
2008-09-15 22:01:52 +04:00
|
|
|
}
|
|
|
|
|
2015-04-29 01:02:19 +03:00
|
|
|
/* Return an error if can't find bandwidth or the right clock */
|
|
|
|
if (i == ARRAY_SIZE(coeff_lut))
|
|
|
|
return -EINVAL;
|
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
ret = af9013_wr_regs(state, 0xae00, coeff_lut[i].val,
|
|
|
|
sizeof(coeff_lut[i].val));
|
|
|
|
}
|
2011-11-13 07:26:17 +04:00
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
/* program frequency control */
|
|
|
|
if (c->bandwidth_hz != state->bandwidth_hz || state->first_tune) {
|
2011-11-13 07:26:17 +04:00
|
|
|
/* get used IF frequency */
|
|
|
|
if (fe->ops.tuner_ops.get_if_frequency)
|
2011-11-29 03:58:11 +04:00
|
|
|
fe->ops.tuner_ops.get_if_frequency(fe, &if_frequency);
|
2011-11-13 07:26:17 +04:00
|
|
|
else
|
2011-11-29 03:58:11 +04:00
|
|
|
if_frequency = state->config.if_frequency;
|
2008-09-15 22:01:52 +04:00
|
|
|
|
2012-09-13 03:23:43 +04:00
|
|
|
dev_dbg(&state->i2c->dev, "%s: if_frequency=%d\n",
|
|
|
|
__func__, if_frequency);
|
2012-09-03 01:47:25 +04:00
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
sampling_freq = if_frequency;
|
2008-09-15 22:01:52 +04:00
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
while (sampling_freq > (state->config.clock / 2))
|
|
|
|
sampling_freq -= state->config.clock;
|
2008-09-15 22:01:52 +04:00
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
if (sampling_freq < 0) {
|
|
|
|
sampling_freq *= -1;
|
|
|
|
spec_inv = state->config.spec_inv;
|
|
|
|
} else {
|
|
|
|
spec_inv = !state->config.spec_inv;
|
|
|
|
}
|
2008-09-15 22:01:52 +04:00
|
|
|
|
2012-09-13 03:23:43 +04:00
|
|
|
freq_cw = af9013_div(state, sampling_freq, state->config.clock,
|
|
|
|
23);
|
2008-09-15 22:01:52 +04:00
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
if (spec_inv)
|
|
|
|
freq_cw = 0x800000 - freq_cw;
|
2008-09-15 22:01:52 +04:00
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
buf[0] = (freq_cw >> 0) & 0xff;
|
|
|
|
buf[1] = (freq_cw >> 8) & 0xff;
|
|
|
|
buf[2] = (freq_cw >> 16) & 0x7f;
|
2008-09-15 22:01:52 +04:00
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
freq_cw = 0x800000 - freq_cw;
|
2008-09-15 22:01:52 +04:00
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
buf[3] = (freq_cw >> 0) & 0xff;
|
|
|
|
buf[4] = (freq_cw >> 8) & 0xff;
|
|
|
|
buf[5] = (freq_cw >> 16) & 0x7f;
|
|
|
|
|
|
|
|
ret = af9013_wr_regs(state, 0xd140, buf, 3);
|
|
|
|
if (ret)
|
|
|
|
goto err;
|
|
|
|
|
|
|
|
ret = af9013_wr_regs(state, 0x9be7, buf, 6);
|
|
|
|
if (ret)
|
|
|
|
goto err;
|
2008-09-15 22:01:52 +04:00
|
|
|
}
|
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
/* clear TPS lock flag */
|
|
|
|
ret = af9013_wr_reg_bits(state, 0xd330, 3, 1, 1);
|
|
|
|
if (ret)
|
|
|
|
goto err;
|
2008-09-15 22:01:52 +04:00
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
/* clear MPEG2 lock flag */
|
|
|
|
ret = af9013_wr_reg_bits(state, 0xd507, 6, 1, 0);
|
|
|
|
if (ret)
|
|
|
|
goto err;
|
2009-07-11 03:03:43 +04:00
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
/* empty channel function */
|
|
|
|
ret = af9013_wr_reg_bits(state, 0x9bfe, 0, 1, 0);
|
|
|
|
if (ret)
|
|
|
|
goto err;
|
|
|
|
|
|
|
|
/* empty DVB-T channel function */
|
|
|
|
ret = af9013_wr_reg_bits(state, 0x9bc2, 0, 1, 0);
|
|
|
|
if (ret)
|
|
|
|
goto err;
|
|
|
|
|
|
|
|
/* transmission parameters */
|
|
|
|
auto_mode = false;
|
|
|
|
memset(buf, 0, 3);
|
|
|
|
|
|
|
|
switch (c->transmission_mode) {
|
2008-09-15 22:01:52 +04:00
|
|
|
case TRANSMISSION_MODE_AUTO:
|
2014-09-03 22:20:50 +04:00
|
|
|
auto_mode = true;
|
2011-11-29 03:58:11 +04:00
|
|
|
break;
|
2008-09-15 22:01:52 +04:00
|
|
|
case TRANSMISSION_MODE_2K:
|
|
|
|
break;
|
|
|
|
case TRANSMISSION_MODE_8K:
|
|
|
|
buf[0] |= (1 << 0);
|
|
|
|
break;
|
|
|
|
default:
|
2012-09-13 03:23:43 +04:00
|
|
|
dev_dbg(&state->i2c->dev, "%s: invalid transmission_mode\n",
|
|
|
|
__func__);
|
2014-09-03 22:20:50 +04:00
|
|
|
auto_mode = true;
|
2008-09-15 22:01:52 +04:00
|
|
|
}
|
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
switch (c->guard_interval) {
|
2008-09-15 22:01:52 +04:00
|
|
|
case GUARD_INTERVAL_AUTO:
|
2014-09-03 22:20:50 +04:00
|
|
|
auto_mode = true;
|
2011-11-29 03:58:11 +04:00
|
|
|
break;
|
2008-09-15 22:01:52 +04:00
|
|
|
case GUARD_INTERVAL_1_32:
|
|
|
|
break;
|
|
|
|
case GUARD_INTERVAL_1_16:
|
|
|
|
buf[0] |= (1 << 2);
|
|
|
|
break;
|
|
|
|
case GUARD_INTERVAL_1_8:
|
|
|
|
buf[0] |= (2 << 2);
|
|
|
|
break;
|
|
|
|
case GUARD_INTERVAL_1_4:
|
|
|
|
buf[0] |= (3 << 2);
|
|
|
|
break;
|
|
|
|
default:
|
2012-09-13 03:23:43 +04:00
|
|
|
dev_dbg(&state->i2c->dev, "%s: invalid guard_interval\n",
|
|
|
|
__func__);
|
2014-09-03 22:20:50 +04:00
|
|
|
auto_mode = true;
|
2008-09-15 22:01:52 +04:00
|
|
|
}
|
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
switch (c->hierarchy) {
|
2008-09-15 22:01:52 +04:00
|
|
|
case HIERARCHY_AUTO:
|
2014-09-03 22:20:50 +04:00
|
|
|
auto_mode = true;
|
2011-11-29 03:58:11 +04:00
|
|
|
break;
|
2008-09-15 22:01:52 +04:00
|
|
|
case HIERARCHY_NONE:
|
|
|
|
break;
|
|
|
|
case HIERARCHY_1:
|
|
|
|
buf[0] |= (1 << 4);
|
|
|
|
break;
|
|
|
|
case HIERARCHY_2:
|
|
|
|
buf[0] |= (2 << 4);
|
|
|
|
break;
|
|
|
|
case HIERARCHY_4:
|
|
|
|
buf[0] |= (3 << 4);
|
|
|
|
break;
|
|
|
|
default:
|
2012-09-13 03:23:43 +04:00
|
|
|
dev_dbg(&state->i2c->dev, "%s: invalid hierarchy\n", __func__);
|
2014-09-03 22:20:50 +04:00
|
|
|
auto_mode = true;
|
2012-09-28 12:37:22 +04:00
|
|
|
}
|
2008-09-15 22:01:52 +04:00
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
switch (c->modulation) {
|
2008-09-15 22:01:52 +04:00
|
|
|
case QAM_AUTO:
|
2014-09-03 22:20:50 +04:00
|
|
|
auto_mode = true;
|
2011-11-29 03:58:11 +04:00
|
|
|
break;
|
2008-09-15 22:01:52 +04:00
|
|
|
case QPSK:
|
|
|
|
break;
|
|
|
|
case QAM_16:
|
|
|
|
buf[1] |= (1 << 6);
|
|
|
|
break;
|
|
|
|
case QAM_64:
|
|
|
|
buf[1] |= (2 << 6);
|
|
|
|
break;
|
|
|
|
default:
|
2012-09-13 03:23:43 +04:00
|
|
|
dev_dbg(&state->i2c->dev, "%s: invalid modulation\n", __func__);
|
2014-09-03 22:20:50 +04:00
|
|
|
auto_mode = true;
|
2008-09-15 22:01:52 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Use HP. How and which case we can switch to LP? */
|
|
|
|
buf[1] |= (1 << 4);
|
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
switch (c->code_rate_HP) {
|
2008-09-15 22:01:52 +04:00
|
|
|
case FEC_AUTO:
|
2014-09-03 22:20:50 +04:00
|
|
|
auto_mode = true;
|
2011-11-29 03:58:11 +04:00
|
|
|
break;
|
2008-09-15 22:01:52 +04:00
|
|
|
case FEC_1_2:
|
|
|
|
break;
|
|
|
|
case FEC_2_3:
|
|
|
|
buf[2] |= (1 << 0);
|
|
|
|
break;
|
|
|
|
case FEC_3_4:
|
|
|
|
buf[2] |= (2 << 0);
|
|
|
|
break;
|
|
|
|
case FEC_5_6:
|
|
|
|
buf[2] |= (3 << 0);
|
|
|
|
break;
|
|
|
|
case FEC_7_8:
|
|
|
|
buf[2] |= (4 << 0);
|
|
|
|
break;
|
|
|
|
default:
|
2012-09-13 03:23:43 +04:00
|
|
|
dev_dbg(&state->i2c->dev, "%s: invalid code_rate_HP\n",
|
|
|
|
__func__);
|
2014-09-03 22:20:50 +04:00
|
|
|
auto_mode = true;
|
2008-09-15 22:01:52 +04:00
|
|
|
}
|
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
switch (c->code_rate_LP) {
|
2008-09-15 22:01:52 +04:00
|
|
|
case FEC_AUTO:
|
2014-09-03 22:20:50 +04:00
|
|
|
auto_mode = true;
|
2011-11-29 03:58:11 +04:00
|
|
|
break;
|
2008-09-15 22:01:52 +04:00
|
|
|
case FEC_1_2:
|
|
|
|
break;
|
|
|
|
case FEC_2_3:
|
|
|
|
buf[2] |= (1 << 3);
|
|
|
|
break;
|
|
|
|
case FEC_3_4:
|
|
|
|
buf[2] |= (2 << 3);
|
|
|
|
break;
|
|
|
|
case FEC_5_6:
|
|
|
|
buf[2] |= (3 << 3);
|
|
|
|
break;
|
|
|
|
case FEC_7_8:
|
|
|
|
buf[2] |= (4 << 3);
|
|
|
|
break;
|
|
|
|
case FEC_NONE:
|
2011-11-29 03:58:11 +04:00
|
|
|
break;
|
2008-09-15 22:01:52 +04:00
|
|
|
default:
|
2012-09-13 03:23:43 +04:00
|
|
|
dev_dbg(&state->i2c->dev, "%s: invalid code_rate_LP\n",
|
|
|
|
__func__);
|
2014-09-03 22:20:50 +04:00
|
|
|
auto_mode = true;
|
2008-09-15 22:01:52 +04:00
|
|
|
}
|
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
switch (c->bandwidth_hz) {
|
|
|
|
case 6000000:
|
2008-09-15 22:01:52 +04:00
|
|
|
break;
|
2011-11-29 03:58:11 +04:00
|
|
|
case 7000000:
|
2008-09-15 22:01:52 +04:00
|
|
|
buf[1] |= (1 << 2);
|
|
|
|
break;
|
2011-11-29 03:58:11 +04:00
|
|
|
case 8000000:
|
2008-09-15 22:01:52 +04:00
|
|
|
buf[1] |= (2 << 2);
|
|
|
|
break;
|
|
|
|
default:
|
2012-09-13 03:23:43 +04:00
|
|
|
dev_dbg(&state->i2c->dev, "%s: invalid bandwidth_hz\n",
|
|
|
|
__func__);
|
2011-11-29 03:58:11 +04:00
|
|
|
ret = -EINVAL;
|
|
|
|
goto err;
|
2008-09-15 22:01:52 +04:00
|
|
|
}
|
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
ret = af9013_wr_regs(state, 0xd3c0, buf, 3);
|
2008-09-15 22:01:52 +04:00
|
|
|
if (ret)
|
2011-11-29 03:58:11 +04:00
|
|
|
goto err;
|
2008-09-15 22:01:52 +04:00
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
if (auto_mode) {
|
|
|
|
/* clear easy mode flag */
|
|
|
|
ret = af9013_wr_reg(state, 0xaefd, 0);
|
2008-09-15 22:01:52 +04:00
|
|
|
if (ret)
|
2011-11-29 03:58:11 +04:00
|
|
|
goto err;
|
2008-09-15 22:01:52 +04:00
|
|
|
|
2012-09-13 03:23:43 +04:00
|
|
|
dev_dbg(&state->i2c->dev, "%s: auto params\n", __func__);
|
2008-09-15 22:01:52 +04:00
|
|
|
} else {
|
2011-11-29 03:58:11 +04:00
|
|
|
/* set easy mode flag */
|
|
|
|
ret = af9013_wr_reg(state, 0xaefd, 1);
|
2008-09-15 22:01:52 +04:00
|
|
|
if (ret)
|
2011-11-29 03:58:11 +04:00
|
|
|
goto err;
|
2008-09-15 22:01:52 +04:00
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
ret = af9013_wr_reg(state, 0xaefe, 0);
|
2008-09-15 22:01:52 +04:00
|
|
|
if (ret)
|
2011-11-29 03:58:11 +04:00
|
|
|
goto err;
|
|
|
|
|
2012-09-13 03:23:43 +04:00
|
|
|
dev_dbg(&state->i2c->dev, "%s: manual params\n", __func__);
|
2008-09-15 22:01:52 +04:00
|
|
|
}
|
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
/* tune */
|
|
|
|
ret = af9013_wr_reg(state, 0xffff, 0);
|
2008-09-15 22:01:52 +04:00
|
|
|
if (ret)
|
2011-11-29 03:58:11 +04:00
|
|
|
goto err;
|
|
|
|
|
|
|
|
state->bandwidth_hz = c->bandwidth_hz;
|
|
|
|
state->set_frontend_jiffies = jiffies;
|
|
|
|
state->first_tune = false;
|
2008-09-15 22:01:52 +04:00
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
return ret;
|
|
|
|
err:
|
2012-09-13 03:23:43 +04:00
|
|
|
dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
|
2008-09-15 22:01:52 +04:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2016-02-04 17:58:30 +03:00
|
|
|
static int af9013_get_frontend(struct dvb_frontend *fe,
|
|
|
|
struct dtv_frontend_properties *c)
|
2008-09-15 22:01:52 +04:00
|
|
|
{
|
|
|
|
struct af9013_state *state = fe->demodulator_priv;
|
|
|
|
int ret;
|
2011-11-29 03:58:11 +04:00
|
|
|
u8 buf[3];
|
2008-09-15 22:01:52 +04:00
|
|
|
|
2012-09-13 03:23:43 +04:00
|
|
|
dev_dbg(&state->i2c->dev, "%s:\n", __func__);
|
2011-11-29 03:58:11 +04:00
|
|
|
|
|
|
|
ret = af9013_rd_regs(state, 0xd3c0, buf, 3);
|
|
|
|
if (ret)
|
|
|
|
goto err;
|
2008-09-15 22:01:52 +04:00
|
|
|
|
|
|
|
switch ((buf[1] >> 6) & 3) {
|
|
|
|
case 0:
|
2011-11-29 03:58:11 +04:00
|
|
|
c->modulation = QPSK;
|
2008-09-15 22:01:52 +04:00
|
|
|
break;
|
|
|
|
case 1:
|
2011-11-29 03:58:11 +04:00
|
|
|
c->modulation = QAM_16;
|
2008-09-15 22:01:52 +04:00
|
|
|
break;
|
|
|
|
case 2:
|
2011-11-29 03:58:11 +04:00
|
|
|
c->modulation = QAM_64;
|
2008-09-15 22:01:52 +04:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
switch ((buf[0] >> 0) & 3) {
|
|
|
|
case 0:
|
2011-11-29 03:58:11 +04:00
|
|
|
c->transmission_mode = TRANSMISSION_MODE_2K;
|
2008-09-15 22:01:52 +04:00
|
|
|
break;
|
|
|
|
case 1:
|
2011-11-29 03:58:11 +04:00
|
|
|
c->transmission_mode = TRANSMISSION_MODE_8K;
|
2008-09-15 22:01:52 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
switch ((buf[0] >> 2) & 3) {
|
|
|
|
case 0:
|
2012-01-03 20:47:35 +04:00
|
|
|
c->guard_interval = GUARD_INTERVAL_1_32;
|
2008-09-15 22:01:52 +04:00
|
|
|
break;
|
|
|
|
case 1:
|
2012-01-03 20:47:35 +04:00
|
|
|
c->guard_interval = GUARD_INTERVAL_1_16;
|
2008-09-15 22:01:52 +04:00
|
|
|
break;
|
|
|
|
case 2:
|
2012-01-03 20:47:35 +04:00
|
|
|
c->guard_interval = GUARD_INTERVAL_1_8;
|
2008-09-15 22:01:52 +04:00
|
|
|
break;
|
|
|
|
case 3:
|
2012-01-03 20:47:35 +04:00
|
|
|
c->guard_interval = GUARD_INTERVAL_1_4;
|
2008-09-15 22:01:52 +04:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
switch ((buf[0] >> 4) & 7) {
|
|
|
|
case 0:
|
2011-11-29 03:58:11 +04:00
|
|
|
c->hierarchy = HIERARCHY_NONE;
|
2008-09-15 22:01:52 +04:00
|
|
|
break;
|
|
|
|
case 1:
|
2011-11-29 03:58:11 +04:00
|
|
|
c->hierarchy = HIERARCHY_1;
|
2008-09-15 22:01:52 +04:00
|
|
|
break;
|
|
|
|
case 2:
|
2011-11-29 03:58:11 +04:00
|
|
|
c->hierarchy = HIERARCHY_2;
|
2008-09-15 22:01:52 +04:00
|
|
|
break;
|
|
|
|
case 3:
|
2011-11-29 03:58:11 +04:00
|
|
|
c->hierarchy = HIERARCHY_4;
|
2008-09-15 22:01:52 +04:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
switch ((buf[2] >> 0) & 7) {
|
|
|
|
case 0:
|
2011-11-29 03:58:11 +04:00
|
|
|
c->code_rate_HP = FEC_1_2;
|
2008-09-15 22:01:52 +04:00
|
|
|
break;
|
|
|
|
case 1:
|
2011-11-29 03:58:11 +04:00
|
|
|
c->code_rate_HP = FEC_2_3;
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
c->code_rate_HP = FEC_3_4;
|
|
|
|
break;
|
|
|
|
case 3:
|
|
|
|
c->code_rate_HP = FEC_5_6;
|
|
|
|
break;
|
|
|
|
case 4:
|
|
|
|
c->code_rate_HP = FEC_7_8;
|
|
|
|
break;
|
2008-09-15 22:01:52 +04:00
|
|
|
}
|
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
switch ((buf[2] >> 3) & 7) {
|
|
|
|
case 0:
|
|
|
|
c->code_rate_LP = FEC_1_2;
|
|
|
|
break;
|
|
|
|
case 1:
|
|
|
|
c->code_rate_LP = FEC_2_3;
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
c->code_rate_LP = FEC_3_4;
|
|
|
|
break;
|
|
|
|
case 3:
|
|
|
|
c->code_rate_LP = FEC_5_6;
|
|
|
|
break;
|
|
|
|
case 4:
|
|
|
|
c->code_rate_LP = FEC_7_8;
|
|
|
|
break;
|
|
|
|
}
|
2008-09-15 22:01:52 +04:00
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
switch ((buf[1] >> 2) & 3) {
|
|
|
|
case 0:
|
|
|
|
c->bandwidth_hz = 6000000;
|
|
|
|
break;
|
|
|
|
case 1:
|
|
|
|
c->bandwidth_hz = 7000000;
|
|
|
|
break;
|
|
|
|
case 2:
|
|
|
|
c->bandwidth_hz = 8000000;
|
|
|
|
break;
|
2008-09-15 22:01:52 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
return ret;
|
2011-11-29 03:58:11 +04:00
|
|
|
err:
|
2012-09-13 03:23:43 +04:00
|
|
|
dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
|
2008-09-15 22:01:52 +04:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2015-06-07 20:53:52 +03:00
|
|
|
static int af9013_read_status(struct dvb_frontend *fe, enum fe_status *status)
|
2008-09-15 22:01:52 +04:00
|
|
|
{
|
|
|
|
struct af9013_state *state = fe->demodulator_priv;
|
2011-11-29 03:58:11 +04:00
|
|
|
int ret;
|
2008-09-15 22:01:52 +04:00
|
|
|
u8 tmp;
|
2011-11-29 03:58:11 +04:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Return status from the cache if it is younger than 2000ms with the
|
|
|
|
* exception of last tune is done during 4000ms.
|
|
|
|
*/
|
|
|
|
if (time_is_after_jiffies(
|
|
|
|
state->read_status_jiffies + msecs_to_jiffies(2000)) &&
|
|
|
|
time_is_before_jiffies(
|
|
|
|
state->set_frontend_jiffies + msecs_to_jiffies(4000))
|
|
|
|
) {
|
|
|
|
*status = state->fe_status;
|
|
|
|
return 0;
|
|
|
|
} else {
|
|
|
|
*status = 0;
|
|
|
|
}
|
2008-09-15 22:01:52 +04:00
|
|
|
|
|
|
|
/* MPEG2 lock */
|
2011-11-29 03:58:11 +04:00
|
|
|
ret = af9013_rd_reg_bits(state, 0xd507, 6, 1, &tmp);
|
2008-09-15 22:01:52 +04:00
|
|
|
if (ret)
|
2011-11-29 03:58:11 +04:00
|
|
|
goto err;
|
|
|
|
|
2008-09-15 22:01:52 +04:00
|
|
|
if (tmp)
|
2010-06-18 03:56:27 +04:00
|
|
|
*status |= FE_HAS_SIGNAL | FE_HAS_CARRIER | FE_HAS_VITERBI |
|
|
|
|
FE_HAS_SYNC | FE_HAS_LOCK;
|
2008-09-15 22:01:52 +04:00
|
|
|
|
2010-06-18 03:56:27 +04:00
|
|
|
if (!*status) {
|
|
|
|
/* TPS lock */
|
2011-11-29 03:58:11 +04:00
|
|
|
ret = af9013_rd_reg_bits(state, 0xd330, 3, 1, &tmp);
|
2008-09-15 22:01:52 +04:00
|
|
|
if (ret)
|
2011-11-29 03:58:11 +04:00
|
|
|
goto err;
|
|
|
|
|
2008-09-15 22:01:52 +04:00
|
|
|
if (tmp)
|
2010-06-18 03:56:27 +04:00
|
|
|
*status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
|
|
|
|
FE_HAS_VITERBI;
|
2008-09-15 22:01:52 +04:00
|
|
|
}
|
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
state->fe_status = *status;
|
|
|
|
state->read_status_jiffies = jiffies;
|
2008-09-15 22:01:52 +04:00
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
return ret;
|
|
|
|
err:
|
2012-09-13 03:23:43 +04:00
|
|
|
dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
|
2008-09-15 22:01:52 +04:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
static int af9013_read_snr(struct dvb_frontend *fe, u16 *snr)
|
2008-09-15 22:01:52 +04:00
|
|
|
{
|
|
|
|
struct af9013_state *state = fe->demodulator_priv;
|
2011-11-29 03:58:11 +04:00
|
|
|
*snr = state->snr;
|
|
|
|
return 0;
|
2008-09-15 22:01:52 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
static int af9013_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
|
|
|
|
{
|
|
|
|
struct af9013_state *state = fe->demodulator_priv;
|
|
|
|
*strength = state->signal_strength;
|
2011-11-29 03:58:11 +04:00
|
|
|
return 0;
|
2008-09-15 22:01:52 +04:00
|
|
|
}
|
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
static int af9013_read_ber(struct dvb_frontend *fe, u32 *ber)
|
2008-09-15 22:01:52 +04:00
|
|
|
{
|
|
|
|
struct af9013_state *state = fe->demodulator_priv;
|
2011-11-29 03:58:11 +04:00
|
|
|
*ber = state->ber;
|
|
|
|
return 0;
|
2008-09-15 22:01:52 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
static int af9013_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
|
|
|
|
{
|
|
|
|
struct af9013_state *state = fe->demodulator_priv;
|
|
|
|
*ucblocks = state->ucblocks;
|
2011-11-29 03:58:11 +04:00
|
|
|
return 0;
|
2008-09-15 22:01:52 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
static int af9013_init(struct dvb_frontend *fe)
|
|
|
|
{
|
|
|
|
struct af9013_state *state = fe->demodulator_priv;
|
|
|
|
int ret, i, len;
|
2011-11-29 03:58:11 +04:00
|
|
|
u8 buf[3], tmp;
|
|
|
|
u32 adc_cw;
|
|
|
|
const struct af9013_reg_bit *init;
|
2008-09-15 22:01:52 +04:00
|
|
|
|
2012-09-13 03:23:43 +04:00
|
|
|
dev_dbg(&state->i2c->dev, "%s:\n", __func__);
|
2008-09-15 22:01:52 +04:00
|
|
|
|
|
|
|
/* power on */
|
|
|
|
ret = af9013_power_ctrl(state, 1);
|
|
|
|
if (ret)
|
2011-11-29 03:58:11 +04:00
|
|
|
goto err;
|
2008-09-15 22:01:52 +04:00
|
|
|
|
|
|
|
/* enable ADC */
|
2011-11-29 03:58:11 +04:00
|
|
|
ret = af9013_wr_reg(state, 0xd73a, 0xa4);
|
2008-09-15 22:01:52 +04:00
|
|
|
if (ret)
|
2011-11-29 03:58:11 +04:00
|
|
|
goto err;
|
2008-09-15 22:01:52 +04:00
|
|
|
|
|
|
|
/* write API version to firmware */
|
2011-11-29 03:58:11 +04:00
|
|
|
ret = af9013_wr_regs(state, 0x9bf2, state->config.api_version, 4);
|
|
|
|
if (ret)
|
|
|
|
goto err;
|
2008-09-15 22:01:52 +04:00
|
|
|
|
|
|
|
/* program ADC control */
|
2011-11-29 03:58:11 +04:00
|
|
|
switch (state->config.clock) {
|
|
|
|
case 28800000: /* 28.800 MHz */
|
|
|
|
tmp = 0;
|
|
|
|
break;
|
|
|
|
case 20480000: /* 20.480 MHz */
|
|
|
|
tmp = 1;
|
|
|
|
break;
|
|
|
|
case 28000000: /* 28.000 MHz */
|
|
|
|
tmp = 2;
|
|
|
|
break;
|
|
|
|
case 25000000: /* 25.000 MHz */
|
|
|
|
tmp = 3;
|
|
|
|
break;
|
|
|
|
default:
|
2012-09-13 03:23:43 +04:00
|
|
|
dev_err(&state->i2c->dev, "%s: invalid clock\n",
|
|
|
|
KBUILD_MODNAME);
|
2011-11-29 03:58:11 +04:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2012-09-13 03:23:43 +04:00
|
|
|
adc_cw = af9013_div(state, state->config.clock, 1000000ul, 19);
|
2011-11-29 03:58:11 +04:00
|
|
|
buf[0] = (adc_cw >> 0) & 0xff;
|
|
|
|
buf[1] = (adc_cw >> 8) & 0xff;
|
|
|
|
buf[2] = (adc_cw >> 16) & 0xff;
|
|
|
|
|
|
|
|
ret = af9013_wr_regs(state, 0xd180, buf, 3);
|
|
|
|
if (ret)
|
|
|
|
goto err;
|
|
|
|
|
|
|
|
ret = af9013_wr_reg_bits(state, 0x9bd2, 0, 4, tmp);
|
2008-09-15 22:01:52 +04:00
|
|
|
if (ret)
|
2011-11-29 03:58:11 +04:00
|
|
|
goto err;
|
2008-09-15 22:01:52 +04:00
|
|
|
|
|
|
|
/* set I2C master clock */
|
2011-11-29 03:58:11 +04:00
|
|
|
ret = af9013_wr_reg(state, 0xd416, 0x14);
|
2008-09-15 22:01:52 +04:00
|
|
|
if (ret)
|
2011-11-29 03:58:11 +04:00
|
|
|
goto err;
|
2008-09-15 22:01:52 +04:00
|
|
|
|
|
|
|
/* set 16 embx */
|
2011-11-29 03:58:11 +04:00
|
|
|
ret = af9013_wr_reg_bits(state, 0xd700, 1, 1, 1);
|
2008-09-15 22:01:52 +04:00
|
|
|
if (ret)
|
2011-11-29 03:58:11 +04:00
|
|
|
goto err;
|
2008-09-15 22:01:52 +04:00
|
|
|
|
|
|
|
/* set no trigger */
|
2011-11-29 03:58:11 +04:00
|
|
|
ret = af9013_wr_reg_bits(state, 0xd700, 2, 1, 0);
|
2008-09-15 22:01:52 +04:00
|
|
|
if (ret)
|
2011-11-29 03:58:11 +04:00
|
|
|
goto err;
|
2008-09-15 22:01:52 +04:00
|
|
|
|
|
|
|
/* set read-update bit for constellation */
|
2011-11-29 03:58:11 +04:00
|
|
|
ret = af9013_wr_reg_bits(state, 0xd371, 1, 1, 1);
|
2008-09-15 22:01:52 +04:00
|
|
|
if (ret)
|
2011-11-29 03:58:11 +04:00
|
|
|
goto err;
|
2008-09-15 22:01:52 +04:00
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
/* settings for mp2if */
|
|
|
|
if (state->config.ts_mode == AF9013_TS_USB) {
|
|
|
|
/* AF9015 split PSB to 1.5k + 0.5k */
|
|
|
|
ret = af9013_wr_reg_bits(state, 0xd50b, 2, 1, 1);
|
|
|
|
if (ret)
|
|
|
|
goto err;
|
|
|
|
} else {
|
|
|
|
/* AF9013 change the output bit to data7 */
|
|
|
|
ret = af9013_wr_reg_bits(state, 0xd500, 3, 1, 1);
|
|
|
|
if (ret)
|
|
|
|
goto err;
|
|
|
|
|
|
|
|
/* AF9013 set mpeg to full speed */
|
|
|
|
ret = af9013_wr_reg_bits(state, 0xd502, 4, 1, 1);
|
|
|
|
if (ret)
|
|
|
|
goto err;
|
|
|
|
}
|
|
|
|
|
|
|
|
ret = af9013_wr_reg_bits(state, 0xd520, 4, 1, 1);
|
2008-09-15 22:01:52 +04:00
|
|
|
if (ret)
|
2011-11-29 03:58:11 +04:00
|
|
|
goto err;
|
2008-09-15 22:01:52 +04:00
|
|
|
|
|
|
|
/* load OFSM settings */
|
2012-09-13 03:23:43 +04:00
|
|
|
dev_dbg(&state->i2c->dev, "%s: load ofsm settings\n", __func__);
|
2008-09-15 22:01:52 +04:00
|
|
|
len = ARRAY_SIZE(ofsm_init);
|
|
|
|
init = ofsm_init;
|
|
|
|
for (i = 0; i < len; i++) {
|
2011-11-29 03:58:11 +04:00
|
|
|
ret = af9013_wr_reg_bits(state, init[i].addr, init[i].pos,
|
2008-09-15 22:01:52 +04:00
|
|
|
init[i].len, init[i].val);
|
|
|
|
if (ret)
|
2011-11-29 03:58:11 +04:00
|
|
|
goto err;
|
2008-09-15 22:01:52 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
/* load tuner specific settings */
|
2012-09-13 03:23:43 +04:00
|
|
|
dev_dbg(&state->i2c->dev, "%s: load tuner specific settings\n",
|
|
|
|
__func__);
|
2008-09-15 22:01:52 +04:00
|
|
|
switch (state->config.tuner) {
|
|
|
|
case AF9013_TUNER_MXL5003D:
|
|
|
|
len = ARRAY_SIZE(tuner_init_mxl5003d);
|
|
|
|
init = tuner_init_mxl5003d;
|
|
|
|
break;
|
|
|
|
case AF9013_TUNER_MXL5005D:
|
|
|
|
case AF9013_TUNER_MXL5005R:
|
2010-09-09 21:53:59 +04:00
|
|
|
case AF9013_TUNER_MXL5007T:
|
2008-09-15 22:01:52 +04:00
|
|
|
len = ARRAY_SIZE(tuner_init_mxl5005);
|
|
|
|
init = tuner_init_mxl5005;
|
|
|
|
break;
|
|
|
|
case AF9013_TUNER_ENV77H11D5:
|
|
|
|
len = ARRAY_SIZE(tuner_init_env77h11d5);
|
|
|
|
init = tuner_init_env77h11d5;
|
|
|
|
break;
|
|
|
|
case AF9013_TUNER_MT2060:
|
|
|
|
len = ARRAY_SIZE(tuner_init_mt2060);
|
|
|
|
init = tuner_init_mt2060;
|
|
|
|
break;
|
|
|
|
case AF9013_TUNER_MC44S803:
|
|
|
|
len = ARRAY_SIZE(tuner_init_mc44s803);
|
|
|
|
init = tuner_init_mc44s803;
|
|
|
|
break;
|
|
|
|
case AF9013_TUNER_QT1010:
|
|
|
|
case AF9013_TUNER_QT1010A:
|
|
|
|
len = ARRAY_SIZE(tuner_init_qt1010);
|
|
|
|
init = tuner_init_qt1010;
|
|
|
|
break;
|
|
|
|
case AF9013_TUNER_MT2060_2:
|
|
|
|
len = ARRAY_SIZE(tuner_init_mt2060_2);
|
|
|
|
init = tuner_init_mt2060_2;
|
|
|
|
break;
|
|
|
|
case AF9013_TUNER_TDA18271:
|
2010-08-13 10:49:24 +04:00
|
|
|
case AF9013_TUNER_TDA18218:
|
2008-09-15 22:01:52 +04:00
|
|
|
len = ARRAY_SIZE(tuner_init_tda18271);
|
|
|
|
init = tuner_init_tda18271;
|
|
|
|
break;
|
|
|
|
case AF9013_TUNER_UNKNOWN:
|
|
|
|
default:
|
|
|
|
len = ARRAY_SIZE(tuner_init_unknown);
|
|
|
|
init = tuner_init_unknown;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
for (i = 0; i < len; i++) {
|
2011-11-29 03:58:11 +04:00
|
|
|
ret = af9013_wr_reg_bits(state, init[i].addr, init[i].pos,
|
2008-09-15 22:01:52 +04:00
|
|
|
init[i].len, init[i].val);
|
|
|
|
if (ret)
|
2011-11-29 03:58:11 +04:00
|
|
|
goto err;
|
2008-09-15 22:01:52 +04:00
|
|
|
}
|
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
/* TS mode */
|
|
|
|
ret = af9013_wr_reg_bits(state, 0xd500, 1, 2, state->config.ts_mode);
|
2008-09-15 22:01:52 +04:00
|
|
|
if (ret)
|
2011-11-29 03:58:11 +04:00
|
|
|
goto err;
|
2008-09-15 22:01:52 +04:00
|
|
|
|
|
|
|
/* enable lock led */
|
2011-11-29 03:58:11 +04:00
|
|
|
ret = af9013_wr_reg_bits(state, 0xd730, 0, 1, 1);
|
2008-09-15 22:01:52 +04:00
|
|
|
if (ret)
|
2011-11-29 03:58:11 +04:00
|
|
|
goto err;
|
2008-09-15 22:01:52 +04:00
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
/* check if we support signal strength */
|
|
|
|
if (!state->signal_strength_en) {
|
|
|
|
ret = af9013_rd_reg_bits(state, 0x9bee, 0, 1,
|
|
|
|
&state->signal_strength_en);
|
|
|
|
if (ret)
|
|
|
|
goto err;
|
|
|
|
}
|
2010-10-07 23:34:55 +04:00
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
/* read values needed for signal strength calculation */
|
|
|
|
if (state->signal_strength_en && !state->rf_50) {
|
|
|
|
ret = af9013_rd_reg(state, 0x9bbd, &state->rf_50);
|
2010-10-07 23:34:55 +04:00
|
|
|
if (ret)
|
2011-11-29 03:58:11 +04:00
|
|
|
goto err;
|
|
|
|
|
|
|
|
ret = af9013_rd_reg(state, 0x9bd0, &state->rf_80);
|
2010-10-07 23:34:55 +04:00
|
|
|
if (ret)
|
2011-11-29 03:58:11 +04:00
|
|
|
goto err;
|
|
|
|
|
|
|
|
ret = af9013_rd_reg(state, 0x9be2, &state->if_50);
|
2010-10-07 23:34:55 +04:00
|
|
|
if (ret)
|
2011-11-29 03:58:11 +04:00
|
|
|
goto err;
|
|
|
|
|
|
|
|
ret = af9013_rd_reg(state, 0x9be4, &state->if_80);
|
2010-10-07 23:34:55 +04:00
|
|
|
if (ret)
|
2011-11-29 03:58:11 +04:00
|
|
|
goto err;
|
2010-10-07 23:34:55 +04:00
|
|
|
}
|
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
/* SNR */
|
|
|
|
ret = af9013_wr_reg(state, 0xd2e2, 1);
|
|
|
|
if (ret)
|
|
|
|
goto err;
|
|
|
|
|
|
|
|
/* BER / UCB */
|
|
|
|
buf[0] = (10000 >> 0) & 0xff;
|
|
|
|
buf[1] = (10000 >> 8) & 0xff;
|
|
|
|
ret = af9013_wr_regs(state, 0xd385, buf, 2);
|
|
|
|
if (ret)
|
|
|
|
goto err;
|
|
|
|
|
|
|
|
/* enable FEC monitor */
|
|
|
|
ret = af9013_wr_reg_bits(state, 0xd392, 1, 1, 1);
|
|
|
|
if (ret)
|
|
|
|
goto err;
|
|
|
|
|
|
|
|
state->first_tune = true;
|
|
|
|
schedule_delayed_work(&state->statistics_work, msecs_to_jiffies(400));
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
err:
|
2012-09-13 03:23:43 +04:00
|
|
|
dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
|
2011-11-29 03:58:11 +04:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int af9013_sleep(struct dvb_frontend *fe)
|
|
|
|
{
|
|
|
|
struct af9013_state *state = fe->demodulator_priv;
|
|
|
|
int ret;
|
|
|
|
|
2012-09-13 03:23:43 +04:00
|
|
|
dev_dbg(&state->i2c->dev, "%s:\n", __func__);
|
2011-11-29 03:58:11 +04:00
|
|
|
|
|
|
|
/* stop statistics polling */
|
|
|
|
cancel_delayed_work_sync(&state->statistics_work);
|
|
|
|
|
|
|
|
/* disable lock led */
|
|
|
|
ret = af9013_wr_reg_bits(state, 0xd730, 0, 1, 0);
|
|
|
|
if (ret)
|
|
|
|
goto err;
|
|
|
|
|
|
|
|
/* power off */
|
|
|
|
ret = af9013_power_ctrl(state, 0);
|
|
|
|
if (ret)
|
|
|
|
goto err;
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
err:
|
2012-09-13 03:23:43 +04:00
|
|
|
dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
|
2011-11-29 03:58:11 +04:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int af9013_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
struct af9013_state *state = fe->demodulator_priv;
|
|
|
|
|
2012-09-13 03:23:43 +04:00
|
|
|
dev_dbg(&state->i2c->dev, "%s: enable=%d\n", __func__, enable);
|
2011-11-29 03:58:11 +04:00
|
|
|
|
|
|
|
/* gate already open or close */
|
|
|
|
if (state->i2c_gate_state == enable)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
if (state->config.ts_mode == AF9013_TS_USB)
|
|
|
|
ret = af9013_wr_reg_bits(state, 0xd417, 3, 1, enable);
|
|
|
|
else
|
|
|
|
ret = af9013_wr_reg_bits(state, 0xd607, 2, 1, enable);
|
|
|
|
if (ret)
|
|
|
|
goto err;
|
|
|
|
|
|
|
|
state->i2c_gate_state = enable;
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
err:
|
2012-09-13 03:23:43 +04:00
|
|
|
dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
|
2008-09-15 22:01:52 +04:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
static void af9013_release(struct dvb_frontend *fe)
|
|
|
|
{
|
|
|
|
struct af9013_state *state = fe->demodulator_priv;
|
2016-01-09 23:18:45 +03:00
|
|
|
|
|
|
|
/* stop statistics polling */
|
|
|
|
cancel_delayed_work_sync(&state->statistics_work);
|
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
kfree(state);
|
|
|
|
}
|
|
|
|
|
2008-09-15 22:01:52 +04:00
|
|
|
static struct dvb_frontend_ops af9013_ops;
|
|
|
|
|
|
|
|
static int af9013_download_firmware(struct af9013_state *state)
|
|
|
|
{
|
2011-03-20 00:02:22 +03:00
|
|
|
int i, len, remaining, ret;
|
2008-09-15 22:01:52 +04:00
|
|
|
const struct firmware *fw;
|
|
|
|
u16 checksum = 0;
|
|
|
|
u8 val;
|
|
|
|
u8 fw_params[4];
|
2012-09-12 18:37:28 +04:00
|
|
|
u8 *fw_file = AF9013_FIRMWARE;
|
2008-09-15 22:01:52 +04:00
|
|
|
|
|
|
|
msleep(100);
|
|
|
|
/* check whether firmware is already running */
|
2011-11-29 03:58:11 +04:00
|
|
|
ret = af9013_rd_reg(state, 0x98be, &val);
|
2008-09-15 22:01:52 +04:00
|
|
|
if (ret)
|
2011-11-29 03:58:11 +04:00
|
|
|
goto err;
|
2008-09-15 22:01:52 +04:00
|
|
|
else
|
2012-09-13 03:23:43 +04:00
|
|
|
dev_dbg(&state->i2c->dev, "%s: firmware status=%02x\n",
|
|
|
|
__func__, val);
|
2008-09-15 22:01:52 +04:00
|
|
|
|
|
|
|
if (val == 0x0c) /* fw is running, no need for download */
|
|
|
|
goto exit;
|
|
|
|
|
2012-09-13 03:23:43 +04:00
|
|
|
dev_info(&state->i2c->dev, "%s: found a '%s' in cold state, will try " \
|
|
|
|
"to load a firmware\n",
|
|
|
|
KBUILD_MODNAME, af9013_ops.info.name);
|
2008-09-15 22:01:52 +04:00
|
|
|
|
|
|
|
/* request the firmware, this will block and timeout */
|
2009-04-26 12:43:59 +04:00
|
|
|
ret = request_firmware(&fw, fw_file, state->i2c->dev.parent);
|
2008-09-15 22:01:52 +04:00
|
|
|
if (ret) {
|
2012-09-13 03:23:43 +04:00
|
|
|
dev_info(&state->i2c->dev, "%s: did not find the firmware " \
|
|
|
|
"file. (%s) Please see linux/Documentation/dvb/ for " \
|
|
|
|
"more details on firmware-problems. (%d)\n",
|
|
|
|
KBUILD_MODNAME, fw_file, ret);
|
2011-11-29 03:58:11 +04:00
|
|
|
goto err;
|
2008-09-15 22:01:52 +04:00
|
|
|
}
|
|
|
|
|
2012-09-13 03:23:43 +04:00
|
|
|
dev_info(&state->i2c->dev, "%s: downloading firmware from file '%s'\n",
|
|
|
|
KBUILD_MODNAME, fw_file);
|
2008-09-15 22:01:52 +04:00
|
|
|
|
|
|
|
/* calc checksum */
|
|
|
|
for (i = 0; i < fw->size; i++)
|
|
|
|
checksum += fw->data[i];
|
|
|
|
|
|
|
|
fw_params[0] = checksum >> 8;
|
|
|
|
fw_params[1] = checksum & 0xff;
|
|
|
|
fw_params[2] = fw->size >> 8;
|
|
|
|
fw_params[3] = fw->size & 0xff;
|
|
|
|
|
|
|
|
/* write fw checksum & size */
|
|
|
|
ret = af9013_write_ofsm_regs(state, 0x50fc,
|
|
|
|
fw_params, sizeof(fw_params));
|
|
|
|
if (ret)
|
2011-11-29 03:58:11 +04:00
|
|
|
goto err_release;
|
2008-09-15 22:01:52 +04:00
|
|
|
|
2011-03-20 00:02:22 +03:00
|
|
|
#define FW_ADDR 0x5100 /* firmware start address */
|
|
|
|
#define LEN_MAX 16 /* max packet size */
|
|
|
|
for (remaining = fw->size; remaining > 0; remaining -= LEN_MAX) {
|
|
|
|
len = remaining;
|
|
|
|
if (len > LEN_MAX)
|
|
|
|
len = LEN_MAX;
|
2008-09-15 22:01:52 +04:00
|
|
|
|
2011-03-20 00:02:22 +03:00
|
|
|
ret = af9013_write_ofsm_regs(state,
|
|
|
|
FW_ADDR + fw->size - remaining,
|
|
|
|
(u8 *) &fw->data[fw->size - remaining], len);
|
2008-09-15 22:01:52 +04:00
|
|
|
if (ret) {
|
2012-09-13 03:23:43 +04:00
|
|
|
dev_err(&state->i2c->dev,
|
|
|
|
"%s: firmware download failed=%d\n",
|
|
|
|
KBUILD_MODNAME, ret);
|
2011-11-29 03:58:11 +04:00
|
|
|
goto err_release;
|
2008-09-15 22:01:52 +04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* request boot firmware */
|
2011-11-29 03:58:11 +04:00
|
|
|
ret = af9013_wr_reg(state, 0xe205, 1);
|
2008-09-15 22:01:52 +04:00
|
|
|
if (ret)
|
2011-11-29 03:58:11 +04:00
|
|
|
goto err_release;
|
2008-09-15 22:01:52 +04:00
|
|
|
|
|
|
|
for (i = 0; i < 15; i++) {
|
|
|
|
msleep(100);
|
|
|
|
|
|
|
|
/* check firmware status */
|
2011-11-29 03:58:11 +04:00
|
|
|
ret = af9013_rd_reg(state, 0x98be, &val);
|
2008-09-15 22:01:52 +04:00
|
|
|
if (ret)
|
2011-11-29 03:58:11 +04:00
|
|
|
goto err_release;
|
2008-09-15 22:01:52 +04:00
|
|
|
|
2012-09-13 03:23:43 +04:00
|
|
|
dev_dbg(&state->i2c->dev, "%s: firmware status=%02x\n",
|
|
|
|
__func__, val);
|
2008-09-15 22:01:52 +04:00
|
|
|
|
|
|
|
if (val == 0x0c || val == 0x04) /* success or fail */
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (val == 0x04) {
|
2012-09-13 03:23:43 +04:00
|
|
|
dev_err(&state->i2c->dev, "%s: firmware did not run\n",
|
|
|
|
KBUILD_MODNAME);
|
2011-11-29 03:58:11 +04:00
|
|
|
ret = -ENODEV;
|
2008-09-15 22:01:52 +04:00
|
|
|
} else if (val != 0x0c) {
|
2012-09-13 03:23:43 +04:00
|
|
|
dev_err(&state->i2c->dev, "%s: firmware boot timeout\n",
|
|
|
|
KBUILD_MODNAME);
|
2011-11-29 03:58:11 +04:00
|
|
|
ret = -ENODEV;
|
2008-09-15 22:01:52 +04:00
|
|
|
}
|
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
err_release:
|
2008-09-15 22:01:52 +04:00
|
|
|
release_firmware(fw);
|
2011-11-29 03:58:11 +04:00
|
|
|
err:
|
2008-09-15 22:01:52 +04:00
|
|
|
exit:
|
|
|
|
if (!ret)
|
2012-09-13 03:23:43 +04:00
|
|
|
dev_info(&state->i2c->dev, "%s: found a '%s' in warm state\n",
|
|
|
|
KBUILD_MODNAME, af9013_ops.info.name);
|
2008-09-15 22:01:52 +04:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
struct dvb_frontend *af9013_attach(const struct af9013_config *config,
|
|
|
|
struct i2c_adapter *i2c)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
struct af9013_state *state = NULL;
|
2010-06-18 04:16:12 +04:00
|
|
|
u8 buf[4], i;
|
2008-09-15 22:01:52 +04:00
|
|
|
|
|
|
|
/* allocate memory for the internal state */
|
|
|
|
state = kzalloc(sizeof(struct af9013_state), GFP_KERNEL);
|
|
|
|
if (state == NULL)
|
2011-11-29 03:58:11 +04:00
|
|
|
goto err;
|
2008-09-15 22:01:52 +04:00
|
|
|
|
|
|
|
/* setup the state */
|
|
|
|
state->i2c = i2c;
|
|
|
|
memcpy(&state->config, config, sizeof(struct af9013_config));
|
|
|
|
|
|
|
|
/* download firmware */
|
2011-11-29 03:58:11 +04:00
|
|
|
if (state->config.ts_mode != AF9013_TS_USB) {
|
2008-09-15 22:01:52 +04:00
|
|
|
ret = af9013_download_firmware(state);
|
|
|
|
if (ret)
|
2011-11-29 03:58:11 +04:00
|
|
|
goto err;
|
2008-09-15 22:01:52 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
/* firmware version */
|
2011-11-29 03:58:11 +04:00
|
|
|
ret = af9013_rd_regs(state, 0x5103, buf, 4);
|
2011-03-19 23:18:18 +03:00
|
|
|
if (ret)
|
2011-11-29 03:58:11 +04:00
|
|
|
goto err;
|
2011-03-19 23:18:18 +03:00
|
|
|
|
2012-09-13 03:23:43 +04:00
|
|
|
dev_info(&state->i2c->dev, "%s: firmware version %d.%d.%d.%d\n",
|
|
|
|
KBUILD_MODNAME, buf[0], buf[1], buf[2], buf[3]);
|
2008-09-15 22:01:52 +04:00
|
|
|
|
|
|
|
/* set GPIOs */
|
|
|
|
for (i = 0; i < sizeof(state->config.gpio); i++) {
|
|
|
|
ret = af9013_set_gpio(state, i, state->config.gpio[i]);
|
|
|
|
if (ret)
|
2011-11-29 03:58:11 +04:00
|
|
|
goto err;
|
2008-09-15 22:01:52 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
/* create dvb_frontend */
|
2011-11-29 03:58:11 +04:00
|
|
|
memcpy(&state->fe.ops, &af9013_ops,
|
2008-09-15 22:01:52 +04:00
|
|
|
sizeof(struct dvb_frontend_ops));
|
2011-11-29 03:58:11 +04:00
|
|
|
state->fe.demodulator_priv = state;
|
|
|
|
|
|
|
|
INIT_DELAYED_WORK(&state->statistics_work, af9013_statistics_work);
|
2008-09-15 22:01:52 +04:00
|
|
|
|
2011-11-29 03:58:11 +04:00
|
|
|
return &state->fe;
|
|
|
|
err:
|
2008-09-15 22:01:52 +04:00
|
|
|
kfree(state);
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(af9013_attach);
|
|
|
|
|
|
|
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static struct dvb_frontend_ops af9013_ops = {
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2011-12-31 05:25:27 +04:00
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.delsys = { SYS_DVBT },
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2008-09-15 22:01:52 +04:00
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.info = {
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2011-11-29 03:58:11 +04:00
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.name = "Afatech AF9013",
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2008-09-15 22:01:52 +04:00
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.frequency_min = 174000000,
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.frequency_max = 862000000,
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.frequency_stepsize = 250000,
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.frequency_tolerance = 0,
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2011-11-29 03:58:11 +04:00
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.caps = FE_CAN_FEC_1_2 |
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FE_CAN_FEC_2_3 |
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FE_CAN_FEC_3_4 |
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FE_CAN_FEC_5_6 |
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FE_CAN_FEC_7_8 |
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FE_CAN_FEC_AUTO |
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FE_CAN_QPSK |
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FE_CAN_QAM_16 |
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FE_CAN_QAM_64 |
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FE_CAN_QAM_AUTO |
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2008-09-15 22:01:52 +04:00
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FE_CAN_TRANSMISSION_MODE_AUTO |
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FE_CAN_GUARD_INTERVAL_AUTO |
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FE_CAN_HIERARCHY_AUTO |
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FE_CAN_RECOVER |
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FE_CAN_MUTE_TS
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},
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.release = af9013_release,
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2011-11-29 03:58:11 +04:00
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2008-09-15 22:01:52 +04:00
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.init = af9013_init,
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.sleep = af9013_sleep,
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2011-11-29 03:58:11 +04:00
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.get_tune_settings = af9013_get_tune_settings,
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2011-12-31 05:25:27 +04:00
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.set_frontend = af9013_set_frontend,
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.get_frontend = af9013_get_frontend,
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2008-09-15 22:01:52 +04:00
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.read_status = af9013_read_status,
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.read_snr = af9013_read_snr,
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2011-11-29 03:58:11 +04:00
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.read_signal_strength = af9013_read_signal_strength,
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.read_ber = af9013_read_ber,
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2008-09-15 22:01:52 +04:00
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.read_ucblocks = af9013_read_ucblocks,
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2011-11-29 03:58:11 +04:00
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.i2c_gate_ctrl = af9013_i2c_gate_ctrl,
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};
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2008-09-15 22:01:52 +04:00
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MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
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MODULE_DESCRIPTION("Afatech AF9013 DVB-T demodulator driver");
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MODULE_LICENSE("GPL");
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2012-09-12 18:37:28 +04:00
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MODULE_FIRMWARE(AF9013_FIRMWARE);
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