2008-02-03 16:06:26 +03:00
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#ifndef _LINUX_DMA_MAPPING_H
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#define _LINUX_DMA_MAPPING_H
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2005-04-17 02:20:36 +04:00
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2015-11-07 03:32:51 +03:00
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#include <linux/sizes.h>
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2011-11-03 00:39:33 +04:00
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#include <linux/string.h>
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2005-04-17 02:20:36 +04:00
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#include <linux/device.h>
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#include <linux/err.h>
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2009-01-05 17:59:01 +03:00
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#include <linux/dma-attrs.h>
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2016-01-21 02:02:05 +03:00
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#include <linux/dma-debug.h>
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2011-06-16 15:01:34 +04:00
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#include <linux/dma-direction.h>
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2009-01-05 17:59:01 +03:00
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#include <linux/scatterlist.h>
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2016-01-21 02:02:05 +03:00
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#include <linux/kmemcheck.h>
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#include <linux/bug.h>
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2005-04-17 02:20:36 +04:00
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2014-04-30 21:20:53 +04:00
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/*
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* A dma_addr_t can hold any valid DMA or bus address for the platform.
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* It can be given to a device to use as a DMA source or target. A CPU cannot
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* reference a dma_addr_t directly because there may be translation between
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* its physical address space and the bus address space.
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*/
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2009-01-05 17:59:01 +03:00
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struct dma_map_ops {
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2012-03-28 18:36:27 +04:00
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void* (*alloc)(struct device *dev, size_t size,
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dma_addr_t *dma_handle, gfp_t gfp,
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struct dma_attrs *attrs);
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void (*free)(struct device *dev, size_t size,
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void *vaddr, dma_addr_t dma_handle,
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struct dma_attrs *attrs);
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2011-12-21 19:55:33 +04:00
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int (*mmap)(struct device *, struct vm_area_struct *,
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void *, dma_addr_t, size_t, struct dma_attrs *attrs);
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2012-06-13 12:05:52 +04:00
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int (*get_sgtable)(struct device *dev, struct sg_table *sgt, void *,
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dma_addr_t, size_t, struct dma_attrs *attrs);
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2009-01-05 17:59:01 +03:00
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dma_addr_t (*map_page)(struct device *dev, struct page *page,
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unsigned long offset, size_t size,
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enum dma_data_direction dir,
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struct dma_attrs *attrs);
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void (*unmap_page)(struct device *dev, dma_addr_t dma_handle,
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size_t size, enum dma_data_direction dir,
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struct dma_attrs *attrs);
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2015-02-11 15:53:15 +03:00
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/*
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* map_sg returns 0 on error and a value > 0 on success.
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* It should never return a value < 0.
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*/
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2009-01-05 17:59:01 +03:00
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int (*map_sg)(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction dir,
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struct dma_attrs *attrs);
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void (*unmap_sg)(struct device *dev,
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struct scatterlist *sg, int nents,
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enum dma_data_direction dir,
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struct dma_attrs *attrs);
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void (*sync_single_for_cpu)(struct device *dev,
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dma_addr_t dma_handle, size_t size,
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enum dma_data_direction dir);
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void (*sync_single_for_device)(struct device *dev,
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dma_addr_t dma_handle, size_t size,
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enum dma_data_direction dir);
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void (*sync_sg_for_cpu)(struct device *dev,
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struct scatterlist *sg, int nents,
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enum dma_data_direction dir);
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void (*sync_sg_for_device)(struct device *dev,
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struct scatterlist *sg, int nents,
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enum dma_data_direction dir);
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int (*mapping_error)(struct device *dev, dma_addr_t dma_addr);
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int (*dma_supported)(struct device *dev, u64 mask);
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2009-08-04 23:08:24 +04:00
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int (*set_dma_mask)(struct device *dev, u64 mask);
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2011-06-24 13:05:23 +04:00
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#ifdef ARCH_HAS_DMA_GET_REQUIRED_MASK
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u64 (*get_required_mask)(struct device *dev);
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#endif
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2009-01-05 17:59:01 +03:00
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int is_phys;
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};
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2007-10-18 14:05:07 +04:00
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#define DMA_BIT_MASK(n) (((n) == 64) ? ~0ULL : ((1ULL<<(n))-1))
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2007-10-18 14:05:06 +04:00
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2007-10-16 12:23:55 +04:00
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#define DMA_MASK_NONE 0x0ULL
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2006-09-29 12:59:48 +04:00
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static inline int valid_dma_direction(int dma_direction)
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{
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return ((dma_direction == DMA_BIDIRECTIONAL) ||
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(dma_direction == DMA_TO_DEVICE) ||
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(dma_direction == DMA_FROM_DEVICE));
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}
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2007-10-16 12:23:55 +04:00
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static inline int is_device_dma_capable(struct device *dev)
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{
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return dev->dma_mask != NULL && *dev->dma_mask != DMA_MASK_NONE;
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}
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2016-01-21 02:02:09 +03:00
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#ifdef CONFIG_HAVE_GENERIC_DMA_COHERENT
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/*
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* These three functions are only for dma allocator.
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* Don't use them in device drivers.
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*/
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int dma_alloc_from_coherent(struct device *dev, ssize_t size,
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dma_addr_t *dma_handle, void **ret);
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int dma_release_from_coherent(struct device *dev, int order, void *vaddr);
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int dma_mmap_from_coherent(struct device *dev, struct vm_area_struct *vma,
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void *cpu_addr, size_t size, int *ret);
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#else
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#define dma_alloc_from_coherent(dev, size, handle, ret) (0)
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#define dma_release_from_coherent(dev, order, vaddr) (0)
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#define dma_mmap_from_coherent(dev, vma, vaddr, order, ret) (0)
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#endif /* CONFIG_HAVE_GENERIC_DMA_COHERENT */
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2007-07-16 10:40:26 +04:00
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#ifdef CONFIG_HAS_DMA
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2005-04-17 02:20:36 +04:00
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#include <asm/dma-mapping.h>
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2007-07-16 10:40:26 +04:00
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#else
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2016-01-21 02:02:05 +03:00
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/*
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* Define the dma api to allow compilation but not linking of
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* dma dependent code. Code that depends on the dma-mapping
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* API needs to set 'depends on HAS_DMA' in its Kconfig
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*/
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extern struct dma_map_ops bad_dma_ops;
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static inline struct dma_map_ops *get_dma_ops(struct device *dev)
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{
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return &bad_dma_ops;
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}
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#endif
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static inline dma_addr_t dma_map_single_attrs(struct device *dev, void *ptr,
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size_t size,
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enum dma_data_direction dir,
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struct dma_attrs *attrs)
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{
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struct dma_map_ops *ops = get_dma_ops(dev);
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dma_addr_t addr;
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kmemcheck_mark_initialized(ptr, size);
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BUG_ON(!valid_dma_direction(dir));
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addr = ops->map_page(dev, virt_to_page(ptr),
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2016-01-21 02:02:12 +03:00
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offset_in_page(ptr), size,
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2016-01-21 02:02:05 +03:00
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dir, attrs);
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debug_dma_map_page(dev, virt_to_page(ptr),
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2016-01-21 02:02:12 +03:00
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offset_in_page(ptr), size,
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2016-01-21 02:02:05 +03:00
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dir, addr, true);
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return addr;
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}
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static inline void dma_unmap_single_attrs(struct device *dev, dma_addr_t addr,
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size_t size,
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enum dma_data_direction dir,
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struct dma_attrs *attrs)
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{
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struct dma_map_ops *ops = get_dma_ops(dev);
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BUG_ON(!valid_dma_direction(dir));
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if (ops->unmap_page)
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ops->unmap_page(dev, addr, size, dir, attrs);
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debug_dma_unmap_page(dev, addr, size, dir, true);
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}
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/*
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* dma_maps_sg_attrs returns 0 on error and > 0 on success.
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* It should never return a value < 0.
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*/
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static inline int dma_map_sg_attrs(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction dir,
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struct dma_attrs *attrs)
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{
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struct dma_map_ops *ops = get_dma_ops(dev);
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int i, ents;
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struct scatterlist *s;
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for_each_sg(sg, s, nents, i)
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kmemcheck_mark_initialized(sg_virt(s), s->length);
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BUG_ON(!valid_dma_direction(dir));
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ents = ops->map_sg(dev, sg, nents, dir, attrs);
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BUG_ON(ents < 0);
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debug_dma_map_sg(dev, sg, nents, ents, dir);
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return ents;
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}
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static inline void dma_unmap_sg_attrs(struct device *dev, struct scatterlist *sg,
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int nents, enum dma_data_direction dir,
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struct dma_attrs *attrs)
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{
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struct dma_map_ops *ops = get_dma_ops(dev);
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BUG_ON(!valid_dma_direction(dir));
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debug_dma_unmap_sg(dev, sg, nents, dir);
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if (ops->unmap_sg)
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ops->unmap_sg(dev, sg, nents, dir, attrs);
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}
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static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
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size_t offset, size_t size,
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enum dma_data_direction dir)
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{
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struct dma_map_ops *ops = get_dma_ops(dev);
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dma_addr_t addr;
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kmemcheck_mark_initialized(page_address(page) + offset, size);
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BUG_ON(!valid_dma_direction(dir));
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addr = ops->map_page(dev, page, offset, size, dir, NULL);
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debug_dma_map_page(dev, page, offset, size, dir, addr, false);
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return addr;
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}
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static inline void dma_unmap_page(struct device *dev, dma_addr_t addr,
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size_t size, enum dma_data_direction dir)
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{
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struct dma_map_ops *ops = get_dma_ops(dev);
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BUG_ON(!valid_dma_direction(dir));
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if (ops->unmap_page)
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ops->unmap_page(dev, addr, size, dir, NULL);
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debug_dma_unmap_page(dev, addr, size, dir, false);
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}
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static inline void dma_sync_single_for_cpu(struct device *dev, dma_addr_t addr,
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size_t size,
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enum dma_data_direction dir)
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{
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struct dma_map_ops *ops = get_dma_ops(dev);
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BUG_ON(!valid_dma_direction(dir));
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if (ops->sync_single_for_cpu)
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ops->sync_single_for_cpu(dev, addr, size, dir);
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debug_dma_sync_single_for_cpu(dev, addr, size, dir);
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}
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static inline void dma_sync_single_for_device(struct device *dev,
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dma_addr_t addr, size_t size,
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enum dma_data_direction dir)
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{
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struct dma_map_ops *ops = get_dma_ops(dev);
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BUG_ON(!valid_dma_direction(dir));
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if (ops->sync_single_for_device)
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ops->sync_single_for_device(dev, addr, size, dir);
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debug_dma_sync_single_for_device(dev, addr, size, dir);
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}
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static inline void dma_sync_single_range_for_cpu(struct device *dev,
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dma_addr_t addr,
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unsigned long offset,
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size_t size,
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enum dma_data_direction dir)
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{
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const struct dma_map_ops *ops = get_dma_ops(dev);
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BUG_ON(!valid_dma_direction(dir));
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if (ops->sync_single_for_cpu)
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ops->sync_single_for_cpu(dev, addr + offset, size, dir);
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debug_dma_sync_single_range_for_cpu(dev, addr, offset, size, dir);
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}
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static inline void dma_sync_single_range_for_device(struct device *dev,
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dma_addr_t addr,
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unsigned long offset,
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size_t size,
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enum dma_data_direction dir)
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{
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const struct dma_map_ops *ops = get_dma_ops(dev);
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BUG_ON(!valid_dma_direction(dir));
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if (ops->sync_single_for_device)
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ops->sync_single_for_device(dev, addr + offset, size, dir);
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debug_dma_sync_single_range_for_device(dev, addr, offset, size, dir);
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}
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static inline void
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dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg,
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int nelems, enum dma_data_direction dir)
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{
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struct dma_map_ops *ops = get_dma_ops(dev);
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BUG_ON(!valid_dma_direction(dir));
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if (ops->sync_sg_for_cpu)
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ops->sync_sg_for_cpu(dev, sg, nelems, dir);
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debug_dma_sync_sg_for_cpu(dev, sg, nelems, dir);
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}
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static inline void
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dma_sync_sg_for_device(struct device *dev, struct scatterlist *sg,
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int nelems, enum dma_data_direction dir)
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{
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struct dma_map_ops *ops = get_dma_ops(dev);
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BUG_ON(!valid_dma_direction(dir));
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if (ops->sync_sg_for_device)
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ops->sync_sg_for_device(dev, sg, nelems, dir);
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debug_dma_sync_sg_for_device(dev, sg, nelems, dir);
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}
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#define dma_map_single(d, a, s, r) dma_map_single_attrs(d, a, s, r, NULL)
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#define dma_unmap_single(d, a, s, r) dma_unmap_single_attrs(d, a, s, r, NULL)
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#define dma_map_sg(d, s, n, r) dma_map_sg_attrs(d, s, n, r, NULL)
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#define dma_unmap_sg(d, s, n, r) dma_unmap_sg_attrs(d, s, n, r, NULL)
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extern int dma_common_mmap(struct device *dev, struct vm_area_struct *vma,
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void *cpu_addr, dma_addr_t dma_addr, size_t size);
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void *dma_common_contiguous_remap(struct page *page, size_t size,
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unsigned long vm_flags,
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pgprot_t prot, const void *caller);
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void *dma_common_pages_remap(struct page **pages, size_t size,
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unsigned long vm_flags, pgprot_t prot,
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const void *caller);
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void dma_common_free_remap(void *cpu_addr, size_t size, unsigned long vm_flags);
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/**
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* dma_mmap_attrs - map a coherent DMA allocation into user space
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* @dev: valid struct device pointer, or NULL for ISA and EISA-like devices
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* @vma: vm_area_struct describing requested user mapping
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* @cpu_addr: kernel CPU-view address returned from dma_alloc_attrs
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* @handle: device-view address returned from dma_alloc_attrs
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* @size: size of memory originally requested in dma_alloc_attrs
|
|
|
|
* @attrs: attributes of mapping properties requested in dma_alloc_attrs
|
|
|
|
*
|
|
|
|
* Map a coherent DMA buffer previously allocated by dma_alloc_attrs
|
|
|
|
* into user space. The coherent DMA buffer must not be freed by the
|
|
|
|
* driver until the user space mapping has been released.
|
|
|
|
*/
|
|
|
|
static inline int
|
|
|
|
dma_mmap_attrs(struct device *dev, struct vm_area_struct *vma, void *cpu_addr,
|
|
|
|
dma_addr_t dma_addr, size_t size, struct dma_attrs *attrs)
|
|
|
|
{
|
|
|
|
struct dma_map_ops *ops = get_dma_ops(dev);
|
|
|
|
BUG_ON(!ops);
|
|
|
|
if (ops->mmap)
|
|
|
|
return ops->mmap(dev, vma, cpu_addr, dma_addr, size, attrs);
|
|
|
|
return dma_common_mmap(dev, vma, cpu_addr, dma_addr, size);
|
|
|
|
}
|
|
|
|
|
|
|
|
#define dma_mmap_coherent(d, v, c, h, s) dma_mmap_attrs(d, v, c, h, s, NULL)
|
|
|
|
|
|
|
|
int
|
|
|
|
dma_common_get_sgtable(struct device *dev, struct sg_table *sgt,
|
|
|
|
void *cpu_addr, dma_addr_t dma_addr, size_t size);
|
|
|
|
|
|
|
|
static inline int
|
|
|
|
dma_get_sgtable_attrs(struct device *dev, struct sg_table *sgt, void *cpu_addr,
|
|
|
|
dma_addr_t dma_addr, size_t size, struct dma_attrs *attrs)
|
|
|
|
{
|
|
|
|
struct dma_map_ops *ops = get_dma_ops(dev);
|
|
|
|
BUG_ON(!ops);
|
|
|
|
if (ops->get_sgtable)
|
|
|
|
return ops->get_sgtable(dev, sgt, cpu_addr, dma_addr, size,
|
|
|
|
attrs);
|
|
|
|
return dma_common_get_sgtable(dev, sgt, cpu_addr, dma_addr, size);
|
|
|
|
}
|
|
|
|
|
|
|
|
#define dma_get_sgtable(d, t, v, h, s) dma_get_sgtable_attrs(d, t, v, h, s, NULL)
|
|
|
|
|
|
|
|
#ifndef arch_dma_alloc_attrs
|
|
|
|
#define arch_dma_alloc_attrs(dev, flag) (true)
|
|
|
|
#endif
|
|
|
|
|
|
|
|
static inline void *dma_alloc_attrs(struct device *dev, size_t size,
|
|
|
|
dma_addr_t *dma_handle, gfp_t flag,
|
|
|
|
struct dma_attrs *attrs)
|
|
|
|
{
|
|
|
|
struct dma_map_ops *ops = get_dma_ops(dev);
|
|
|
|
void *cpu_addr;
|
|
|
|
|
|
|
|
BUG_ON(!ops);
|
|
|
|
|
|
|
|
if (dma_alloc_from_coherent(dev, size, dma_handle, &cpu_addr))
|
|
|
|
return cpu_addr;
|
|
|
|
|
|
|
|
if (!arch_dma_alloc_attrs(&dev, &flag))
|
|
|
|
return NULL;
|
|
|
|
if (!ops->alloc)
|
|
|
|
return NULL;
|
|
|
|
|
|
|
|
cpu_addr = ops->alloc(dev, size, dma_handle, flag, attrs);
|
|
|
|
debug_dma_alloc_coherent(dev, size, *dma_handle, cpu_addr);
|
|
|
|
return cpu_addr;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void dma_free_attrs(struct device *dev, size_t size,
|
|
|
|
void *cpu_addr, dma_addr_t dma_handle,
|
|
|
|
struct dma_attrs *attrs)
|
|
|
|
{
|
|
|
|
struct dma_map_ops *ops = get_dma_ops(dev);
|
|
|
|
|
|
|
|
BUG_ON(!ops);
|
|
|
|
WARN_ON(irqs_disabled());
|
|
|
|
|
|
|
|
if (dma_release_from_coherent(dev, get_order(size), cpu_addr))
|
|
|
|
return;
|
|
|
|
|
|
|
|
if (!ops->free)
|
|
|
|
return;
|
|
|
|
|
|
|
|
debug_dma_free_coherent(dev, size, cpu_addr, dma_handle);
|
|
|
|
ops->free(dev, size, cpu_addr, dma_handle, attrs);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void *dma_alloc_coherent(struct device *dev, size_t size,
|
|
|
|
dma_addr_t *dma_handle, gfp_t flag)
|
|
|
|
{
|
|
|
|
return dma_alloc_attrs(dev, size, dma_handle, flag, NULL);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void dma_free_coherent(struct device *dev, size_t size,
|
|
|
|
void *cpu_addr, dma_addr_t dma_handle)
|
|
|
|
{
|
|
|
|
return dma_free_attrs(dev, size, cpu_addr, dma_handle, NULL);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void *dma_alloc_noncoherent(struct device *dev, size_t size,
|
|
|
|
dma_addr_t *dma_handle, gfp_t gfp)
|
|
|
|
{
|
|
|
|
DEFINE_DMA_ATTRS(attrs);
|
|
|
|
|
|
|
|
dma_set_attr(DMA_ATTR_NON_CONSISTENT, &attrs);
|
|
|
|
return dma_alloc_attrs(dev, size, dma_handle, gfp, &attrs);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void dma_free_noncoherent(struct device *dev, size_t size,
|
|
|
|
void *cpu_addr, dma_addr_t dma_handle)
|
|
|
|
{
|
|
|
|
DEFINE_DMA_ATTRS(attrs);
|
|
|
|
|
|
|
|
dma_set_attr(DMA_ATTR_NON_CONSISTENT, &attrs);
|
|
|
|
dma_free_attrs(dev, size, cpu_addr, dma_handle, &attrs);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
|
|
|
|
{
|
|
|
|
debug_dma_mapping_error(dev, dma_addr);
|
|
|
|
|
|
|
|
if (get_dma_ops(dev)->mapping_error)
|
|
|
|
return get_dma_ops(dev)->mapping_error(dev, dma_addr);
|
|
|
|
|
|
|
|
#ifdef DMA_ERROR_CODE
|
|
|
|
return dma_addr == DMA_ERROR_CODE;
|
|
|
|
#else
|
|
|
|
return 0;
|
|
|
|
#endif
|
|
|
|
}
|
|
|
|
|
|
|
|
#ifndef HAVE_ARCH_DMA_SUPPORTED
|
|
|
|
static inline int dma_supported(struct device *dev, u64 mask)
|
|
|
|
{
|
|
|
|
struct dma_map_ops *ops = get_dma_ops(dev);
|
|
|
|
|
|
|
|
if (!ops)
|
|
|
|
return 0;
|
|
|
|
if (!ops->dma_supported)
|
|
|
|
return 1;
|
|
|
|
return ops->dma_supported(dev, mask);
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifndef HAVE_ARCH_DMA_SET_MASK
|
|
|
|
static inline int dma_set_mask(struct device *dev, u64 mask)
|
|
|
|
{
|
|
|
|
struct dma_map_ops *ops = get_dma_ops(dev);
|
|
|
|
|
|
|
|
if (ops->set_dma_mask)
|
|
|
|
return ops->set_dma_mask(dev, mask);
|
|
|
|
|
|
|
|
if (!dev->dma_mask || !dma_supported(dev, mask))
|
|
|
|
return -EIO;
|
|
|
|
*dev->dma_mask = mask;
|
|
|
|
return 0;
|
|
|
|
}
|
2007-07-16 10:40:26 +04:00
|
|
|
#endif
|
2005-04-17 02:20:36 +04:00
|
|
|
|
2008-09-12 14:42:34 +04:00
|
|
|
static inline u64 dma_get_mask(struct device *dev)
|
|
|
|
{
|
2008-09-18 21:02:05 +04:00
|
|
|
if (dev && dev->dma_mask && *dev->dma_mask)
|
2008-09-12 14:42:34 +04:00
|
|
|
return *dev->dma_mask;
|
2009-04-07 06:01:15 +04:00
|
|
|
return DMA_BIT_MASK(32);
|
2008-09-12 14:42:34 +04:00
|
|
|
}
|
|
|
|
|
2012-03-20 23:33:01 +04:00
|
|
|
#ifdef CONFIG_ARCH_HAS_DMA_SET_COHERENT_MASK
|
2010-09-23 00:04:55 +04:00
|
|
|
int dma_set_coherent_mask(struct device *dev, u64 mask);
|
|
|
|
#else
|
2010-03-11 02:23:39 +03:00
|
|
|
static inline int dma_set_coherent_mask(struct device *dev, u64 mask)
|
|
|
|
{
|
|
|
|
if (!dma_supported(dev, mask))
|
|
|
|
return -EIO;
|
|
|
|
dev->coherent_dma_mask = mask;
|
|
|
|
return 0;
|
|
|
|
}
|
2010-09-23 00:04:55 +04:00
|
|
|
#endif
|
2010-03-11 02:23:39 +03:00
|
|
|
|
2013-06-26 16:49:44 +04:00
|
|
|
/*
|
|
|
|
* Set both the DMA mask and the coherent DMA mask to the same thing.
|
|
|
|
* Note that we don't check the return value from dma_set_coherent_mask()
|
|
|
|
* as the DMA API guarantees that the coherent DMA mask can be set to
|
|
|
|
* the same or smaller than the streaming DMA mask.
|
|
|
|
*/
|
|
|
|
static inline int dma_set_mask_and_coherent(struct device *dev, u64 mask)
|
|
|
|
{
|
|
|
|
int rc = dma_set_mask(dev, mask);
|
|
|
|
if (rc == 0)
|
|
|
|
dma_set_coherent_mask(dev, mask);
|
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
2013-06-27 15:21:45 +04:00
|
|
|
/*
|
|
|
|
* Similar to the above, except it deals with the case where the device
|
|
|
|
* does not have dev->dma_mask appropriately setup.
|
|
|
|
*/
|
|
|
|
static inline int dma_coerce_mask_and_coherent(struct device *dev, u64 mask)
|
|
|
|
{
|
|
|
|
dev->dma_mask = &dev->coherent_dma_mask;
|
|
|
|
return dma_set_mask_and_coherent(dev, mask);
|
|
|
|
}
|
|
|
|
|
2005-04-17 02:20:36 +04:00
|
|
|
extern u64 dma_get_required_mask(struct device *dev);
|
|
|
|
|
2014-08-27 18:49:10 +04:00
|
|
|
#ifndef arch_setup_dma_ops
|
2014-08-27 19:24:20 +04:00
|
|
|
static inline void arch_setup_dma_ops(struct device *dev, u64 dma_base,
|
|
|
|
u64 size, struct iommu_ops *iommu,
|
|
|
|
bool coherent) { }
|
|
|
|
#endif
|
|
|
|
|
|
|
|
#ifndef arch_teardown_dma_ops
|
|
|
|
static inline void arch_teardown_dma_ops(struct device *dev) { }
|
2014-04-24 19:30:04 +04:00
|
|
|
#endif
|
|
|
|
|
2008-02-05 09:27:55 +03:00
|
|
|
static inline unsigned int dma_get_max_seg_size(struct device *dev)
|
|
|
|
{
|
2015-11-07 03:32:51 +03:00
|
|
|
if (dev->dma_parms && dev->dma_parms->max_segment_size)
|
|
|
|
return dev->dma_parms->max_segment_size;
|
|
|
|
return SZ_64K;
|
2008-02-05 09:27:55 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
static inline unsigned int dma_set_max_seg_size(struct device *dev,
|
|
|
|
unsigned int size)
|
|
|
|
{
|
|
|
|
if (dev->dma_parms) {
|
|
|
|
dev->dma_parms->max_segment_size = size;
|
|
|
|
return 0;
|
2015-11-07 03:32:51 +03:00
|
|
|
}
|
|
|
|
return -EIO;
|
2008-02-05 09:27:55 +03:00
|
|
|
}
|
|
|
|
|
2008-02-05 09:28:13 +03:00
|
|
|
static inline unsigned long dma_get_seg_boundary(struct device *dev)
|
|
|
|
{
|
2015-11-07 03:32:51 +03:00
|
|
|
if (dev->dma_parms && dev->dma_parms->segment_boundary_mask)
|
|
|
|
return dev->dma_parms->segment_boundary_mask;
|
|
|
|
return DMA_BIT_MASK(32);
|
2008-02-05 09:28:13 +03:00
|
|
|
}
|
|
|
|
|
|
|
|
static inline int dma_set_seg_boundary(struct device *dev, unsigned long mask)
|
|
|
|
{
|
|
|
|
if (dev->dma_parms) {
|
|
|
|
dev->dma_parms->segment_boundary_mask = mask;
|
|
|
|
return 0;
|
2015-11-07 03:32:51 +03:00
|
|
|
}
|
|
|
|
return -EIO;
|
2008-02-05 09:28:13 +03:00
|
|
|
}
|
|
|
|
|
2013-07-29 17:18:48 +04:00
|
|
|
#ifndef dma_max_pfn
|
|
|
|
static inline unsigned long dma_max_pfn(struct device *dev)
|
|
|
|
{
|
|
|
|
return *dev->dma_mask >> PAGE_SHIFT;
|
|
|
|
}
|
|
|
|
#endif
|
|
|
|
|
2011-11-03 00:39:33 +04:00
|
|
|
static inline void *dma_zalloc_coherent(struct device *dev, size_t size,
|
|
|
|
dma_addr_t *dma_handle, gfp_t flag)
|
|
|
|
{
|
2013-08-27 09:45:23 +04:00
|
|
|
void *ret = dma_alloc_coherent(dev, size, dma_handle,
|
|
|
|
flag | __GFP_ZERO);
|
2011-11-03 00:39:33 +04:00
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2010-08-13 11:39:18 +04:00
|
|
|
#ifdef CONFIG_HAS_DMA
|
2010-08-11 05:03:22 +04:00
|
|
|
static inline int dma_get_cache_alignment(void)
|
|
|
|
{
|
|
|
|
#ifdef ARCH_DMA_MINALIGN
|
|
|
|
return ARCH_DMA_MINALIGN;
|
|
|
|
#endif
|
|
|
|
return 1;
|
|
|
|
}
|
2010-08-13 11:39:18 +04:00
|
|
|
#endif
|
2010-08-11 05:03:22 +04:00
|
|
|
|
2005-04-17 02:20:36 +04:00
|
|
|
/* flags for the coherent memory api */
|
|
|
|
#define DMA_MEMORY_MAP 0x01
|
|
|
|
#define DMA_MEMORY_IO 0x02
|
|
|
|
#define DMA_MEMORY_INCLUDES_CHILDREN 0x04
|
|
|
|
#define DMA_MEMORY_EXCLUSIVE 0x08
|
|
|
|
|
2016-01-21 02:02:09 +03:00
|
|
|
#ifdef CONFIG_HAVE_GENERIC_DMA_COHERENT
|
|
|
|
int dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
|
|
|
|
dma_addr_t device_addr, size_t size, int flags);
|
|
|
|
void dma_release_declared_memory(struct device *dev);
|
|
|
|
void *dma_mark_declared_memory_occupied(struct device *dev,
|
|
|
|
dma_addr_t device_addr, size_t size);
|
|
|
|
#else
|
2005-04-17 02:20:36 +04:00
|
|
|
static inline int
|
2014-05-21 02:54:22 +04:00
|
|
|
dma_declare_coherent_memory(struct device *dev, phys_addr_t phys_addr,
|
2005-04-17 02:20:36 +04:00
|
|
|
dma_addr_t device_addr, size_t size, int flags)
|
|
|
|
{
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void
|
|
|
|
dma_release_declared_memory(struct device *dev)
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void *
|
|
|
|
dma_mark_declared_memory_occupied(struct device *dev,
|
|
|
|
dma_addr_t device_addr, size_t size)
|
|
|
|
{
|
|
|
|
return ERR_PTR(-EBUSY);
|
|
|
|
}
|
2016-01-21 02:02:09 +03:00
|
|
|
#endif /* CONFIG_HAVE_GENERIC_DMA_COHERENT */
|
2005-04-17 02:20:36 +04:00
|
|
|
|
devres: device resource management
Implement device resource management, in short, devres. A device
driver can allocate arbirary size of devres data which is associated
with a release function. On driver detach, release function is
invoked on the devres data, then, devres data is freed.
devreses are typed by associated release functions. Some devreses are
better represented by single instance of the type while others need
multiple instances sharing the same release function. Both usages are
supported.
devreses can be grouped using devres group such that a device driver
can easily release acquired resources halfway through initialization
or selectively release resources (e.g. resources for port 1 out of 4
ports).
This patch adds devres core including documentation and the following
managed interfaces.
* alloc/free : devm_kzalloc(), devm_kzfree()
* IO region : devm_request_region(), devm_release_region()
* IRQ : devm_request_irq(), devm_free_irq()
* DMA : dmam_alloc_coherent(), dmam_free_coherent(),
dmam_declare_coherent_memory(), dmam_pool_create(),
dmam_pool_destroy()
* PCI : pcim_enable_device(), pcim_pin_device(), pci_is_managed()
* iomap : devm_ioport_map(), devm_ioport_unmap(), devm_ioremap(),
devm_ioremap_nocache(), devm_iounmap(), pcim_iomap_table(),
pcim_iomap(), pcim_iounmap()
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-01-20 10:00:26 +03:00
|
|
|
/*
|
|
|
|
* Managed DMA API
|
|
|
|
*/
|
|
|
|
extern void *dmam_alloc_coherent(struct device *dev, size_t size,
|
|
|
|
dma_addr_t *dma_handle, gfp_t gfp);
|
|
|
|
extern void dmam_free_coherent(struct device *dev, size_t size, void *vaddr,
|
|
|
|
dma_addr_t dma_handle);
|
|
|
|
extern void *dmam_alloc_noncoherent(struct device *dev, size_t size,
|
|
|
|
dma_addr_t *dma_handle, gfp_t gfp);
|
|
|
|
extern void dmam_free_noncoherent(struct device *dev, size_t size, void *vaddr,
|
|
|
|
dma_addr_t dma_handle);
|
2016-01-21 02:02:09 +03:00
|
|
|
#ifdef CONFIG_HAVE_GENERIC_DMA_COHERENT
|
2014-05-21 02:54:22 +04:00
|
|
|
extern int dmam_declare_coherent_memory(struct device *dev,
|
|
|
|
phys_addr_t phys_addr,
|
devres: device resource management
Implement device resource management, in short, devres. A device
driver can allocate arbirary size of devres data which is associated
with a release function. On driver detach, release function is
invoked on the devres data, then, devres data is freed.
devreses are typed by associated release functions. Some devreses are
better represented by single instance of the type while others need
multiple instances sharing the same release function. Both usages are
supported.
devreses can be grouped using devres group such that a device driver
can easily release acquired resources halfway through initialization
or selectively release resources (e.g. resources for port 1 out of 4
ports).
This patch adds devres core including documentation and the following
managed interfaces.
* alloc/free : devm_kzalloc(), devm_kzfree()
* IO region : devm_request_region(), devm_release_region()
* IRQ : devm_request_irq(), devm_free_irq()
* DMA : dmam_alloc_coherent(), dmam_free_coherent(),
dmam_declare_coherent_memory(), dmam_pool_create(),
dmam_pool_destroy()
* PCI : pcim_enable_device(), pcim_pin_device(), pci_is_managed()
* iomap : devm_ioport_map(), devm_ioport_unmap(), devm_ioremap(),
devm_ioremap_nocache(), devm_iounmap(), pcim_iomap_table(),
pcim_iomap(), pcim_iounmap()
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-01-20 10:00:26 +03:00
|
|
|
dma_addr_t device_addr, size_t size,
|
|
|
|
int flags);
|
|
|
|
extern void dmam_release_declared_memory(struct device *dev);
|
2016-01-21 02:02:09 +03:00
|
|
|
#else /* CONFIG_HAVE_GENERIC_DMA_COHERENT */
|
devres: device resource management
Implement device resource management, in short, devres. A device
driver can allocate arbirary size of devres data which is associated
with a release function. On driver detach, release function is
invoked on the devres data, then, devres data is freed.
devreses are typed by associated release functions. Some devreses are
better represented by single instance of the type while others need
multiple instances sharing the same release function. Both usages are
supported.
devreses can be grouped using devres group such that a device driver
can easily release acquired resources halfway through initialization
or selectively release resources (e.g. resources for port 1 out of 4
ports).
This patch adds devres core including documentation and the following
managed interfaces.
* alloc/free : devm_kzalloc(), devm_kzfree()
* IO region : devm_request_region(), devm_release_region()
* IRQ : devm_request_irq(), devm_free_irq()
* DMA : dmam_alloc_coherent(), dmam_free_coherent(),
dmam_declare_coherent_memory(), dmam_pool_create(),
dmam_pool_destroy()
* PCI : pcim_enable_device(), pcim_pin_device(), pci_is_managed()
* iomap : devm_ioport_map(), devm_ioport_unmap(), devm_ioremap(),
devm_ioremap_nocache(), devm_iounmap(), pcim_iomap_table(),
pcim_iomap(), pcim_iounmap()
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-01-20 10:00:26 +03:00
|
|
|
static inline int dmam_declare_coherent_memory(struct device *dev,
|
2014-05-21 02:54:22 +04:00
|
|
|
phys_addr_t phys_addr, dma_addr_t device_addr,
|
devres: device resource management
Implement device resource management, in short, devres. A device
driver can allocate arbirary size of devres data which is associated
with a release function. On driver detach, release function is
invoked on the devres data, then, devres data is freed.
devreses are typed by associated release functions. Some devreses are
better represented by single instance of the type while others need
multiple instances sharing the same release function. Both usages are
supported.
devreses can be grouped using devres group such that a device driver
can easily release acquired resources halfway through initialization
or selectively release resources (e.g. resources for port 1 out of 4
ports).
This patch adds devres core including documentation and the following
managed interfaces.
* alloc/free : devm_kzalloc(), devm_kzfree()
* IO region : devm_request_region(), devm_release_region()
* IRQ : devm_request_irq(), devm_free_irq()
* DMA : dmam_alloc_coherent(), dmam_free_coherent(),
dmam_declare_coherent_memory(), dmam_pool_create(),
dmam_pool_destroy()
* PCI : pcim_enable_device(), pcim_pin_device(), pci_is_managed()
* iomap : devm_ioport_map(), devm_ioport_unmap(), devm_ioremap(),
devm_ioremap_nocache(), devm_iounmap(), pcim_iomap_table(),
pcim_iomap(), pcim_iounmap()
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-01-20 10:00:26 +03:00
|
|
|
size_t size, gfp_t gfp)
|
|
|
|
{
|
|
|
|
return 0;
|
|
|
|
}
|
2005-04-17 02:20:36 +04:00
|
|
|
|
devres: device resource management
Implement device resource management, in short, devres. A device
driver can allocate arbirary size of devres data which is associated
with a release function. On driver detach, release function is
invoked on the devres data, then, devres data is freed.
devreses are typed by associated release functions. Some devreses are
better represented by single instance of the type while others need
multiple instances sharing the same release function. Both usages are
supported.
devreses can be grouped using devres group such that a device driver
can easily release acquired resources halfway through initialization
or selectively release resources (e.g. resources for port 1 out of 4
ports).
This patch adds devres core including documentation and the following
managed interfaces.
* alloc/free : devm_kzalloc(), devm_kzfree()
* IO region : devm_request_region(), devm_release_region()
* IRQ : devm_request_irq(), devm_free_irq()
* DMA : dmam_alloc_coherent(), dmam_free_coherent(),
dmam_declare_coherent_memory(), dmam_pool_create(),
dmam_pool_destroy()
* PCI : pcim_enable_device(), pcim_pin_device(), pci_is_managed()
* iomap : devm_ioport_map(), devm_ioport_unmap(), devm_ioremap(),
devm_ioremap_nocache(), devm_iounmap(), pcim_iomap_table(),
pcim_iomap(), pcim_iounmap()
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-01-20 10:00:26 +03:00
|
|
|
static inline void dmam_release_declared_memory(struct device *dev)
|
|
|
|
{
|
|
|
|
}
|
2016-01-21 02:02:09 +03:00
|
|
|
#endif /* CONFIG_HAVE_GENERIC_DMA_COHERENT */
|
2005-04-17 02:20:36 +04:00
|
|
|
|
2014-06-27 13:56:58 +04:00
|
|
|
static inline void *dma_alloc_writecombine(struct device *dev, size_t size,
|
|
|
|
dma_addr_t *dma_addr, gfp_t gfp)
|
|
|
|
{
|
|
|
|
DEFINE_DMA_ATTRS(attrs);
|
|
|
|
dma_set_attr(DMA_ATTR_WRITE_COMBINE, &attrs);
|
|
|
|
return dma_alloc_attrs(dev, size, dma_addr, gfp, &attrs);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void dma_free_writecombine(struct device *dev, size_t size,
|
|
|
|
void *cpu_addr, dma_addr_t dma_addr)
|
|
|
|
{
|
|
|
|
DEFINE_DMA_ATTRS(attrs);
|
|
|
|
dma_set_attr(DMA_ATTR_WRITE_COMBINE, &attrs);
|
|
|
|
return dma_free_attrs(dev, size, cpu_addr, dma_addr, &attrs);
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline int dma_mmap_writecombine(struct device *dev,
|
|
|
|
struct vm_area_struct *vma,
|
|
|
|
void *cpu_addr, dma_addr_t dma_addr,
|
|
|
|
size_t size)
|
|
|
|
{
|
|
|
|
DEFINE_DMA_ATTRS(attrs);
|
|
|
|
dma_set_attr(DMA_ATTR_WRITE_COMBINE, &attrs);
|
|
|
|
return dma_mmap_attrs(dev, vma, cpu_addr, dma_addr, size, &attrs);
|
|
|
|
}
|
2008-04-29 12:00:30 +04:00
|
|
|
|
2010-03-11 02:23:31 +03:00
|
|
|
#ifdef CONFIG_NEED_DMA_MAP_STATE
|
|
|
|
#define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME) dma_addr_t ADDR_NAME
|
|
|
|
#define DEFINE_DMA_UNMAP_LEN(LEN_NAME) __u32 LEN_NAME
|
|
|
|
#define dma_unmap_addr(PTR, ADDR_NAME) ((PTR)->ADDR_NAME)
|
|
|
|
#define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) (((PTR)->ADDR_NAME) = (VAL))
|
|
|
|
#define dma_unmap_len(PTR, LEN_NAME) ((PTR)->LEN_NAME)
|
|
|
|
#define dma_unmap_len_set(PTR, LEN_NAME, VAL) (((PTR)->LEN_NAME) = (VAL))
|
|
|
|
#else
|
|
|
|
#define DEFINE_DMA_UNMAP_ADDR(ADDR_NAME)
|
|
|
|
#define DEFINE_DMA_UNMAP_LEN(LEN_NAME)
|
|
|
|
#define dma_unmap_addr(PTR, ADDR_NAME) (0)
|
|
|
|
#define dma_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
|
|
|
|
#define dma_unmap_len(PTR, LEN_NAME) (0)
|
|
|
|
#define dma_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
|
|
|
|
#endif
|
|
|
|
|
devres: device resource management
Implement device resource management, in short, devres. A device
driver can allocate arbirary size of devres data which is associated
with a release function. On driver detach, release function is
invoked on the devres data, then, devres data is freed.
devreses are typed by associated release functions. Some devreses are
better represented by single instance of the type while others need
multiple instances sharing the same release function. Both usages are
supported.
devreses can be grouped using devres group such that a device driver
can easily release acquired resources halfway through initialization
or selectively release resources (e.g. resources for port 1 out of 4
ports).
This patch adds devres core including documentation and the following
managed interfaces.
* alloc/free : devm_kzalloc(), devm_kzfree()
* IO region : devm_request_region(), devm_release_region()
* IRQ : devm_request_irq(), devm_free_irq()
* DMA : dmam_alloc_coherent(), dmam_free_coherent(),
dmam_declare_coherent_memory(), dmam_pool_create(),
dmam_pool_destroy()
* PCI : pcim_enable_device(), pcim_pin_device(), pci_is_managed()
* iomap : devm_ioport_map(), devm_ioport_unmap(), devm_ioremap(),
devm_ioremap_nocache(), devm_iounmap(), pcim_iomap_table(),
pcim_iomap(), pcim_iounmap()
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
2007-01-20 10:00:26 +03:00
|
|
|
#endif
|