2019-06-03 08:44:50 +03:00
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// SPDX-License-Identifier: GPL-2.0-only
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2014-10-06 17:48:43 +04:00
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/*
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* Copyright (C) 2014 Free Electrons
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* Copyright (C) 2014 Atmel
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*
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* Author: Boris BREZILLON <boris.brezillon@free-electrons.com>
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*/
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#include <linux/clk.h>
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2015-07-07 20:16:43 +03:00
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#include <linux/iopoll.h>
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2014-10-06 17:48:43 +04:00
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#include <linux/mfd/atmel-hlcdc.h>
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#include <linux/mfd/core.h>
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#include <linux/module.h>
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2018-06-20 08:47:28 +03:00
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#include <linux/mod_devicetable.h>
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2014-10-06 17:48:43 +04:00
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#define ATMEL_HLCDC_REG_MAX (0x4000 - 0x4)
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struct atmel_hlcdc_regmap {
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void __iomem *regs;
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};
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2014-10-06 17:48:43 +04:00
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static const struct mfd_cell atmel_hlcdc_cells[] = {
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{
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.name = "atmel-hlcdc-pwm",
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.of_compatible = "atmel,hlcdc-pwm",
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},
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{
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.name = "atmel-hlcdc-dc",
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.of_compatible = "atmel,hlcdc-display-controller",
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},
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};
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2015-07-07 20:16:43 +03:00
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static int regmap_atmel_hlcdc_reg_write(void *context, unsigned int reg,
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unsigned int val)
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{
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struct atmel_hlcdc_regmap *hregmap = context;
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if (reg <= ATMEL_HLCDC_DIS) {
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u32 status;
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2016-09-06 15:19:29 +03:00
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readl_poll_timeout_atomic(hregmap->regs + ATMEL_HLCDC_SR,
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status, !(status & ATMEL_HLCDC_SIP),
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1, 100);
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}
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writel(val, hregmap->regs + reg);
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return 0;
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}
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static int regmap_atmel_hlcdc_reg_read(void *context, unsigned int reg,
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unsigned int *val)
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{
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struct atmel_hlcdc_regmap *hregmap = context;
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*val = readl(hregmap->regs + reg);
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return 0;
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}
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static const struct regmap_config atmel_hlcdc_regmap_config = {
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.reg_bits = 32,
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.val_bits = 32,
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.reg_stride = 4,
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.max_register = ATMEL_HLCDC_REG_MAX,
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.reg_write = regmap_atmel_hlcdc_reg_write,
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.reg_read = regmap_atmel_hlcdc_reg_read,
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.fast_io = true,
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};
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static int atmel_hlcdc_probe(struct platform_device *pdev)
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{
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struct atmel_hlcdc_regmap *hregmap;
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struct device *dev = &pdev->dev;
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struct atmel_hlcdc *hlcdc;
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struct resource *res;
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hregmap = devm_kzalloc(dev, sizeof(*hregmap), GFP_KERNEL);
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if (!hregmap)
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return -ENOMEM;
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hlcdc = devm_kzalloc(dev, sizeof(*hlcdc), GFP_KERNEL);
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if (!hlcdc)
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return -ENOMEM;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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hregmap->regs = devm_ioremap_resource(dev, res);
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if (IS_ERR(hregmap->regs))
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return PTR_ERR(hregmap->regs);
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hlcdc->irq = platform_get_irq(pdev, 0);
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if (hlcdc->irq < 0)
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return hlcdc->irq;
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hlcdc->periph_clk = devm_clk_get(dev, "periph_clk");
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if (IS_ERR(hlcdc->periph_clk)) {
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dev_err(dev, "failed to get peripheral clock\n");
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return PTR_ERR(hlcdc->periph_clk);
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}
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hlcdc->sys_clk = devm_clk_get(dev, "sys_clk");
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if (IS_ERR(hlcdc->sys_clk)) {
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dev_err(dev, "failed to get system clock\n");
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return PTR_ERR(hlcdc->sys_clk);
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}
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hlcdc->slow_clk = devm_clk_get(dev, "slow_clk");
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if (IS_ERR(hlcdc->slow_clk)) {
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dev_err(dev, "failed to get slow clock\n");
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return PTR_ERR(hlcdc->slow_clk);
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}
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2015-07-07 20:16:43 +03:00
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hlcdc->regmap = devm_regmap_init(dev, NULL, hregmap,
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&atmel_hlcdc_regmap_config);
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if (IS_ERR(hlcdc->regmap))
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return PTR_ERR(hlcdc->regmap);
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dev_set_drvdata(dev, hlcdc);
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2016-04-07 21:42:59 +03:00
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return devm_mfd_add_devices(dev, -1, atmel_hlcdc_cells,
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ARRAY_SIZE(atmel_hlcdc_cells),
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NULL, 0, NULL);
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2014-10-06 17:48:43 +04:00
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}
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static const struct of_device_id atmel_hlcdc_match[] = {
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2015-07-31 19:45:54 +03:00
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{ .compatible = "atmel,at91sam9n12-hlcdc" },
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{ .compatible = "atmel,at91sam9x5-hlcdc" },
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{ .compatible = "atmel,sama5d2-hlcdc" },
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{ .compatible = "atmel,sama5d3-hlcdc" },
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{ .compatible = "atmel,sama5d4-hlcdc" },
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2019-03-05 13:07:52 +03:00
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{ .compatible = "microchip,sam9x60-hlcdc" },
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{ /* sentinel */ },
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};
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2015-09-17 21:15:44 +03:00
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MODULE_DEVICE_TABLE(of, atmel_hlcdc_match);
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2014-10-06 17:48:43 +04:00
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static struct platform_driver atmel_hlcdc_driver = {
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.probe = atmel_hlcdc_probe,
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.driver = {
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.name = "atmel-hlcdc",
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.of_match_table = atmel_hlcdc_match,
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},
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};
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module_platform_driver(atmel_hlcdc_driver);
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MODULE_ALIAS("platform:atmel-hlcdc");
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MODULE_AUTHOR("Boris Brezillon <boris.brezillon@free-electrons.com>");
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MODULE_DESCRIPTION("Atmel HLCDC driver");
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MODULE_LICENSE("GPL v2");
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