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WSL2-Linux-Kernel
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WSL2-Linux-Kernel/drivers/clk/Makefile

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ARM: u300: convert to common clock This converts the U300 clock implementation over to use the common struct clk and moves the implementation down into drivers/clk. Since VCO isn't used in tree it was removed, it's not hard to put it back in if need be. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> [mturquette@linaro.org: trivial Makefile conflict] Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-06-20 01:44:25 +04:00
# common clock types
ARM: 7534/1: clk: Make the managed clk functions generically available The managed clk functions are currently only available when the generic clk lookup framework is build. But the managed clk functions are merely wrappers around clk_get and clk_put and do not depend on any specifics of the generic lookup functions and there are still quite a few custom implementations of the clk API. So make the managed functions available whenever the clk API is implemented. The patch also removes the custom implementation of devm_clk_get for the coldfire platform. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Greg Ungerer <gerg@uclinux.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2012-09-11 22:56:23 +04:00
obj-$(CONFIG_HAVE_CLK) += clk-devres.o
ARM: 6483/1: arm & sh: factorised duplicated clkdev.c factorise some generic infrastructure to assist looking up struct clks for the ARM & SH architecture. as the code is identical at 99% put the arch specific code for allocation as example in asm/clkdev.h Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> Acked-by: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2010-11-17 12:04:33 +03:00
obj-$(CONFIG_CLKDEV_LOOKUP) += clkdev.o
clk: beautify Makefile The list of common clock types was getting a bit unmanageable. This patch puts only one file on each line and reorders the object files alphabetically. Also a newline is added to separate the sections. Reported-by: Stephen Boyd <sboyd@codeaurora.org> Cc: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-01-19 01:00:05 +04:00
obj-$(CONFIG_COMMON_CLK) += clk.o
obj-$(CONFIG_COMMON_CLK) += clk-divider.o
obj-$(CONFIG_COMMON_CLK) += clk-fixed-factor.o
obj-$(CONFIG_COMMON_CLK) += clk-fixed-rate.o
obj-$(CONFIG_COMMON_CLK) += clk-gate.o
obj-$(CONFIG_COMMON_CLK) += clk-mux.o
clk: Add composite clock type Not all clocks are required to be decomposed into basic clock types but at the same time want to use the functionality provided by these basic clock types instead of duplicating. For example, Tegra SoC has ~100 clocks which can be decomposed into Mux -> Div -> Gate clock types making the clock count to ~300. Also, parent change operation can not be performed on gate clock which forces to use mux clock in driver if want to change the parent. Instead aggregate the basic clock types functionality into one clock and just use this clock for all operations. This clock type re-uses the functionality of basic clock types and not limited to basic clock types but any hardware-specific implementation. Signed-off-by: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-03-20 16:00:34 +04:00
obj-$(CONFIG_COMMON_CLK) += clk-composite.o
clk: new basic clk type for fractional divider Fractional divider clocks are fairly common. This adds basic type for them. Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2014-05-15 17:40:25 +04:00
obj-$(CONFIG_COMMON_CLK) += clk-fractional-divider.o
clk: Support for clock parents and rates assigned from device tree This patch adds helper functions to configure clock parents and rates as specified through 'assigned-clock-parents', 'assigned-clock-rates' DT properties for a clock provider or clock consumer device. The helpers are now being called by the bus code for the platform, I2C and SPI busses, before the driver probing and also in the clock core after registration of a clock provider. Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Acked-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-06-18 19:29:32 +04:00
ifeq ($(CONFIG_OF), y)
obj-$(CONFIG_COMMON_CLK) += clk-conf.o
endif
clk: beautify Makefile The list of common clock types was getting a bit unmanageable. This patch puts only one file on each line and reorders the object files alphabetically. Also a newline is added to separate the sections. Reported-by: Stephen Boyd <sboyd@codeaurora.org> Cc: Prashant Gaikwad <pgaikwad@nvidia.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-01-19 01:00:05 +04:00
clk: sort Makefile Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-28 01:04:49 +04:00
# hardware specific clock types
# please keep this section sorted lexicographically by file/directory path name
obj-$(CONFIG_COMMON_CLK_AXI_CLKGEN) += clk-axi-clkgen.o
clk: Add clock driver for AXM55xx SoC Add clk driver to support clock blocks found on the AXM55xx devices. The driver provides clock implementations for three different types of clock devices on the AXM55xx device: PLL clock, a clock divider and a clock mux. Signed-off-by: Anders Berg <anders.berg@lsi.com> Cc: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-05-15 17:42:25 +04:00
obj-$(CONFIG_ARCH_AXXIA) += clk-axm5516.o
clk: sort Makefile Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-28 01:04:49 +04:00
obj-$(CONFIG_ARCH_BCM2835) += clk-bcm2835.o
clk: Add CLPS711X clk driver This adds the clock driver for Cirrus Logic CLPS711X series SoCs using common clock infrastructure. Designed primarily for migration CLPS711X subarch for multiplatform & DT, for this as the "OF" and "non-OF" calls implemented. Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-07-13 08:37:52 +04:00
obj-$(CONFIG_ARCH_CLPS711X) += clk-clps711x.o
clk: sort Makefile Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-28 01:04:49 +04:00
obj-$(CONFIG_ARCH_EFM32) += clk-efm32gg.o
obj-$(CONFIG_ARCH_HIGHBANK) += clk-highbank.o
obj-$(CONFIG_MACH_LOONGSON1) += clk-ls1x.o
obj-$(CONFIG_COMMON_CLK_MAX77686) += clk-max77686.o
clk: add MOXA ART SoCs clock driver MOXA ART SoCs allow to determine PLL output and APB frequencies by reading registers holding multiplier and divisor information. Add a clock driver for this SoC. Signed-off-by: Jonas Jensen <jonas.jensen@gmail.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-28 15:09:11 +04:00
obj-$(CONFIG_ARCH_MOXART) += clk-moxart.o
clk: sort Makefile Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-28 01:04:49 +04:00
obj-$(CONFIG_ARCH_NOMADIK) += clk-nomadik.o
obj-$(CONFIG_ARCH_NSPIRE) += clk-nspire.o
clk: Add driver for Palmas clk32kg and clk32kgaudio clocks Palmas class of devices can provide 32K clock(s) to be used by other devices on the board. Depending on the actual device the provided clocks can be: CLK32K_KG and CLK32K_KGAUDIO or only one: CLK32K_KG (TPS659039 for example) Use separate compatible flags for the two 32K clock. A system which needs or have only one of the 32k clock from Palmas will need to add node(s) for each clock as separate section in the dts file. The two compatible property is: "ti,palmas-clk32kg" for clk32kg clock "ti,palmas-clk32kgaudio" for clk32kgaudio clock Apart from the register control of the clocks - which is done via the clock API there is a posibility to enable the external sleep control. In this way the clock can be enabled/disabled on demand by the user of the clock. See the documentation for more details. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Reviewed-by: Nishanth Menon <nm@ti.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-06-27 10:01:11 +04:00
obj-$(CONFIG_COMMON_CLK_PALMAS) += clk-palmas.o
clk: sort Makefile Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-28 01:04:49 +04:00
obj-$(CONFIG_CLK_PPC_CORENET) += clk-ppc-corenet.o
obj-$(CONFIG_COMMON_CLK_S2MPS11) += clk-s2mps11.o
obj-$(CONFIG_COMMON_CLK_SI5351) += clk-si5351.o
obj-$(CONFIG_COMMON_CLK_SI570) += clk-si570.o
obj-$(CONFIG_CLK_TWL6040) += clk-twl6040.o
obj-$(CONFIG_ARCH_U300) += clk-u300.o
obj-$(CONFIG_ARCH_VT8500) += clk-vt8500.o
obj-$(CONFIG_COMMON_CLK_WM831X) += clk-wm831x.o
obj-$(CONFIG_COMMON_CLK_XGENE) += clk-xgene.o
The second half of the clock framework pull requeust for 3.14 is dominated by platform support for Qualcomm's MSM SoCs, DT binding updates for TI's OMAP-ish processors and additional support for Samsung chips. Additionally there are other smaller clock driver changes and several last minute fixes. This pull request also includes the HiSilicon support that depends on the already-merged arm-soc pull request. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQIcBAABAgAGBQJS5tJoAAoJEDqPOy9afJhJg2YP/1hZueLNwJwtasgSlrjPAKai +VDc1Sn0lB7p0D0r0cyd6kUPlAMBwZOMJ3wLvbI+z/yItCfXNxIDpaQszMoHmBox Dgj3BmnM0GJgtE124qKynFdDqJ09aHcJZ9iEXQAxwo3mWvmHW8U2P2nDQJbxz3Qm i/F7KzpXk6seUV7f14doPD0PY5CVRm0p5dfMXLsroLvWjrvTqA4imbAuOeHI1UuG siboNe94nLcAj8iBQanugpKjlKT4+jjeTCfCuJ2OeS5o2Lz3KO2BYr6HekbsNZiz atydhPO840fCNxR/SSKAgIzr9FjQ5Q2fJvF7m+6XyFND9gZ/yjN14LdlTU1SX3kD 1yB8OSqKjjLOBU5P1UwvD8NL8kldwoynYT7T4JqYIZQHZyjNGToBZ1SzUZ/yVsnE sMbfVC8X5RMEJzGIWNbm6kz+37CRQWNn4aPghGjkyLDGpyVf7dn+jlGBgGiahb8g io1Ir35/FykHAVx16veYD09sB+VYAeD23P/nuP7MbdCzYLmu4ibAiJyBiPQvcxmq YZWENS2j4NvG2XdHW07SpWC0U0mr5MLOkFjVkcW8h+aaT3FJUwaP0wjRyWoaF3Dt sEZ10OJLuXK5x3oiLFhuqHwGSGy+XoIq3FL00jjkib6uKcv2hNYQ+ZpPzG/CDbNx ndMT57cycXMYrOp8jklw =WRJD -----END PGP SIGNATURE----- Merge tag 'clk-for-linus-3.14-part2' of git://git.linaro.org/people/mike.turquette/linux Pull more clock framework changes from Mike Turquette: "The second half of the clock framework pull requeust for 3.14 is dominated by platform support for Qualcomm's MSM SoCs, DT binding updates for TI's OMAP-ish processors and additional support for Samsung chips. Additionally there are other smaller clock driver changes and several last minute fixes. This pull request also includes the HiSilicon support that depends on the already-merged arm-soc pull request" [ Fix up stupid compile error in the source tree with evil merge - Grumpy Linus ] * tag 'clk-for-linus-3.14-part2' of git://git.linaro.org/people/mike.turquette/linux: (49 commits) clk: sort Makefile clk: sunxi: fix overflow when setting up divided factors clk: Export more clk-provider functions dt-bindings: qcom: Fix warning with duplicate dt define clk: si5351: remove variant from platform_data clk: samsung: Remove unneeded semicolon clk: qcom: Fix modular build ARM: OMAP3: use DT clock init if DT data is available ARM: AM33xx: remove old clock data and link in new clock init code ARM: AM43xx: Enable clock init ARM: OMAP: DRA7: Enable clock init ARM: OMAP4: remove old clock data and link in new clock init code ARM: OMAP2+: io: use new clock init API ARM: OMAP2+: PRM: add support for initializing PRCM clock modules from DT ARM: OMAP3: hwmod: initialize clkdm from clkdm_name ARM: OMAP: hwmod: fix an incorrect clk type cast with _get_clkdm ARM: OMAP2+: clock: use driver API instead of direct memory read/write ARM: OMAP2+: clock: add support for indexed memmaps ARM: dts: am43xx clock data ARM: dts: AM35xx: use DT clock data ...
2014-01-29 06:44:53 +04:00
obj-$(CONFIG_COMMON_CLK_AT91) += at91/
clk: bcm281xx: add initial clock framework support Add code for device tree support of clocks in the BCM281xx family of SoCs. Machines in this family use peripheral clocks implemented by "Kona" clock control units (CCUs). (Other Broadcom SoC families use Kona style CCUs as well, but support for them is not yet upstream.) A BCM281xx SoC has multiple CCUs, each of which manages a set of clocks on the SoC. A Kona peripheral clock is composite clock that may include a gate, a parent clock multiplexor, and zero, one or two dividers. There is a variety of gate types, and many gates implement hardware-managed gating (often called "auto-gating"). Most dividers divide their input clock signal by an integer value (one or more). There are also "fractional" dividers which allow division by non-integer values. To accomodate such dividers, clock rates and dividers are generally maintained by the code in "scaled" form, which allows integer and fractional dividers to be handled in a uniform way. If present, the gate for a Kona peripheral clock must be enabled when a change is made to its multiplexor or one of its dividers. Additionally, dividers and multiplexors have trigger registers which must be used whenever the divider value or selected parent clock is changed. The same trigger is often used for a divider and multiplexor, and a BCM281xx peripheral clock occasionally has two triggers. The gate, dividers, and parent clock selector are treated in this code as "components" of a peripheral clock. Their functionality is implemented directly--e.g. the common clock framework gate implementation is not used for a Kona peripheral clock gate. (This has being considered though, and the intention is to evolve this code to leverage common code as much as possible.) The source code is divided into three general portions: drivers/clk/bcm/clk-kona.h drivers/clk/bcm/clk-kona.c These implement the basic Kona clock functionality, including the clk_ops methods and various routines to manipulate registers and interpret their values. This includes some functions used to set clocks to a desired initial state (though this feature is only partially implemented here). drivers/clk/bcm/clk-kona-setup.c This contains generic run-time initialization code for data structures representing Kona CCUs and clocks. This encapsulates the clock structure initialization that can't be done statically. Note that there is a great deal of validity-checking code here, making explicit certain assumptions in the code. This is mostly useful for adding new clock definitions and could possibly be disabled for production use. drivers/clk/bcm/clk-bcm281xx.c This file defines the specific CCUs used by BCM281XX family SoCs, as well as the specific clocks implemented by each. It declares a device tree clock match entry for each CCU defined. include/dt-bindings/clock/bcm281xx.h This file defines the selector (index) values used to identify a particular clock provided by a CCU. It consists entirely of C preprocessor constants, to be used by both the C source and device tree source files. Signed-off-by: Alex Elder <elder@linaro.org> Reviewed-by: Tim Kryger <tim.kryger@linaro.org> Reviewed-by: Matt Porter <mporter@linaro.org> Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Matt Porter <mporter@linaro.org>
2014-02-14 22:29:18 +04:00
obj-$(CONFIG_ARCH_BCM_MOBILE) += bcm/
clk: berlin: add driver for BG2x audio/video PLL This is a driver for the AVPLLs built upon a VCO with 8 channels each found on Marvell Berlin2 SoCs. While both VCOs found on BG2/BG2CD share the same register set, sometimes registers shifts for one of the VCOs are a bit off. Nothing serious that should require a separate driver, so deal with both VCOs in a single driver instead. Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-05-19 20:43:24 +04:00
obj-$(CONFIG_ARCH_BERLIN) += berlin/
clk: sort Makefile Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-28 01:04:49 +04:00
obj-$(CONFIG_ARCH_HI3xxx) += hisilicon/
clk: hip04: add clock driver Now only fixed rate clocks are appended into the clock driver. Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2013-12-24 13:33:54 +04:00
obj-$(CONFIG_ARCH_HIP04) += hisilicon/
clk: hisi: add clk-hix5hd2.c Signed-off-by: Haifeng Yan <haifeng.yan@linaro.org> Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org> Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org>
2014-04-21 08:07:27 +04:00
obj-$(CONFIG_ARCH_HIX5HD2) += hisilicon/
clk: sort Makefile Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-28 01:04:49 +04:00
obj-$(CONFIG_COMMON_CLK_KEYSTONE) += keystone/
clk: mmp: add mmp specific clocks add mmp specific clocks including apbc cloks, apmu clocks, and pll2, fraction clocks Signed-off-by: Chao Xie <xiechao.mail@gmail.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-08-20 06:55:11 +04:00
ifeq ($(CONFIG_COMMON_CLK), y)
clk: sort Makefile Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-28 01:04:49 +04:00
obj-$(CONFIG_ARCH_MMP) += mmp/
clk: mmp: add mmp specific clocks add mmp specific clocks including apbc cloks, apmu clocks, and pll2, fraction clocks Signed-off-by: Chao Xie <xiechao.mail@gmail.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2012-08-20 06:55:11 +04:00
endif
clk: sort Makefile Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-28 01:04:49 +04:00
obj-$(CONFIG_PLAT_ORION) += mvebu/
obj-$(CONFIG_ARCH_MXS) += mxs/
obj-$(CONFIG_COMMON_CLK_QCOM) += qcom/
obj-$(CONFIG_ARCH_ROCKCHIP) += rockchip/
drivers: clk: use COMMON_CLK_SAMSUNG for Samsung clock support This patch replaces PLAT_SAMSUNG with COMMON_CLK_SAMSUNG for Samsung common clock support. Any Samsung SoC want to use Samsung common clock infrastructure can simply select COMMON_CLK_SAMSUNG. CC: Mike Turquette <mturquette@linaro.org> Signed-off-by: Pankaj Dubey <pankaj.dubey@samsung.com> Signed-off-by: Tomasz Figa <t.figa@samsung.com>
2014-05-08 08:07:11 +04:00
obj-$(CONFIG_COMMON_CLK_SAMSUNG) += samsung/
clk: shmobile: Add R-Car Gen2 clocks support The R-Car Gen2 SoCs (R8A7790 and R8A7791) have several clocks that are too custom to be supported in a generic driver. Those clocks can be divided in two categories: - Fixed rate clocks with multiplier and divisor set according to boot mode configuration - Custom divider clocks with SoC-specific divider values This driver supports both. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Kumar Gala <galak@codeaurora.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-11-06 16:14:19 +04:00
obj-$(CONFIG_ARCH_SHMOBILE_MULTI) += shmobile/
clk: sort Makefile Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-28 01:04:49 +04:00
obj-$(CONFIG_ARCH_SIRF) += sirf/
obj-$(CONFIG_ARCH_SOCFPGA) += socfpga/
obj-$(CONFIG_PLAT_SPEAR) += spear/
clk: st: Support for DIVMUX and PreDiv Clocks The patch supports the DIVMUX and PreDiv clocks used by ClockGenA(s) DIVMUX clock : Divider-Multiplexer-Gate inside ClockGenA(s) It includes support for each channel : 3-parent Multiplexer, Divider for each Parent, Gate to switch OFF the output channel. The clock is implemented using generic clocks implemented in the kernel clk_divider and clk_mux. PreDiv clock : Fixed Divider Clock used inside ClockGenA(s) to divide the oscillator clock by factor-of-16. The clock is implemented using generic clocks implemented in the kernel clk_divider. Signed-off-by: Pankaj Dev <pankaj.dev@st.com> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-02-27 19:24:14 +04:00
obj-$(CONFIG_ARCH_STI) += st/
clk: sort Makefile Signed-off-by: Mike Turquette <mturquette@linaro.org>
2014-01-28 01:04:49 +04:00
obj-$(CONFIG_ARCH_SUNXI) += sunxi/
obj-$(CONFIG_ARCH_TEGRA) += tegra/
obj-$(CONFIG_ARCH_OMAP2PLUS) += ti/
obj-$(CONFIG_ARCH_U8500) += ux500/
obj-$(CONFIG_COMMON_CLK_VERSATILE) += versatile/
obj-$(CONFIG_X86) += x86/
obj-$(CONFIG_ARCH_ZYNQ) += zynq/