2019-05-02 12:17:43 +03:00
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// SPDX-License-Identifier: GPL-2.0
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// Copyright (C) 2018 ROHM Semiconductors
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// ROHM BD70528MWV watchdog driver
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#include <linux/bcd.h>
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#include <linux/kernel.h>
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#include <linux/mfd/rohm-bd70528.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <linux/watchdog.h>
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/*
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* Max time we can set is 1 hour, 59 minutes and 59 seconds
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* and Minimum time is 1 second
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*/
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#define WDT_MAX_MS ((2 * 60 * 60 - 1) * 1000)
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#define WDT_MIN_MS 1000
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#define DEFAULT_TIMEOUT 60
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#define WD_CTRL_MAGIC1 0x55
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#define WD_CTRL_MAGIC2 0xAA
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struct wdtbd70528 {
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struct device *dev;
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struct regmap *regmap;
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struct rohm_regmap_dev *mfd;
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struct watchdog_device wdt;
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};
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/**
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* bd70528_wdt_set - arm or disarm watchdog timer
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*
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* @data: device data for the PMIC instance we want to operate on
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* @enable: new state of WDT. zero to disable, non zero to enable
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* @old_state: previous state of WDT will be filled here
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*
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* Arm or disarm WDT on BD70528 PMIC. Expected to be called only by
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* BD70528 RTC and BD70528 WDT drivers. The rtc_timer_lock must be taken
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* by calling bd70528_wdt_lock before calling bd70528_wdt_set.
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*/
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int bd70528_wdt_set(struct rohm_regmap_dev *data, int enable, int *old_state)
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{
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int ret, i;
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unsigned int tmp;
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struct bd70528_data *bd70528 = container_of(data, struct bd70528_data,
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chip);
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u8 wd_ctrl_arr[3] = { WD_CTRL_MAGIC1, WD_CTRL_MAGIC2, 0 };
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u8 *wd_ctrl = &wd_ctrl_arr[2];
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ret = regmap_read(bd70528->chip.regmap, BD70528_REG_WDT_CTRL, &tmp);
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if (ret)
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return ret;
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*wd_ctrl = (u8)tmp;
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if (old_state) {
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if (*wd_ctrl & BD70528_MASK_WDT_EN)
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*old_state |= BD70528_WDT_STATE_BIT;
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else
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*old_state &= ~BD70528_WDT_STATE_BIT;
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if ((!enable) == (!(*old_state & BD70528_WDT_STATE_BIT)))
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return 0;
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}
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if (enable) {
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if (*wd_ctrl & BD70528_MASK_WDT_EN)
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return 0;
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*wd_ctrl |= BD70528_MASK_WDT_EN;
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} else {
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if (*wd_ctrl & BD70528_MASK_WDT_EN)
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*wd_ctrl &= ~BD70528_MASK_WDT_EN;
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else
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return 0;
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}
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for (i = 0; i < 3; i++) {
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ret = regmap_write(bd70528->chip.regmap, BD70528_REG_WDT_CTRL,
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wd_ctrl_arr[i]);
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if (ret)
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return ret;
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}
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ret = regmap_read(bd70528->chip.regmap, BD70528_REG_WDT_CTRL, &tmp);
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if ((tmp & BD70528_MASK_WDT_EN) != (*wd_ctrl & BD70528_MASK_WDT_EN)) {
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dev_err(bd70528->chip.dev,
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"Watchdog ctrl mismatch (hw) 0x%x (set) 0x%x\n",
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tmp, *wd_ctrl);
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ret = -EIO;
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}
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return ret;
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}
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EXPORT_SYMBOL(bd70528_wdt_set);
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/**
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* bd70528_wdt_lock - take WDT lock
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*
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2019-10-10 09:07:33 +03:00
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* @data: device data for the PMIC instance we want to operate on
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2019-05-02 12:17:43 +03:00
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*
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* Lock WDT for arming/disarming in order to avoid race condition caused
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* by WDT state changes initiated by WDT and RTC drivers.
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*/
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void bd70528_wdt_lock(struct rohm_regmap_dev *data)
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{
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struct bd70528_data *bd70528 = container_of(data, struct bd70528_data,
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chip);
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mutex_lock(&bd70528->rtc_timer_lock);
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}
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EXPORT_SYMBOL(bd70528_wdt_lock);
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/**
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* bd70528_wdt_unlock - unlock WDT lock
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*
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2019-10-10 09:07:33 +03:00
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* @data: device data for the PMIC instance we want to operate on
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2019-05-02 12:17:43 +03:00
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*
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* Unlock WDT lock which has previously been taken by call to
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* bd70528_wdt_lock.
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*/
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void bd70528_wdt_unlock(struct rohm_regmap_dev *data)
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{
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struct bd70528_data *bd70528 = container_of(data, struct bd70528_data,
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chip);
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mutex_unlock(&bd70528->rtc_timer_lock);
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}
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EXPORT_SYMBOL(bd70528_wdt_unlock);
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static int bd70528_wdt_set_locked(struct wdtbd70528 *w, int enable)
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{
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return bd70528_wdt_set(w->mfd, enable, NULL);
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}
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static int bd70528_wdt_change(struct wdtbd70528 *w, int enable)
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{
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int ret;
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bd70528_wdt_lock(w->mfd);
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ret = bd70528_wdt_set_locked(w, enable);
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bd70528_wdt_unlock(w->mfd);
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return ret;
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}
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static int bd70528_wdt_start(struct watchdog_device *wdt)
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{
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struct wdtbd70528 *w = watchdog_get_drvdata(wdt);
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dev_dbg(w->dev, "WDT ping...\n");
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return bd70528_wdt_change(w, 1);
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}
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static int bd70528_wdt_stop(struct watchdog_device *wdt)
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{
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struct wdtbd70528 *w = watchdog_get_drvdata(wdt);
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dev_dbg(w->dev, "WDT stopping...\n");
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return bd70528_wdt_change(w, 0);
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}
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static int bd70528_wdt_set_timeout(struct watchdog_device *wdt,
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unsigned int timeout)
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{
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unsigned int hours;
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unsigned int minutes;
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unsigned int seconds;
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int ret;
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struct wdtbd70528 *w = watchdog_get_drvdata(wdt);
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seconds = timeout;
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hours = timeout / (60 * 60);
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/* Maximum timeout is 1h 59m 59s => hours is 1 or 0 */
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if (hours)
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seconds -= (60 * 60);
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minutes = seconds / 60;
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seconds = seconds % 60;
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bd70528_wdt_lock(w->mfd);
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ret = bd70528_wdt_set_locked(w, 0);
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if (ret)
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goto out_unlock;
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ret = regmap_update_bits(w->regmap, BD70528_REG_WDT_HOUR,
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BD70528_MASK_WDT_HOUR, hours);
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if (ret) {
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dev_err(w->dev, "Failed to set WDT hours\n");
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goto out_en_unlock;
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}
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ret = regmap_update_bits(w->regmap, BD70528_REG_WDT_MINUTE,
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BD70528_MASK_WDT_MINUTE, bin2bcd(minutes));
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if (ret) {
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dev_err(w->dev, "Failed to set WDT minutes\n");
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goto out_en_unlock;
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}
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ret = regmap_update_bits(w->regmap, BD70528_REG_WDT_SEC,
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BD70528_MASK_WDT_SEC, bin2bcd(seconds));
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if (ret)
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dev_err(w->dev, "Failed to set WDT seconds\n");
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else
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dev_dbg(w->dev, "WDT tmo set to %u\n", timeout);
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out_en_unlock:
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ret = bd70528_wdt_set_locked(w, 1);
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out_unlock:
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bd70528_wdt_unlock(w->mfd);
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return ret;
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}
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static const struct watchdog_info bd70528_wdt_info = {
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.identity = "bd70528-wdt",
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.options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | WDIOF_MAGICCLOSE,
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};
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static const struct watchdog_ops bd70528_wdt_ops = {
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.start = bd70528_wdt_start,
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.stop = bd70528_wdt_stop,
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.set_timeout = bd70528_wdt_set_timeout,
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};
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static int bd70528_wdt_probe(struct platform_device *pdev)
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{
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struct rohm_regmap_dev *bd70528;
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struct wdtbd70528 *w;
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int ret;
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unsigned int reg;
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bd70528 = dev_get_drvdata(pdev->dev.parent);
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if (!bd70528) {
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dev_err(&pdev->dev, "No MFD driver data\n");
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return -EINVAL;
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}
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w = devm_kzalloc(&pdev->dev, sizeof(*w), GFP_KERNEL);
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if (!w)
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return -ENOMEM;
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w->regmap = bd70528->regmap;
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w->mfd = bd70528;
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w->dev = &pdev->dev;
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w->wdt.info = &bd70528_wdt_info;
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w->wdt.ops = &bd70528_wdt_ops;
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w->wdt.min_hw_heartbeat_ms = WDT_MIN_MS;
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w->wdt.max_hw_heartbeat_ms = WDT_MAX_MS;
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w->wdt.parent = pdev->dev.parent;
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w->wdt.timeout = DEFAULT_TIMEOUT;
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watchdog_set_drvdata(&w->wdt, w);
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watchdog_init_timeout(&w->wdt, 0, pdev->dev.parent);
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ret = bd70528_wdt_set_timeout(&w->wdt, w->wdt.timeout);
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if (ret) {
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dev_err(&pdev->dev, "Failed to set the watchdog timeout\n");
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return ret;
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}
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bd70528_wdt_lock(w->mfd);
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ret = regmap_read(w->regmap, BD70528_REG_WDT_CTRL, ®);
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bd70528_wdt_unlock(w->mfd);
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if (ret) {
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dev_err(&pdev->dev, "Failed to get the watchdog state\n");
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return ret;
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}
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if (reg & BD70528_MASK_WDT_EN) {
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dev_dbg(&pdev->dev, "watchdog was running during probe\n");
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set_bit(WDOG_HW_RUNNING, &w->wdt.status);
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}
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ret = devm_watchdog_register_device(&pdev->dev, &w->wdt);
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if (ret < 0)
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dev_err(&pdev->dev, "watchdog registration failed: %d\n", ret);
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return ret;
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}
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static struct platform_driver bd70528_wdt = {
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.driver = {
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.name = "bd70528-wdt"
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},
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.probe = bd70528_wdt_probe,
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};
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module_platform_driver(bd70528_wdt);
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MODULE_AUTHOR("Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com>");
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MODULE_DESCRIPTION("BD70528 watchdog driver");
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MODULE_LICENSE("GPL");
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2019-10-23 15:41:59 +03:00
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MODULE_ALIAS("platform:bd70528-wdt");
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