2006-06-10 14:23:54 +04:00
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ifeq ($(CONFIG_PPC64),y)
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EXTRA_CFLAGS += -mno-minimal-toc
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endif
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2005-09-19 17:15:51 +04:00
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obj-$(CONFIG_OPROFILE) += oprofile.o
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DRIVER_OBJS := $(addprefix ../../../drivers/oprofile/, \
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oprof.o cpu_buffer.o buffer_sync.o \
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event_buffer.o oprofile_files.o \
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oprofilefs.o oprofile_stats.o \
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timer_int.o )
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2006-03-27 04:57:01 +04:00
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oprofile-y := $(DRIVER_OBJS) common.o backtrace.o
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[POWERPC] cell: Add oprofile support
Add PPU event-based and cycle-based profiling support to Oprofile for Cell.
Oprofile is expected to collect data on all CPUs simultaneously.
However, there is one set of performance counters per node. There are
two hardware threads or virtual CPUs on each node. Hence, OProfile must
multiplex in time the performance counter collection on the two virtual
CPUs.
The multiplexing of the performance counters is done by a virtual
counter routine. Initially, the counters are configured to collect data
on the even CPUs in the system, one CPU per node. In order to capture
the PC for the virtual CPU when the performance counter interrupt occurs
(the specified number of events between samples has occurred), the even
processors are configured to handle the performance counter interrupts
for their node. The virtual counter routine is called via a kernel
timer after the virtual sample time. The routine stops the counters,
saves the current counts, loads the last counts for the other virtual
CPU on the node, sets interrupts to be handled by the other virtual CPU
and restarts the counters, the virtual timer routine is scheduled to run
again. The virtual sample time is kept relatively small to make sure
sampling occurs on both CPUs on the node with a relatively small
granularity. Whenever the counters overflow, the performance counter
interrupt is called to collect the PC for the CPU where data is being
collected.
The oprofile driver relies on a firmware RTAS call to setup the debug bus
to route the desired signals to the performance counter hardware to be
counted. The RTAS call must set the routing registers appropriately in
each of the islands to pass the signals down the debug bus as well as
routing the signals from a particular island onto the bus. There is a
second firmware RTAS call to reset the debug bus to the non pass thru
state when the counters are not in use.
Signed-off-by: Carl Love <carll@us.ibm.com>
Signed-off-by: Maynard Johnson <mpjohn@us.ibm.com>
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
2006-11-20 20:45:16 +03:00
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oprofile-$(CONFIG_PPC_CELL) += op_model_cell.o
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2005-09-19 17:15:51 +04:00
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oprofile-$(CONFIG_PPC64) += op_model_rs64.o op_model_power4.o
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oprofile-$(CONFIG_FSL_BOOKE) += op_model_fsl_booke.o
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2006-10-28 00:06:32 +04:00
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oprofile-$(CONFIG_6xx) += op_model_7450.o
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