2017-12-14 08:49:44 +03:00
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// SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
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// Copyright(c) 2015-17 Intel Corporation.
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/*
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* SDW Intel Init Routines
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*
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* Initializes and creates SDW devices based on ACPI and Hardware values
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*/
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#include <linux/acpi.h>
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2019-04-13 18:12:52 +03:00
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#include <linux/export.h>
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2020-07-16 18:09:45 +03:00
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#include <linux/interrupt.h>
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2019-10-22 07:33:08 +03:00
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#include <linux/io.h>
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2019-04-13 18:12:52 +03:00
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#include <linux/module.h>
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2017-12-14 08:49:44 +03:00
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#include <linux/platform_device.h>
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2020-08-17 18:29:12 +03:00
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#include <linux/pm_runtime.h>
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2017-12-14 08:49:44 +03:00
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#include <linux/soundwire/sdw_intel.h>
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2020-05-31 21:20:57 +03:00
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#include "cadence_master.h"
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2017-12-14 08:49:44 +03:00
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#include "intel.h"
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#define SDW_SHIM_LCAP 0x0
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#define SDW_SHIM_BASE 0x2C000
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#define SDW_ALH_BASE 0x2C800
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#define SDW_LINK_BASE 0x30000
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#define SDW_LINK_SIZE 0x10000
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2020-05-31 21:21:02 +03:00
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static int sdw_intel_cleanup(struct sdw_intel_ctx *ctx)
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2017-12-14 08:49:44 +03:00
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{
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2019-12-12 04:45:01 +03:00
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struct sdw_intel_link_res *link = ctx->links;
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2020-05-31 21:21:02 +03:00
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u32 link_mask;
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2017-12-14 08:49:44 +03:00
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int i;
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if (!link)
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return 0;
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2020-05-31 21:21:02 +03:00
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link_mask = ctx->link_mask;
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for (i = 0; i < ctx->count; i++, link++) {
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if (!(link_mask & BIT(i)))
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continue;
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2020-08-17 18:29:12 +03:00
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if (link->pdev) {
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pm_runtime_disable(&link->pdev->dev);
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2017-12-14 08:49:44 +03:00
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platform_device_unregister(link->pdev);
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2020-08-17 18:29:12 +03:00
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}
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2020-08-17 18:29:21 +03:00
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if (!link->clock_stop_quirks)
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pm_runtime_put_noidle(link->dev);
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2017-12-14 08:49:44 +03:00
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}
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return 0;
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}
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2020-07-16 18:09:43 +03:00
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#define HDA_DSP_REG_ADSPIC2 (0x10)
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#define HDA_DSP_REG_ADSPIS2 (0x14)
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#define HDA_DSP_REG_ADSPIC2_SNDW BIT(5)
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/**
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* sdw_intel_enable_irq() - enable/disable Intel SoundWire IRQ
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* @mmio_base: The mmio base of the control register
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* @enable: true if enable
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*/
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void sdw_intel_enable_irq(void __iomem *mmio_base, bool enable)
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{
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u32 val;
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val = readl(mmio_base + HDA_DSP_REG_ADSPIC2);
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if (enable)
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val |= HDA_DSP_REG_ADSPIC2_SNDW;
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else
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val &= ~HDA_DSP_REG_ADSPIC2_SNDW;
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writel(val, mmio_base + HDA_DSP_REG_ADSPIC2);
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}
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2020-07-16 18:09:44 +03:00
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EXPORT_SYMBOL_NS(sdw_intel_enable_irq, SOUNDWIRE_INTEL_INIT);
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2020-07-16 18:09:43 +03:00
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2020-07-16 18:09:45 +03:00
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irqreturn_t sdw_intel_thread(int irq, void *dev_id)
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{
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struct sdw_intel_ctx *ctx = dev_id;
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struct sdw_intel_link_res *link;
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list_for_each_entry(link, &ctx->link_list, list)
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sdw_cdns_irq(irq, link->cdns);
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sdw_intel_enable_irq(ctx->mmio_base, true);
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return IRQ_HANDLED;
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}
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EXPORT_SYMBOL_NS(sdw_intel_thread, SOUNDWIRE_INTEL_INIT);
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2020-05-31 21:21:02 +03:00
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static struct sdw_intel_ctx
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*sdw_intel_probe_controller(struct sdw_intel_res *res)
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{
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struct platform_device_info pdevinfo;
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struct platform_device *pdev;
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struct sdw_intel_link_res *link;
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struct sdw_intel_ctx *ctx;
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struct acpi_device *adev;
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2020-07-16 18:09:47 +03:00
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struct sdw_slave *slave;
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struct list_head *node;
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struct sdw_bus *bus;
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2020-05-31 21:21:02 +03:00
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u32 link_mask;
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2020-07-16 18:09:47 +03:00
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int num_slaves = 0;
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2020-05-31 21:21:02 +03:00
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int count;
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int i;
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if (!res)
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return NULL;
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if (acpi_bus_get_device(res->handle, &adev))
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return NULL;
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if (!res->count)
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return NULL;
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count = res->count;
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2017-12-14 08:49:44 +03:00
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dev_dbg(&adev->dev, "Creating %d SDW Link devices\n", count);
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2020-05-31 21:21:00 +03:00
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ctx = devm_kzalloc(&adev->dev, sizeof(*ctx), GFP_KERNEL);
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2017-12-14 08:49:44 +03:00
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if (!ctx)
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return NULL;
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ctx->count = count;
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2020-05-31 21:21:00 +03:00
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ctx->links = devm_kcalloc(&adev->dev, ctx->count,
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sizeof(*ctx->links), GFP_KERNEL);
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2017-12-14 08:49:44 +03:00
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if (!ctx->links)
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2020-05-31 21:21:00 +03:00
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return NULL;
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2017-12-14 08:49:44 +03:00
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2020-05-31 21:21:02 +03:00
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ctx->count = count;
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ctx->mmio_base = res->mmio_base;
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ctx->link_mask = res->link_mask;
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ctx->handle = res->handle;
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2020-07-16 18:09:40 +03:00
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mutex_init(&ctx->shim_lock);
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2020-05-31 21:21:02 +03:00
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2017-12-14 08:49:44 +03:00
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link = ctx->links;
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2020-05-31 21:21:02 +03:00
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link_mask = ctx->link_mask;
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2017-12-14 08:49:44 +03:00
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2020-07-16 18:09:45 +03:00
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INIT_LIST_HEAD(&ctx->link_list);
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2017-12-14 08:49:44 +03:00
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/* Create SDW Master devices */
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2020-05-31 21:21:02 +03:00
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for (i = 0; i < count; i++, link++) {
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2020-05-31 21:20:59 +03:00
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if (!(link_mask & BIT(i))) {
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2019-08-06 03:55:20 +03:00
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dev_dbg(&adev->dev,
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"Link %d masked, will not be enabled\n", i);
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continue;
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}
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2020-05-31 21:21:02 +03:00
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link->mmio_base = res->mmio_base;
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2019-12-12 04:45:01 +03:00
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link->registers = res->mmio_base + SDW_LINK_BASE
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2020-05-31 21:21:02 +03:00
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+ (SDW_LINK_SIZE * i);
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2019-12-12 04:45:01 +03:00
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link->shim = res->mmio_base + SDW_SHIM_BASE;
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link->alh = res->mmio_base + SDW_ALH_BASE;
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2017-12-14 08:49:44 +03:00
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2019-12-12 04:45:01 +03:00
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link->ops = res->ops;
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2019-12-12 04:45:02 +03:00
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link->dev = res->dev;
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2018-04-26 16:09:05 +03:00
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2020-08-17 18:29:18 +03:00
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link->clock_stop_quirks = res->clock_stop_quirks;
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2020-07-16 18:09:40 +03:00
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link->shim_lock = &ctx->shim_lock;
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link->shim_mask = &ctx->shim_mask;
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2020-09-01 18:05:55 +03:00
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link->link_mask = link_mask;
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2020-07-16 18:09:40 +03:00
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2017-12-14 08:49:44 +03:00
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memset(&pdevinfo, 0, sizeof(pdevinfo));
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pdevinfo.parent = res->parent;
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2020-05-31 21:21:02 +03:00
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pdevinfo.name = "intel-sdw";
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2017-12-14 08:49:44 +03:00
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pdevinfo.id = i;
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pdevinfo.fwnode = acpi_fwnode_handle(adev);
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2020-05-31 21:21:01 +03:00
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pdevinfo.data = link;
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pdevinfo.size_data = sizeof(*link);
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2017-12-14 08:49:44 +03:00
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pdev = platform_device_register_full(&pdevinfo);
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if (IS_ERR(pdev)) {
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dev_err(&adev->dev,
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"platform device creation failed: %ld\n",
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PTR_ERR(pdev));
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2020-05-31 21:21:02 +03:00
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goto err;
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2017-12-14 08:49:44 +03:00
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}
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link->pdev = pdev;
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2020-07-16 18:09:45 +03:00
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link->cdns = platform_get_drvdata(pdev);
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2021-04-06 04:01:01 +03:00
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if (!link->cdns) {
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dev_err(&adev->dev, "failed to get link->cdns\n");
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/*
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* 1 will be subtracted from i in the err label, but we need to call
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* intel_link_dev_unregister for this ldev, so plus 1 now
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*/
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i++;
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goto err;
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}
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2020-07-16 18:09:45 +03:00
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list_add_tail(&link->list, &ctx->link_list);
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2020-07-16 18:09:47 +03:00
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bus = &link->cdns->bus;
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/* Calculate number of slaves */
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list_for_each(node, &bus->slaves)
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num_slaves++;
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}
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ctx->ids = devm_kcalloc(&adev->dev, num_slaves,
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sizeof(*ctx->ids), GFP_KERNEL);
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if (!ctx->ids)
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goto err;
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ctx->num_slaves = num_slaves;
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i = 0;
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list_for_each_entry(link, &ctx->link_list, list) {
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bus = &link->cdns->bus;
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list_for_each_entry(slave, &bus->slaves, node) {
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ctx->ids[i].id = slave->id;
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ctx->ids[i].link_id = bus->link_id;
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i++;
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}
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2017-12-14 08:49:44 +03:00
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}
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return ctx;
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2020-05-31 21:21:02 +03:00
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err:
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2020-05-31 21:21:00 +03:00
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ctx->count = i;
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2020-05-31 21:21:02 +03:00
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sdw_intel_cleanup(ctx);
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2017-12-14 08:49:44 +03:00
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return NULL;
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}
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2020-05-31 21:21:02 +03:00
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static int
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sdw_intel_startup_controller(struct sdw_intel_ctx *ctx)
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{
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struct acpi_device *adev;
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struct sdw_intel_link_res *link;
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u32 caps;
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u32 link_mask;
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int i;
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if (acpi_bus_get_device(ctx->handle, &adev))
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return -EINVAL;
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/* Check SNDWLCAP.LCOUNT */
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caps = ioread32(ctx->mmio_base + SDW_SHIM_BASE + SDW_SHIM_LCAP);
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caps &= GENMASK(2, 0);
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/* Check HW supported vs property value */
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if (caps < ctx->count) {
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dev_err(&adev->dev,
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"BIOS master count is larger than hardware capabilities\n");
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return -EINVAL;
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}
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if (!ctx->links)
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return -EINVAL;
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link = ctx->links;
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link_mask = ctx->link_mask;
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/* Startup SDW Master devices */
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for (i = 0; i < ctx->count; i++, link++) {
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if (!(link_mask & BIT(i)))
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continue;
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intel_master_startup(link->pdev);
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2020-08-17 18:29:21 +03:00
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if (!link->clock_stop_quirks) {
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/*
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* we need to prevent the parent PCI device
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* from entering pm_runtime suspend, so that
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* power rails to the SoundWire IP are not
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* turned off.
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*/
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pm_runtime_get_noresume(link->dev);
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}
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2020-05-31 21:21:02 +03:00
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}
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return 0;
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}
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/**
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* sdw_intel_probe() - SoundWire Intel probe routine
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* @res: resource data
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*
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* This registers a platform device for each Master handled by the controller,
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* and SoundWire Master and Slave devices will be created by the platform
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* device probe. All the information necessary is stored in the context, and
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* the res argument pointer can be freed after this step.
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* This function will be called after sdw_intel_acpi_scan() by SOF probe.
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*/
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struct sdw_intel_ctx
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*sdw_intel_probe(struct sdw_intel_res *res)
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{
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return sdw_intel_probe_controller(res);
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}
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2020-07-16 18:09:44 +03:00
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EXPORT_SYMBOL_NS(sdw_intel_probe, SOUNDWIRE_INTEL_INIT);
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2020-05-31 21:21:02 +03:00
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/**
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* sdw_intel_startup() - SoundWire Intel startup
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* @ctx: SoundWire context allocated in the probe
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*
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* Startup Intel SoundWire controller. This function will be called after
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* Intel Audio DSP is powered up.
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*/
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int sdw_intel_startup(struct sdw_intel_ctx *ctx)
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{
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return sdw_intel_startup_controller(ctx);
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}
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2020-07-16 18:09:44 +03:00
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EXPORT_SYMBOL_NS(sdw_intel_startup, SOUNDWIRE_INTEL_INIT);
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2017-12-14 08:49:44 +03:00
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/**
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* sdw_intel_exit() - SoundWire Intel exit
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2020-05-31 21:21:02 +03:00
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* @ctx: SoundWire context allocated in the probe
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2017-12-14 08:49:44 +03:00
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*
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* Delete the controller instances created and cleanup
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*/
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2019-12-12 04:45:01 +03:00
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void sdw_intel_exit(struct sdw_intel_ctx *ctx)
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2017-12-14 08:49:44 +03:00
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{
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2020-05-31 21:21:02 +03:00
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sdw_intel_cleanup(ctx);
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2017-12-14 08:49:44 +03:00
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}
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2020-07-16 18:09:44 +03:00
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EXPORT_SYMBOL_NS(sdw_intel_exit, SOUNDWIRE_INTEL_INIT);
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2017-12-14 08:49:44 +03:00
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2020-07-16 18:09:46 +03:00
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void sdw_intel_process_wakeen_event(struct sdw_intel_ctx *ctx)
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|
{
|
|
|
|
struct sdw_intel_link_res *link;
|
|
|
|
u32 link_mask;
|
|
|
|
int i;
|
|
|
|
|
|
|
|
if (!ctx->links)
|
|
|
|
return;
|
|
|
|
|
|
|
|
link = ctx->links;
|
|
|
|
link_mask = ctx->link_mask;
|
|
|
|
|
|
|
|
/* Startup SDW Master devices */
|
|
|
|
for (i = 0; i < ctx->count; i++, link++) {
|
|
|
|
if (!(link_mask & BIT(i)))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
intel_master_process_wakeen_event(link->pdev);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL_NS(sdw_intel_process_wakeen_event, SOUNDWIRE_INTEL_INIT);
|
|
|
|
|
2017-12-14 08:49:44 +03:00
|
|
|
MODULE_LICENSE("Dual BSD/GPL");
|
|
|
|
MODULE_DESCRIPTION("Intel Soundwire Init Library");
|