blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
/*
|
2009-09-24 18:11:24 +04:00
|
|
|
* GPIO Abstraction Layer
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
*
|
2010-09-17 07:03:17 +04:00
|
|
|
* Copyright 2006-2010 Analog Devices Inc.
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
*
|
2009-09-24 18:11:24 +04:00
|
|
|
* Licensed under the GPL-2 or later
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
*/
|
|
|
|
|
2007-10-10 20:22:35 +04:00
|
|
|
#include <linux/delay.h>
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
#include <linux/module.h>
|
|
|
|
#include <linux/err.h>
|
2007-12-24 11:54:48 +03:00
|
|
|
#include <linux/proc_fs.h>
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
#include <asm/blackfin.h>
|
|
|
|
#include <asm/gpio.h>
|
2007-10-03 20:35:05 +04:00
|
|
|
#include <asm/portmux.h>
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
#include <linux/irq.h>
|
|
|
|
|
2007-10-10 12:58:49 +04:00
|
|
|
#if ANOMALY_05000311 || ANOMALY_05000323
|
|
|
|
enum {
|
|
|
|
AWA_data = SYSCR,
|
|
|
|
AWA_data_clear = SYSCR,
|
|
|
|
AWA_data_set = SYSCR,
|
|
|
|
AWA_toggle = SYSCR,
|
2008-04-24 00:43:14 +04:00
|
|
|
AWA_maska = BFIN_UART_SCR,
|
|
|
|
AWA_maska_clear = BFIN_UART_SCR,
|
|
|
|
AWA_maska_set = BFIN_UART_SCR,
|
|
|
|
AWA_maska_toggle = BFIN_UART_SCR,
|
|
|
|
AWA_maskb = BFIN_UART_GCTL,
|
|
|
|
AWA_maskb_clear = BFIN_UART_GCTL,
|
|
|
|
AWA_maskb_set = BFIN_UART_GCTL,
|
|
|
|
AWA_maskb_toggle = BFIN_UART_GCTL,
|
2007-10-10 12:58:49 +04:00
|
|
|
AWA_dir = SPORT1_STAT,
|
|
|
|
AWA_polar = SPORT1_STAT,
|
|
|
|
AWA_edge = SPORT1_STAT,
|
|
|
|
AWA_both = SPORT1_STAT,
|
|
|
|
#if ANOMALY_05000311
|
|
|
|
AWA_inen = TIMER_ENABLE,
|
|
|
|
#elif ANOMALY_05000323
|
|
|
|
AWA_inen = DMA1_1_CONFIG,
|
|
|
|
#endif
|
|
|
|
};
|
|
|
|
/* Anomaly Workaround */
|
|
|
|
#define AWA_DUMMY_READ(name) bfin_read16(AWA_ ## name)
|
|
|
|
#else
|
|
|
|
#define AWA_DUMMY_READ(...) do { } while (0)
|
|
|
|
#endif
|
|
|
|
|
2009-02-04 11:49:45 +03:00
|
|
|
static struct gpio_port_t * const gpio_array[] = {
|
2008-11-18 12:48:22 +03:00
|
|
|
#if defined(BF533_FAMILY) || defined(BF538_FAMILY)
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
(struct gpio_port_t *) FIO_FLAG_D,
|
2009-03-28 15:32:57 +03:00
|
|
|
#elif defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
(struct gpio_port_t *) PORTFIO,
|
|
|
|
(struct gpio_port_t *) PORTGIO,
|
|
|
|
(struct gpio_port_t *) PORTHIO,
|
2009-02-04 11:49:45 +03:00
|
|
|
#elif defined(BF561_FAMILY)
|
|
|
|
(struct gpio_port_t *) FIO0_FLAG_D,
|
|
|
|
(struct gpio_port_t *) FIO1_FLAG_D,
|
|
|
|
(struct gpio_port_t *) FIO2_FLAG_D,
|
2009-03-28 15:32:57 +03:00
|
|
|
#elif defined(CONFIG_BF54x)
|
2009-02-04 11:49:45 +03:00
|
|
|
(struct gpio_port_t *)PORTA_FER,
|
|
|
|
(struct gpio_port_t *)PORTB_FER,
|
|
|
|
(struct gpio_port_t *)PORTC_FER,
|
|
|
|
(struct gpio_port_t *)PORTD_FER,
|
|
|
|
(struct gpio_port_t *)PORTE_FER,
|
|
|
|
(struct gpio_port_t *)PORTF_FER,
|
|
|
|
(struct gpio_port_t *)PORTG_FER,
|
|
|
|
(struct gpio_port_t *)PORTH_FER,
|
|
|
|
(struct gpio_port_t *)PORTI_FER,
|
|
|
|
(struct gpio_port_t *)PORTJ_FER,
|
|
|
|
#else
|
|
|
|
# error no gpio arrays defined
|
|
|
|
#endif
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
};
|
|
|
|
|
2009-03-28 15:32:57 +03:00
|
|
|
#if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
|
2009-02-04 11:49:45 +03:00
|
|
|
static unsigned short * const port_fer[] = {
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
(unsigned short *) PORTF_FER,
|
|
|
|
(unsigned short *) PORTG_FER,
|
|
|
|
(unsigned short *) PORTH_FER,
|
|
|
|
};
|
|
|
|
|
2009-02-04 11:49:45 +03:00
|
|
|
# if !defined(BF537_FAMILY)
|
|
|
|
static unsigned short * const port_mux[] = {
|
2007-10-21 12:54:27 +04:00
|
|
|
(unsigned short *) PORTF_MUX,
|
|
|
|
(unsigned short *) PORTG_MUX,
|
|
|
|
(unsigned short *) PORTH_MUX,
|
|
|
|
};
|
|
|
|
|
|
|
|
static const
|
2009-02-04 11:49:45 +03:00
|
|
|
u8 pmux_offset[][16] = {
|
2009-03-28 15:32:57 +03:00
|
|
|
# if defined(CONFIG_BF52x)
|
2009-02-04 11:49:45 +03:00
|
|
|
{ 0, 0, 0, 0, 0, 0, 0, 0, 2, 2, 4, 6, 8, 8, 10, 10 }, /* PORTF */
|
|
|
|
{ 0, 0, 0, 0, 0, 2, 2, 4, 4, 6, 8, 10, 10, 10, 12, 12 }, /* PORTG */
|
|
|
|
{ 0, 0, 0, 0, 0, 0, 0, 0, 2, 4, 4, 4, 4, 4, 4, 4 }, /* PORTH */
|
2009-03-28 15:32:57 +03:00
|
|
|
# elif defined(CONFIG_BF51x)
|
2009-02-04 11:49:45 +03:00
|
|
|
{ 0, 2, 2, 2, 2, 2, 2, 4, 6, 6, 6, 8, 8, 8, 8, 10 }, /* PORTF */
|
|
|
|
{ 0, 0, 0, 2, 4, 6, 6, 6, 8, 10, 10, 12, 14, 14, 14, 14 }, /* PORTG */
|
|
|
|
{ 0, 0, 0, 0, 2, 2, 4, 6, 10, 10, 10, 10, 10, 10, 10, 10 }, /* PORTH */
|
|
|
|
# endif
|
|
|
|
};
|
2009-02-04 11:49:45 +03:00
|
|
|
# endif
|
2009-02-04 11:49:45 +03:00
|
|
|
|
2009-09-28 16:23:41 +04:00
|
|
|
#elif defined(BF538_FAMILY)
|
|
|
|
static unsigned short * const port_fer[] = {
|
|
|
|
(unsigned short *) PORTCIO_FER,
|
|
|
|
(unsigned short *) PORTDIO_FER,
|
|
|
|
(unsigned short *) PORTEIO_FER,
|
|
|
|
};
|
2007-08-28 12:47:46 +04:00
|
|
|
#endif
|
|
|
|
|
2010-07-05 12:40:41 +04:00
|
|
|
#define RESOURCE_LABEL_SIZE 16
|
2007-08-03 13:48:09 +04:00
|
|
|
|
2007-12-24 15:07:03 +03:00
|
|
|
static struct str_ident {
|
2007-08-03 13:48:09 +04:00
|
|
|
char name[RESOURCE_LABEL_SIZE];
|
2007-12-24 15:07:03 +03:00
|
|
|
} str_ident[MAX_RESOURCES];
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
|
2008-07-19 12:57:32 +04:00
|
|
|
#if defined(CONFIG_PM)
|
2008-11-18 12:48:22 +03:00
|
|
|
static struct gpio_port_s gpio_bank_saved[GPIO_BANK_NUM];
|
2007-10-21 12:54:27 +04:00
|
|
|
#endif
|
|
|
|
|
2008-10-08 12:13:17 +04:00
|
|
|
static void gpio_error(unsigned gpio)
|
2008-01-22 13:36:20 +03:00
|
|
|
{
|
|
|
|
printk(KERN_ERR "bfin-gpio: GPIO %d wasn't requested!\n", gpio);
|
|
|
|
}
|
|
|
|
|
2007-10-03 20:35:05 +04:00
|
|
|
static void set_label(unsigned short ident, const char *label)
|
|
|
|
{
|
2008-10-13 07:35:22 +04:00
|
|
|
if (label) {
|
2007-08-03 13:48:09 +04:00
|
|
|
strncpy(str_ident[ident].name, label,
|
2007-10-03 20:35:05 +04:00
|
|
|
RESOURCE_LABEL_SIZE);
|
2007-08-03 13:48:09 +04:00
|
|
|
str_ident[ident].name[RESOURCE_LABEL_SIZE - 1] = 0;
|
2007-10-03 20:35:05 +04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static char *get_label(unsigned short ident)
|
|
|
|
{
|
2007-08-03 13:48:09 +04:00
|
|
|
return (*str_ident[ident].name ? str_ident[ident].name : "UNKNOWN");
|
2007-10-03 20:35:05 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
static int cmp_label(unsigned short ident, const char *label)
|
|
|
|
{
|
2007-12-24 15:07:03 +03:00
|
|
|
if (label == NULL) {
|
|
|
|
dump_stack();
|
|
|
|
printk(KERN_ERR "Please provide none-null label\n");
|
|
|
|
}
|
|
|
|
|
2008-10-13 07:35:22 +04:00
|
|
|
if (label)
|
2008-10-28 10:47:11 +03:00
|
|
|
return strcmp(str_ident[ident].name, label);
|
2007-10-03 20:35:05 +04:00
|
|
|
else
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2010-06-02 08:22:01 +04:00
|
|
|
#define map_entry(m, i) reserved_##m##_map[gpio_bank(i)]
|
|
|
|
#define is_reserved(m, i, e) (map_entry(m, i) & gpio_bit(i))
|
|
|
|
#define reserve(m, i) (map_entry(m, i) |= gpio_bit(i))
|
|
|
|
#define unreserve(m, i) (map_entry(m, i) &= ~gpio_bit(i))
|
|
|
|
#define DECLARE_RESERVED_MAP(m, c) static unsigned short reserved_##m##_map[c]
|
|
|
|
|
|
|
|
DECLARE_RESERVED_MAP(gpio, GPIO_BANK_NUM);
|
2010-07-13 12:26:10 +04:00
|
|
|
DECLARE_RESERVED_MAP(peri, DIV_ROUND_UP(MAX_RESOURCES, GPIO_BANKSIZE));
|
2010-06-02 08:22:01 +04:00
|
|
|
DECLARE_RESERVED_MAP(gpio_irq, GPIO_BANK_NUM);
|
|
|
|
|
|
|
|
inline int check_gpio(unsigned gpio)
|
|
|
|
{
|
|
|
|
#if defined(CONFIG_BF54x)
|
|
|
|
if (gpio == GPIO_PB15 || gpio == GPIO_PC14 || gpio == GPIO_PC15
|
|
|
|
|| gpio == GPIO_PH14 || gpio == GPIO_PH15
|
|
|
|
|| gpio == GPIO_PJ14 || gpio == GPIO_PJ15)
|
|
|
|
return -EINVAL;
|
|
|
|
#endif
|
|
|
|
if (gpio >= MAX_BLACKFIN_GPIOS)
|
|
|
|
return -EINVAL;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2008-01-22 12:20:10 +03:00
|
|
|
static void port_setup(unsigned gpio, unsigned short usage)
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
{
|
2009-09-28 16:23:41 +04:00
|
|
|
#if defined(BF538_FAMILY)
|
|
|
|
/*
|
|
|
|
* BF538/9 Port C,D and E are special.
|
|
|
|
* Inverted PORT_FER polarity on CDE and no PORF_FER on F
|
|
|
|
* Regular PORT F GPIOs are handled here, CDE are exclusively
|
|
|
|
* managed by GPIOLIB
|
|
|
|
*/
|
|
|
|
|
|
|
|
if (gpio < MAX_BLACKFIN_GPIOS || gpio >= MAX_RESOURCES)
|
|
|
|
return;
|
|
|
|
|
|
|
|
gpio -= MAX_BLACKFIN_GPIOS;
|
|
|
|
|
|
|
|
if (usage == GPIO_USAGE)
|
|
|
|
*port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
|
|
|
|
else
|
|
|
|
*port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
|
|
|
|
SSYNC();
|
|
|
|
return;
|
|
|
|
#endif
|
|
|
|
|
2008-10-28 10:53:37 +03:00
|
|
|
if (check_gpio(gpio))
|
|
|
|
return;
|
|
|
|
|
2009-03-28 15:32:57 +03:00
|
|
|
#if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
|
2008-10-28 10:53:37 +03:00
|
|
|
if (usage == GPIO_USAGE)
|
|
|
|
*port_fer[gpio_bank(gpio)] &= ~gpio_bit(gpio);
|
|
|
|
else
|
|
|
|
*port_fer[gpio_bank(gpio)] |= gpio_bit(gpio);
|
|
|
|
SSYNC();
|
2009-03-28 15:32:57 +03:00
|
|
|
#elif defined(CONFIG_BF54x)
|
2007-08-28 12:47:46 +04:00
|
|
|
if (usage == GPIO_USAGE)
|
|
|
|
gpio_array[gpio_bank(gpio)]->port_fer &= ~gpio_bit(gpio);
|
|
|
|
else
|
|
|
|
gpio_array[gpio_bank(gpio)]->port_fer |= gpio_bit(gpio);
|
|
|
|
SSYNC();
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
#endif
|
2008-10-28 10:53:37 +03:00
|
|
|
}
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
|
2007-10-03 20:35:05 +04:00
|
|
|
#ifdef BF537_FAMILY
|
2010-09-17 07:03:17 +04:00
|
|
|
static const s8 port_mux[] = {
|
|
|
|
[GPIO_PF0] = 3,
|
|
|
|
[GPIO_PF1] = 3,
|
|
|
|
[GPIO_PF2] = 4,
|
|
|
|
[GPIO_PF3] = 4,
|
|
|
|
[GPIO_PF4] = 5,
|
|
|
|
[GPIO_PF5] = 6,
|
|
|
|
[GPIO_PF6] = 7,
|
|
|
|
[GPIO_PF7] = 8,
|
|
|
|
[GPIO_PF8 ... GPIO_PF15] = -1,
|
|
|
|
[GPIO_PG0 ... GPIO_PG7] = -1,
|
|
|
|
[GPIO_PG8] = 9,
|
|
|
|
[GPIO_PG9] = 9,
|
|
|
|
[GPIO_PG10] = 10,
|
|
|
|
[GPIO_PG11] = 10,
|
|
|
|
[GPIO_PG12] = 10,
|
|
|
|
[GPIO_PG13] = 11,
|
|
|
|
[GPIO_PG14] = 11,
|
|
|
|
[GPIO_PG15] = 11,
|
|
|
|
[GPIO_PH0 ... GPIO_PH15] = -1,
|
|
|
|
[PORT_PJ0 ... PORT_PJ3] = -1,
|
|
|
|
[PORT_PJ4] = 1,
|
|
|
|
[PORT_PJ5] = 1,
|
|
|
|
[PORT_PJ6 ... PORT_PJ9] = -1,
|
|
|
|
[PORT_PJ10] = 0,
|
|
|
|
[PORT_PJ11] = 0,
|
2007-10-03 20:35:05 +04:00
|
|
|
};
|
|
|
|
|
2010-09-17 07:03:17 +04:00
|
|
|
static int portmux_group_check(unsigned short per)
|
2007-10-03 20:35:05 +04:00
|
|
|
{
|
2010-09-17 07:03:17 +04:00
|
|
|
u16 ident = P_IDENT(per);
|
2009-02-04 11:49:45 +03:00
|
|
|
u16 function = P_FUNCT2MUX(per);
|
2010-09-17 07:03:17 +04:00
|
|
|
s8 offset = port_mux[ident];
|
|
|
|
u16 m, pmux, pfunc;
|
2007-10-03 20:35:05 +04:00
|
|
|
|
2010-09-17 07:03:17 +04:00
|
|
|
if (offset < 0)
|
|
|
|
return 0;
|
2007-10-03 20:35:05 +04:00
|
|
|
|
2010-09-17 07:03:17 +04:00
|
|
|
pmux = bfin_read_PORT_MUX();
|
|
|
|
for (m = 0; m < ARRAY_SIZE(port_mux); ++m) {
|
|
|
|
if (m == ident)
|
|
|
|
continue;
|
|
|
|
if (port_mux[m] != offset)
|
|
|
|
continue;
|
|
|
|
if (!is_reserved(peri, m, 1))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
if (offset == 1)
|
|
|
|
pfunc = (pmux >> offset) & 3;
|
|
|
|
else
|
|
|
|
pfunc = (pmux >> offset) & 1;
|
|
|
|
if (pfunc != function) {
|
|
|
|
pr_err("pin group conflict! request pin %d func %d conflict with pin %d func %d\n",
|
|
|
|
ident, function, m, pfunc);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
}
|
2007-10-03 20:35:05 +04:00
|
|
|
|
2010-09-17 07:03:17 +04:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static void portmux_setup(unsigned short per)
|
|
|
|
{
|
|
|
|
u16 ident = P_IDENT(per);
|
|
|
|
u16 function = P_FUNCT2MUX(per);
|
|
|
|
s8 offset = port_mux[ident];
|
|
|
|
u16 pmux;
|
2007-10-03 20:35:05 +04:00
|
|
|
|
2010-09-17 07:03:17 +04:00
|
|
|
if (offset == -1)
|
|
|
|
return;
|
2007-10-03 20:35:05 +04:00
|
|
|
|
2010-09-17 07:03:17 +04:00
|
|
|
pmux = bfin_read_PORT_MUX();
|
|
|
|
if (offset != 1)
|
|
|
|
pmux &= ~(1 << offset);
|
|
|
|
else
|
|
|
|
pmux &= ~(3 << 1);
|
|
|
|
pmux |= (function << offset);
|
|
|
|
bfin_write_PORT_MUX(pmux);
|
2007-10-03 20:35:05 +04:00
|
|
|
}
|
2009-03-28 15:32:57 +03:00
|
|
|
#elif defined(CONFIG_BF54x)
|
2009-02-04 11:49:45 +03:00
|
|
|
inline void portmux_setup(unsigned short per)
|
2007-08-28 12:47:46 +04:00
|
|
|
{
|
2009-02-04 11:49:45 +03:00
|
|
|
u16 ident = P_IDENT(per);
|
|
|
|
u16 function = P_FUNCT2MUX(per);
|
2010-09-17 07:03:17 +04:00
|
|
|
u32 pmux;
|
2007-08-28 12:47:46 +04:00
|
|
|
|
2009-02-04 11:49:45 +03:00
|
|
|
pmux = gpio_array[gpio_bank(ident)]->port_mux;
|
2007-08-28 12:47:46 +04:00
|
|
|
|
2009-02-04 11:49:45 +03:00
|
|
|
pmux &= ~(0x3 << (2 * gpio_sub_n(ident)));
|
|
|
|
pmux |= (function & 0x3) << (2 * gpio_sub_n(ident));
|
2007-08-28 12:47:46 +04:00
|
|
|
|
2009-02-04 11:49:45 +03:00
|
|
|
gpio_array[gpio_bank(ident)]->port_mux = pmux;
|
2007-08-28 12:47:46 +04:00
|
|
|
}
|
|
|
|
|
2009-02-04 11:49:45 +03:00
|
|
|
inline u16 get_portmux(unsigned short per)
|
2007-08-28 12:47:46 +04:00
|
|
|
{
|
2009-02-04 11:49:45 +03:00
|
|
|
u16 ident = P_IDENT(per);
|
2010-09-17 07:03:17 +04:00
|
|
|
u32 pmux = gpio_array[gpio_bank(ident)]->port_mux;
|
2009-02-04 11:49:45 +03:00
|
|
|
return (pmux >> (2 * gpio_sub_n(ident)) & 0x3);
|
2007-08-28 12:47:46 +04:00
|
|
|
}
|
2010-09-17 07:03:17 +04:00
|
|
|
static int portmux_group_check(unsigned short per)
|
|
|
|
{
|
|
|
|
return 0;
|
|
|
|
}
|
2009-03-28 15:32:57 +03:00
|
|
|
#elif defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
|
2010-09-17 07:03:17 +04:00
|
|
|
static int portmux_group_check(unsigned short per)
|
|
|
|
{
|
|
|
|
u16 ident = P_IDENT(per);
|
|
|
|
u16 function = P_FUNCT2MUX(per);
|
|
|
|
u8 offset = pmux_offset[gpio_bank(ident)][gpio_sub_n(ident)];
|
|
|
|
u16 pin, gpiopin, pfunc;
|
|
|
|
|
|
|
|
for (pin = 0; pin < GPIO_BANKSIZE; ++pin) {
|
|
|
|
if (offset != pmux_offset[gpio_bank(ident)][pin])
|
|
|
|
continue;
|
|
|
|
|
|
|
|
gpiopin = gpio_bank(ident) * GPIO_BANKSIZE + pin;
|
|
|
|
if (gpiopin == ident)
|
|
|
|
continue;
|
|
|
|
if (!is_reserved(peri, gpiopin, 1))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
pfunc = *port_mux[gpio_bank(ident)];
|
|
|
|
pfunc = (pfunc >> offset) & 3;
|
|
|
|
if (pfunc != function) {
|
|
|
|
pr_err("pin group conflict! request pin %d func %d conflict with pin %d func %d\n",
|
|
|
|
ident, function, gpiopin, pfunc);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2009-02-04 11:49:45 +03:00
|
|
|
inline void portmux_setup(unsigned short per)
|
2007-10-21 12:54:27 +04:00
|
|
|
{
|
2010-09-17 07:03:17 +04:00
|
|
|
u16 ident = P_IDENT(per);
|
|
|
|
u16 function = P_FUNCT2MUX(per);
|
2007-10-21 12:54:27 +04:00
|
|
|
u8 offset = pmux_offset[gpio_bank(ident)][gpio_sub_n(ident)];
|
2010-09-17 07:03:17 +04:00
|
|
|
u16 pmux;
|
2007-10-21 12:54:27 +04:00
|
|
|
|
|
|
|
pmux = *port_mux[gpio_bank(ident)];
|
2010-09-17 07:03:17 +04:00
|
|
|
if (((pmux >> offset) & 3) == function)
|
|
|
|
return;
|
2007-10-21 12:54:27 +04:00
|
|
|
pmux &= ~(3 << offset);
|
|
|
|
pmux |= (function & 3) << offset;
|
|
|
|
*port_mux[gpio_bank(ident)] = pmux;
|
|
|
|
SSYNC();
|
|
|
|
}
|
2007-10-03 20:35:05 +04:00
|
|
|
#else
|
|
|
|
# define portmux_setup(...) do { } while (0)
|
2010-09-17 07:03:17 +04:00
|
|
|
static int portmux_group_check(unsigned short per)
|
|
|
|
{
|
|
|
|
return 0;
|
|
|
|
}
|
2007-10-03 20:35:05 +04:00
|
|
|
#endif
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
|
2009-03-28 15:32:57 +03:00
|
|
|
#ifndef CONFIG_BF54x
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
/***********************************************************
|
|
|
|
*
|
|
|
|
* FUNCTIONS: Blackfin General Purpose Ports Access Functions
|
|
|
|
*
|
|
|
|
* INPUTS/OUTPUTS:
|
|
|
|
* gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
|
|
|
|
*
|
|
|
|
*
|
|
|
|
* DESCRIPTION: These functions abstract direct register access
|
|
|
|
* to Blackfin processor General Purpose
|
|
|
|
* Ports Regsiters
|
|
|
|
*
|
|
|
|
* CAUTION: These functions do not belong to the GPIO Driver API
|
|
|
|
*************************************************************
|
|
|
|
* MODIFICATION HISTORY :
|
|
|
|
**************************************************************/
|
|
|
|
|
|
|
|
/* Set a specific bit */
|
|
|
|
|
|
|
|
#define SET_GPIO(name) \
|
2008-01-22 12:20:10 +03:00
|
|
|
void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
{ \
|
|
|
|
unsigned long flags; \
|
2010-10-07 17:08:52 +04:00
|
|
|
flags = hard_local_irq_save(); \
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
if (arg) \
|
2009-02-04 11:49:45 +03:00
|
|
|
gpio_array[gpio_bank(gpio)]->name |= gpio_bit(gpio); \
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
else \
|
2009-02-04 11:49:45 +03:00
|
|
|
gpio_array[gpio_bank(gpio)]->name &= ~gpio_bit(gpio); \
|
2007-10-10 12:58:49 +04:00
|
|
|
AWA_DUMMY_READ(name); \
|
2010-10-07 17:08:52 +04:00
|
|
|
hard_local_irq_restore(flags); \
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
} \
|
|
|
|
EXPORT_SYMBOL(set_gpio_ ## name);
|
|
|
|
|
2009-02-04 11:49:45 +03:00
|
|
|
SET_GPIO(dir) /* set_gpio_dir() */
|
|
|
|
SET_GPIO(inen) /* set_gpio_inen() */
|
|
|
|
SET_GPIO(polar) /* set_gpio_polar() */
|
|
|
|
SET_GPIO(edge) /* set_gpio_edge() */
|
|
|
|
SET_GPIO(both) /* set_gpio_both() */
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
|
|
|
|
|
2007-10-10 12:58:49 +04:00
|
|
|
#define SET_GPIO_SC(name) \
|
2008-01-22 12:20:10 +03:00
|
|
|
void set_gpio_ ## name(unsigned gpio, unsigned short arg) \
|
2007-10-10 12:58:49 +04:00
|
|
|
{ \
|
|
|
|
unsigned long flags; \
|
2009-02-04 11:49:45 +03:00
|
|
|
if (ANOMALY_05000311 || ANOMALY_05000323) \
|
2010-10-07 17:08:52 +04:00
|
|
|
flags = hard_local_irq_save(); \
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
if (arg) \
|
2009-02-04 11:49:45 +03:00
|
|
|
gpio_array[gpio_bank(gpio)]->name ## _set = gpio_bit(gpio); \
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
else \
|
2009-02-04 11:49:45 +03:00
|
|
|
gpio_array[gpio_bank(gpio)]->name ## _clear = gpio_bit(gpio); \
|
|
|
|
if (ANOMALY_05000311 || ANOMALY_05000323) { \
|
|
|
|
AWA_DUMMY_READ(name); \
|
2010-10-07 17:08:52 +04:00
|
|
|
hard_local_irq_restore(flags); \
|
2009-02-04 11:49:45 +03:00
|
|
|
} \
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
} \
|
|
|
|
EXPORT_SYMBOL(set_gpio_ ## name);
|
|
|
|
|
|
|
|
SET_GPIO_SC(maska)
|
|
|
|
SET_GPIO_SC(maskb)
|
|
|
|
SET_GPIO_SC(data)
|
|
|
|
|
2008-01-22 12:20:10 +03:00
|
|
|
void set_gpio_toggle(unsigned gpio)
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
{
|
|
|
|
unsigned long flags;
|
2009-02-04 11:49:45 +03:00
|
|
|
if (ANOMALY_05000311 || ANOMALY_05000323)
|
2010-10-07 17:08:52 +04:00
|
|
|
flags = hard_local_irq_save();
|
2009-02-04 11:49:45 +03:00
|
|
|
gpio_array[gpio_bank(gpio)]->toggle = gpio_bit(gpio);
|
|
|
|
if (ANOMALY_05000311 || ANOMALY_05000323) {
|
|
|
|
AWA_DUMMY_READ(toggle);
|
2010-10-07 17:08:52 +04:00
|
|
|
hard_local_irq_restore(flags);
|
2009-02-04 11:49:45 +03:00
|
|
|
}
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(set_gpio_toggle);
|
|
|
|
|
|
|
|
|
|
|
|
/*Set current PORT date (16-bit word)*/
|
|
|
|
|
|
|
|
#define SET_GPIO_P(name) \
|
2008-01-22 12:20:10 +03:00
|
|
|
void set_gpiop_ ## name(unsigned gpio, unsigned short arg) \
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
{ \
|
2007-10-10 12:58:49 +04:00
|
|
|
unsigned long flags; \
|
2009-02-04 11:49:45 +03:00
|
|
|
if (ANOMALY_05000311 || ANOMALY_05000323) \
|
2010-10-07 17:08:52 +04:00
|
|
|
flags = hard_local_irq_save(); \
|
2009-02-04 11:49:45 +03:00
|
|
|
gpio_array[gpio_bank(gpio)]->name = arg; \
|
|
|
|
if (ANOMALY_05000311 || ANOMALY_05000323) { \
|
|
|
|
AWA_DUMMY_READ(name); \
|
2010-10-07 17:08:52 +04:00
|
|
|
hard_local_irq_restore(flags); \
|
2009-02-04 11:49:45 +03:00
|
|
|
} \
|
2007-10-10 12:58:49 +04:00
|
|
|
} \
|
|
|
|
EXPORT_SYMBOL(set_gpiop_ ## name);
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
|
2007-10-10 12:58:49 +04:00
|
|
|
SET_GPIO_P(data)
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
SET_GPIO_P(dir)
|
|
|
|
SET_GPIO_P(inen)
|
|
|
|
SET_GPIO_P(polar)
|
|
|
|
SET_GPIO_P(edge)
|
|
|
|
SET_GPIO_P(both)
|
|
|
|
SET_GPIO_P(maska)
|
|
|
|
SET_GPIO_P(maskb)
|
|
|
|
|
|
|
|
/* Get a specific bit */
|
2007-10-10 12:58:49 +04:00
|
|
|
#define GET_GPIO(name) \
|
2008-01-22 12:20:10 +03:00
|
|
|
unsigned short get_gpio_ ## name(unsigned gpio) \
|
2007-10-10 12:58:49 +04:00
|
|
|
{ \
|
|
|
|
unsigned long flags; \
|
|
|
|
unsigned short ret; \
|
2009-02-04 11:49:45 +03:00
|
|
|
if (ANOMALY_05000311 || ANOMALY_05000323) \
|
2010-10-07 17:08:52 +04:00
|
|
|
flags = hard_local_irq_save(); \
|
2009-02-04 11:49:45 +03:00
|
|
|
ret = 0x01 & (gpio_array[gpio_bank(gpio)]->name >> gpio_sub_n(gpio)); \
|
|
|
|
if (ANOMALY_05000311 || ANOMALY_05000323) { \
|
|
|
|
AWA_DUMMY_READ(name); \
|
2010-10-07 17:08:52 +04:00
|
|
|
hard_local_irq_restore(flags); \
|
2009-02-04 11:49:45 +03:00
|
|
|
} \
|
2007-10-10 12:58:49 +04:00
|
|
|
return ret; \
|
|
|
|
} \
|
|
|
|
EXPORT_SYMBOL(get_gpio_ ## name);
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
|
2007-10-10 12:58:49 +04:00
|
|
|
GET_GPIO(data)
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
GET_GPIO(dir)
|
|
|
|
GET_GPIO(inen)
|
|
|
|
GET_GPIO(polar)
|
|
|
|
GET_GPIO(edge)
|
|
|
|
GET_GPIO(both)
|
|
|
|
GET_GPIO(maska)
|
|
|
|
GET_GPIO(maskb)
|
|
|
|
|
|
|
|
/*Get current PORT date (16-bit word)*/
|
|
|
|
|
2007-10-10 12:58:49 +04:00
|
|
|
#define GET_GPIO_P(name) \
|
2008-01-22 12:20:10 +03:00
|
|
|
unsigned short get_gpiop_ ## name(unsigned gpio) \
|
2007-10-10 12:58:49 +04:00
|
|
|
{ \
|
|
|
|
unsigned long flags; \
|
|
|
|
unsigned short ret; \
|
2009-02-04 11:49:45 +03:00
|
|
|
if (ANOMALY_05000311 || ANOMALY_05000323) \
|
2010-10-07 17:08:52 +04:00
|
|
|
flags = hard_local_irq_save(); \
|
2009-02-04 11:49:45 +03:00
|
|
|
ret = (gpio_array[gpio_bank(gpio)]->name); \
|
|
|
|
if (ANOMALY_05000311 || ANOMALY_05000323) { \
|
|
|
|
AWA_DUMMY_READ(name); \
|
2010-10-07 17:08:52 +04:00
|
|
|
hard_local_irq_restore(flags); \
|
2009-02-04 11:49:45 +03:00
|
|
|
} \
|
2007-10-10 12:58:49 +04:00
|
|
|
return ret; \
|
|
|
|
} \
|
|
|
|
EXPORT_SYMBOL(get_gpiop_ ## name);
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
|
2007-10-10 12:58:49 +04:00
|
|
|
GET_GPIO_P(data)
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
GET_GPIO_P(dir)
|
|
|
|
GET_GPIO_P(inen)
|
|
|
|
GET_GPIO_P(polar)
|
|
|
|
GET_GPIO_P(edge)
|
|
|
|
GET_GPIO_P(both)
|
|
|
|
GET_GPIO_P(maska)
|
|
|
|
GET_GPIO_P(maskb)
|
|
|
|
|
|
|
|
|
|
|
|
#ifdef CONFIG_PM
|
2010-06-02 08:22:01 +04:00
|
|
|
DECLARE_RESERVED_MAP(wakeup, GPIO_BANK_NUM);
|
2009-02-04 11:49:45 +03:00
|
|
|
|
|
|
|
static const unsigned int sic_iwr_irqs[] = {
|
|
|
|
#if defined(BF533_FAMILY)
|
|
|
|
IRQ_PROG_INTB
|
|
|
|
#elif defined(BF537_FAMILY)
|
|
|
|
IRQ_PROG_INTB, IRQ_PORTG_INTB, IRQ_MAC_TX
|
|
|
|
#elif defined(BF538_FAMILY)
|
|
|
|
IRQ_PORTF_INTB
|
2009-03-28 15:32:57 +03:00
|
|
|
#elif defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
|
2009-02-04 11:49:45 +03:00
|
|
|
IRQ_PORTF_INTB, IRQ_PORTG_INTB, IRQ_PORTH_INTB
|
|
|
|
#elif defined(BF561_FAMILY)
|
|
|
|
IRQ_PROG0_INTB, IRQ_PROG1_INTB, IRQ_PROG2_INTB
|
|
|
|
#else
|
|
|
|
# error no SIC_IWR defined
|
|
|
|
#endif
|
|
|
|
};
|
|
|
|
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
/***********************************************************
|
|
|
|
*
|
|
|
|
* FUNCTIONS: Blackfin PM Setup API
|
|
|
|
*
|
|
|
|
* INPUTS/OUTPUTS:
|
|
|
|
* gpio - GPIO Number between 0 and MAX_BLACKFIN_GPIOS
|
|
|
|
* type -
|
|
|
|
* PM_WAKE_RISING
|
|
|
|
* PM_WAKE_FALLING
|
|
|
|
* PM_WAKE_HIGH
|
|
|
|
* PM_WAKE_LOW
|
|
|
|
* PM_WAKE_BOTH_EDGES
|
|
|
|
*
|
|
|
|
* DESCRIPTION: Blackfin PM Driver API
|
|
|
|
*
|
|
|
|
* CAUTION:
|
|
|
|
*************************************************************
|
|
|
|
* MODIFICATION HISTORY :
|
|
|
|
**************************************************************/
|
2010-03-10 17:26:06 +03:00
|
|
|
int gpio_pm_wakeup_ctrl(unsigned gpio, unsigned ctrl)
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
{
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
if (check_gpio(gpio) < 0)
|
2010-03-10 17:26:06 +03:00
|
|
|
return -EINVAL;
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
|
2010-10-07 17:08:52 +04:00
|
|
|
flags = hard_local_irq_save();
|
2010-03-10 17:26:06 +03:00
|
|
|
if (ctrl)
|
2010-06-02 08:22:01 +04:00
|
|
|
reserve(wakeup, gpio);
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
else
|
2010-06-02 08:22:01 +04:00
|
|
|
unreserve(wakeup, gpio);
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
|
2010-03-10 17:26:06 +03:00
|
|
|
set_gpio_maskb(gpio, ctrl);
|
2010-10-07 17:08:52 +04:00
|
|
|
hard_local_irq_restore(flags);
|
2007-10-10 12:58:49 +04:00
|
|
|
|
2008-02-08 23:12:37 +03:00
|
|
|
return 0;
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
}
|
|
|
|
|
2010-03-10 17:26:06 +03:00
|
|
|
int bfin_pm_standby_ctrl(unsigned ctrl)
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
{
|
|
|
|
u16 bank, mask, i;
|
|
|
|
|
2007-07-12 18:58:21 +04:00
|
|
|
for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
|
2010-06-02 08:22:01 +04:00
|
|
|
mask = map_entry(wakeup, i);
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
bank = gpio_bank(i);
|
|
|
|
|
2010-03-10 17:26:06 +03:00
|
|
|
if (mask)
|
|
|
|
bfin_internal_set_wake(sic_iwr_irqs[bank], ctrl);
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
}
|
2010-03-10 17:26:06 +03:00
|
|
|
return 0;
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
}
|
|
|
|
|
2008-07-19 12:57:32 +04:00
|
|
|
void bfin_gpio_pm_hibernate_suspend(void)
|
|
|
|
{
|
|
|
|
int i, bank;
|
|
|
|
|
|
|
|
for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
|
|
|
|
bank = gpio_bank(i);
|
|
|
|
|
2009-03-28 15:32:57 +03:00
|
|
|
#if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
|
2009-02-04 11:49:45 +03:00
|
|
|
gpio_bank_saved[bank].fer = *port_fer[bank];
|
2009-03-28 15:32:57 +03:00
|
|
|
#if defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
|
2009-02-04 11:49:45 +03:00
|
|
|
gpio_bank_saved[bank].mux = *port_mux[bank];
|
2008-07-19 12:57:32 +04:00
|
|
|
#else
|
2009-02-04 11:49:45 +03:00
|
|
|
if (bank == 0)
|
|
|
|
gpio_bank_saved[bank].mux = bfin_read_PORT_MUX();
|
2008-07-19 12:57:32 +04:00
|
|
|
#endif
|
|
|
|
#endif
|
2009-02-04 11:49:45 +03:00
|
|
|
gpio_bank_saved[bank].data = gpio_array[bank]->data;
|
|
|
|
gpio_bank_saved[bank].inen = gpio_array[bank]->inen;
|
|
|
|
gpio_bank_saved[bank].polar = gpio_array[bank]->polar;
|
|
|
|
gpio_bank_saved[bank].dir = gpio_array[bank]->dir;
|
|
|
|
gpio_bank_saved[bank].edge = gpio_array[bank]->edge;
|
|
|
|
gpio_bank_saved[bank].both = gpio_array[bank]->both;
|
|
|
|
gpio_bank_saved[bank].maska = gpio_array[bank]->maska;
|
2008-07-19 12:57:32 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
AWA_DUMMY_READ(maska);
|
|
|
|
}
|
|
|
|
|
|
|
|
void bfin_gpio_pm_hibernate_restore(void)
|
|
|
|
{
|
|
|
|
int i, bank;
|
|
|
|
|
|
|
|
for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
|
2009-02-04 11:49:45 +03:00
|
|
|
bank = gpio_bank(i);
|
2008-07-19 12:57:32 +04:00
|
|
|
|
2009-03-28 15:32:57 +03:00
|
|
|
#if defined(CONFIG_BF52x) || defined(BF537_FAMILY) || defined(CONFIG_BF51x)
|
|
|
|
#if defined(CONFIG_BF52x) || defined(CONFIG_BF51x)
|
2009-02-04 11:49:45 +03:00
|
|
|
*port_mux[bank] = gpio_bank_saved[bank].mux;
|
2008-07-19 12:57:32 +04:00
|
|
|
#else
|
2009-02-04 11:49:45 +03:00
|
|
|
if (bank == 0)
|
|
|
|
bfin_write_PORT_MUX(gpio_bank_saved[bank].mux);
|
2008-07-19 12:57:32 +04:00
|
|
|
#endif
|
2009-02-04 11:49:45 +03:00
|
|
|
*port_fer[bank] = gpio_bank_saved[bank].fer;
|
2008-07-19 12:57:32 +04:00
|
|
|
#endif
|
2009-02-04 11:49:45 +03:00
|
|
|
gpio_array[bank]->inen = gpio_bank_saved[bank].inen;
|
2009-07-08 16:04:43 +04:00
|
|
|
gpio_array[bank]->data_set = gpio_bank_saved[bank].data
|
|
|
|
& gpio_bank_saved[bank].dir;
|
2009-02-04 11:49:45 +03:00
|
|
|
gpio_array[bank]->dir = gpio_bank_saved[bank].dir;
|
|
|
|
gpio_array[bank]->polar = gpio_bank_saved[bank].polar;
|
|
|
|
gpio_array[bank]->edge = gpio_bank_saved[bank].edge;
|
|
|
|
gpio_array[bank]->both = gpio_bank_saved[bank].both;
|
|
|
|
gpio_array[bank]->maska = gpio_bank_saved[bank].maska;
|
2008-07-19 12:57:32 +04:00
|
|
|
}
|
|
|
|
AWA_DUMMY_READ(maska);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
#endif
|
2009-03-28 15:32:57 +03:00
|
|
|
#else /* CONFIG_BF54x */
|
2008-07-19 12:57:32 +04:00
|
|
|
#ifdef CONFIG_PM
|
|
|
|
|
2010-03-10 17:26:06 +03:00
|
|
|
int bfin_pm_standby_ctrl(unsigned ctrl)
|
2008-07-19 12:57:32 +04:00
|
|
|
{
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
void bfin_gpio_pm_hibernate_suspend(void)
|
|
|
|
{
|
|
|
|
int i, bank;
|
|
|
|
|
|
|
|
for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
|
|
|
|
bank = gpio_bank(i);
|
|
|
|
|
2009-02-04 11:49:45 +03:00
|
|
|
gpio_bank_saved[bank].fer = gpio_array[bank]->port_fer;
|
|
|
|
gpio_bank_saved[bank].mux = gpio_array[bank]->port_mux;
|
|
|
|
gpio_bank_saved[bank].data = gpio_array[bank]->data;
|
|
|
|
gpio_bank_saved[bank].inen = gpio_array[bank]->inen;
|
|
|
|
gpio_bank_saved[bank].dir = gpio_array[bank]->dir_set;
|
2008-07-19 12:57:32 +04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void bfin_gpio_pm_hibernate_restore(void)
|
|
|
|
{
|
|
|
|
int i, bank;
|
|
|
|
|
|
|
|
for (i = 0; i < MAX_BLACKFIN_GPIOS; i += GPIO_BANKSIZE) {
|
2009-02-04 11:49:45 +03:00
|
|
|
bank = gpio_bank(i);
|
|
|
|
|
|
|
|
gpio_array[bank]->port_mux = gpio_bank_saved[bank].mux;
|
|
|
|
gpio_array[bank]->port_fer = gpio_bank_saved[bank].fer;
|
|
|
|
gpio_array[bank]->inen = gpio_bank_saved[bank].inen;
|
|
|
|
gpio_array[bank]->dir_set = gpio_bank_saved[bank].dir;
|
|
|
|
gpio_array[bank]->data_set = gpio_bank_saved[bank].data
|
|
|
|
| gpio_bank_saved[bank].dir;
|
2008-07-19 12:57:32 +04:00
|
|
|
}
|
|
|
|
}
|
|
|
|
#endif
|
2007-12-24 15:07:03 +03:00
|
|
|
|
2008-01-22 12:20:10 +03:00
|
|
|
unsigned short get_gpio_dir(unsigned gpio)
|
2007-12-24 15:07:03 +03:00
|
|
|
{
|
2009-02-04 11:49:45 +03:00
|
|
|
return (0x01 & (gpio_array[gpio_bank(gpio)]->dir_clear >> gpio_sub_n(gpio)));
|
2007-12-24 15:07:03 +03:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(get_gpio_dir);
|
|
|
|
|
2009-03-28 15:32:57 +03:00
|
|
|
#endif /* CONFIG_BF54x */
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
|
2007-08-28 12:47:46 +04:00
|
|
|
/***********************************************************
|
|
|
|
*
|
2010-07-05 12:40:41 +04:00
|
|
|
* FUNCTIONS: Blackfin Peripheral Resource Allocation
|
2007-08-28 12:47:46 +04:00
|
|
|
* and PortMux Setup
|
|
|
|
*
|
|
|
|
* INPUTS/OUTPUTS:
|
|
|
|
* per Peripheral Identifier
|
|
|
|
* label String
|
|
|
|
*
|
|
|
|
* DESCRIPTION: Blackfin Peripheral Resource Allocation and Setup API
|
|
|
|
*
|
|
|
|
* CAUTION:
|
|
|
|
*************************************************************
|
|
|
|
* MODIFICATION HISTORY :
|
|
|
|
**************************************************************/
|
|
|
|
|
|
|
|
int peripheral_request(unsigned short per, const char *label)
|
|
|
|
{
|
|
|
|
unsigned long flags;
|
|
|
|
unsigned short ident = P_IDENT(per);
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Don't cares are pins with only one dedicated function
|
|
|
|
*/
|
2007-10-03 20:35:05 +04:00
|
|
|
|
2007-08-28 12:47:46 +04:00
|
|
|
if (per & P_DONTCARE)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
if (!(per & P_DEFINED))
|
|
|
|
return -ENODEV;
|
|
|
|
|
2009-09-16 08:36:29 +04:00
|
|
|
BUG_ON(ident >= MAX_RESOURCES);
|
|
|
|
|
2010-10-07 17:08:52 +04:00
|
|
|
flags = hard_local_irq_save();
|
2007-08-28 12:47:46 +04:00
|
|
|
|
2008-10-28 11:16:29 +03:00
|
|
|
/* If a pin can be muxed as either GPIO or peripheral, make
|
|
|
|
* sure it is not already a GPIO pin when we request it.
|
|
|
|
*/
|
2010-06-02 08:22:01 +04:00
|
|
|
if (unlikely(!check_gpio(ident) && is_reserved(gpio, ident, 1))) {
|
2009-03-28 20:10:30 +03:00
|
|
|
if (system_state == SYSTEM_BOOTING)
|
|
|
|
dump_stack();
|
2007-08-28 12:47:46 +04:00
|
|
|
printk(KERN_ERR
|
2008-10-28 10:49:59 +03:00
|
|
|
"%s: Peripheral %d is already reserved as GPIO by %s !\n",
|
2008-04-23 05:39:01 +04:00
|
|
|
__func__, ident, get_label(ident));
|
2010-10-07 17:08:52 +04:00
|
|
|
hard_local_irq_restore(flags);
|
2007-08-28 12:47:46 +04:00
|
|
|
return -EBUSY;
|
|
|
|
}
|
|
|
|
|
2010-06-02 08:22:01 +04:00
|
|
|
if (unlikely(is_reserved(peri, ident, 1))) {
|
2007-08-28 12:47:46 +04:00
|
|
|
|
2008-03-26 03:35:46 +03:00
|
|
|
/*
|
|
|
|
* Pin functions like AMC address strobes my
|
|
|
|
* be requested and used by several drivers
|
|
|
|
*/
|
2007-08-28 12:47:46 +04:00
|
|
|
|
2009-03-28 15:32:57 +03:00
|
|
|
#ifdef CONFIG_BF54x
|
2009-02-04 11:49:45 +03:00
|
|
|
if (!((per & P_MAYSHARE) && get_portmux(per) == P_FUNCT2MUX(per))) {
|
2008-10-28 10:49:59 +03:00
|
|
|
#else
|
|
|
|
if (!(per & P_MAYSHARE)) {
|
|
|
|
#endif
|
2008-03-26 03:35:46 +03:00
|
|
|
/*
|
|
|
|
* Allow that the identical pin function can
|
|
|
|
* be requested from the same driver twice
|
|
|
|
*/
|
2007-08-28 12:47:46 +04:00
|
|
|
|
2008-03-26 03:35:46 +03:00
|
|
|
if (cmp_label(ident, label) == 0)
|
|
|
|
goto anyway;
|
2007-08-28 12:47:46 +04:00
|
|
|
|
2009-03-28 20:10:30 +03:00
|
|
|
if (system_state == SYSTEM_BOOTING)
|
|
|
|
dump_stack();
|
2007-08-28 12:47:46 +04:00
|
|
|
printk(KERN_ERR
|
|
|
|
"%s: Peripheral %d function %d is already reserved by %s !\n",
|
2008-04-23 05:39:01 +04:00
|
|
|
__func__, ident, P_FUNCT2MUX(per), get_label(ident));
|
2010-10-07 17:08:52 +04:00
|
|
|
hard_local_irq_restore(flags);
|
2007-08-28 12:47:46 +04:00
|
|
|
return -EBUSY;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2010-09-17 07:03:17 +04:00
|
|
|
if (unlikely(portmux_group_check(per))) {
|
|
|
|
hard_local_irq_restore(flags);
|
|
|
|
return -EBUSY;
|
|
|
|
}
|
2008-03-26 03:35:46 +03:00
|
|
|
anyway:
|
2010-06-02 08:22:01 +04:00
|
|
|
reserve(peri, ident);
|
2007-08-28 12:47:46 +04:00
|
|
|
|
2009-02-04 11:49:45 +03:00
|
|
|
portmux_setup(per);
|
2007-10-03 20:35:05 +04:00
|
|
|
port_setup(ident, PERIPHERAL_USAGE);
|
|
|
|
|
2010-10-07 17:08:52 +04:00
|
|
|
hard_local_irq_restore(flags);
|
2007-10-03 20:35:05 +04:00
|
|
|
set_label(ident, label);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(peripheral_request);
|
|
|
|
|
2008-04-24 01:04:24 +04:00
|
|
|
int peripheral_request_list(const unsigned short per[], const char *label)
|
2007-10-03 20:35:05 +04:00
|
|
|
{
|
|
|
|
u16 cnt;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
for (cnt = 0; per[cnt] != 0; cnt++) {
|
2007-07-24 14:03:45 +04:00
|
|
|
|
2007-10-03 20:35:05 +04:00
|
|
|
ret = peripheral_request(per[cnt], label);
|
2007-07-24 14:03:45 +04:00
|
|
|
|
|
|
|
if (ret < 0) {
|
2008-03-26 03:35:46 +03:00
|
|
|
for ( ; cnt > 0; cnt--)
|
2007-07-24 14:03:45 +04:00
|
|
|
peripheral_free(per[cnt - 1]);
|
2008-03-26 03:35:46 +03:00
|
|
|
|
|
|
|
return ret;
|
2007-07-24 14:03:45 +04:00
|
|
|
}
|
2007-10-03 20:35:05 +04:00
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(peripheral_request_list);
|
|
|
|
|
|
|
|
void peripheral_free(unsigned short per)
|
|
|
|
{
|
|
|
|
unsigned long flags;
|
|
|
|
unsigned short ident = P_IDENT(per);
|
|
|
|
|
|
|
|
if (per & P_DONTCARE)
|
|
|
|
return;
|
|
|
|
|
|
|
|
if (!(per & P_DEFINED))
|
|
|
|
return;
|
|
|
|
|
2010-10-07 17:08:52 +04:00
|
|
|
flags = hard_local_irq_save();
|
2007-10-03 20:35:05 +04:00
|
|
|
|
2010-06-02 08:22:01 +04:00
|
|
|
if (unlikely(!is_reserved(peri, ident, 0))) {
|
2010-10-07 17:08:52 +04:00
|
|
|
hard_local_irq_restore(flags);
|
2007-10-03 20:35:05 +04:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2008-03-26 03:35:46 +03:00
|
|
|
if (!(per & P_MAYSHARE))
|
2007-10-03 20:35:05 +04:00
|
|
|
port_setup(ident, GPIO_USAGE);
|
|
|
|
|
2010-06-02 08:22:01 +04:00
|
|
|
unreserve(peri, ident);
|
2007-10-03 20:35:05 +04:00
|
|
|
|
2007-10-10 20:24:40 +04:00
|
|
|
set_label(ident, "free");
|
|
|
|
|
2010-10-07 17:08:52 +04:00
|
|
|
hard_local_irq_restore(flags);
|
2007-10-03 20:35:05 +04:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(peripheral_free);
|
|
|
|
|
2008-04-24 01:04:24 +04:00
|
|
|
void peripheral_free_list(const unsigned short per[])
|
2007-10-03 20:35:05 +04:00
|
|
|
{
|
|
|
|
u16 cnt;
|
2008-03-26 03:35:46 +03:00
|
|
|
for (cnt = 0; per[cnt] != 0; cnt++)
|
2007-10-03 20:35:05 +04:00
|
|
|
peripheral_free(per[cnt]);
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(peripheral_free_list);
|
|
|
|
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
/***********************************************************
|
|
|
|
*
|
|
|
|
* FUNCTIONS: Blackfin GPIO Driver
|
|
|
|
*
|
|
|
|
* INPUTS/OUTPUTS:
|
2007-08-28 12:47:46 +04:00
|
|
|
* gpio PIO Number between 0 and MAX_BLACKFIN_GPIOS
|
|
|
|
* label String
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
*
|
|
|
|
* DESCRIPTION: Blackfin GPIO Driver API
|
|
|
|
*
|
|
|
|
* CAUTION:
|
|
|
|
*************************************************************
|
|
|
|
* MODIFICATION HISTORY :
|
|
|
|
**************************************************************/
|
|
|
|
|
2008-11-18 12:48:22 +03:00
|
|
|
int bfin_gpio_request(unsigned gpio, const char *label)
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
{
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
if (check_gpio(gpio) < 0)
|
|
|
|
return -EINVAL;
|
|
|
|
|
2010-10-07 17:08:52 +04:00
|
|
|
flags = hard_local_irq_save();
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
|
2007-10-10 20:24:40 +04:00
|
|
|
/*
|
|
|
|
* Allow that the identical GPIO can
|
|
|
|
* be requested from the same driver twice
|
|
|
|
* Do nothing and return -
|
|
|
|
*/
|
|
|
|
|
|
|
|
if (cmp_label(gpio, label) == 0) {
|
2010-10-07 17:08:52 +04:00
|
|
|
hard_local_irq_restore(flags);
|
2007-10-10 20:24:40 +04:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2010-06-02 08:22:01 +04:00
|
|
|
if (unlikely(is_reserved(gpio, gpio, 1))) {
|
2009-03-28 20:10:30 +03:00
|
|
|
if (system_state == SYSTEM_BOOTING)
|
|
|
|
dump_stack();
|
2007-08-28 12:47:46 +04:00
|
|
|
printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved by %s !\n",
|
2009-01-07 18:14:38 +03:00
|
|
|
gpio, get_label(gpio));
|
2010-10-07 17:08:52 +04:00
|
|
|
hard_local_irq_restore(flags);
|
2007-08-28 12:47:46 +04:00
|
|
|
return -EBUSY;
|
|
|
|
}
|
2010-06-02 08:22:01 +04:00
|
|
|
if (unlikely(is_reserved(peri, gpio, 1))) {
|
2009-03-28 20:10:30 +03:00
|
|
|
if (system_state == SYSTEM_BOOTING)
|
|
|
|
dump_stack();
|
2007-08-28 12:47:46 +04:00
|
|
|
printk(KERN_ERR
|
|
|
|
"bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
|
|
|
|
gpio, get_label(gpio));
|
2010-10-07 17:08:52 +04:00
|
|
|
hard_local_irq_restore(flags);
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
return -EBUSY;
|
|
|
|
}
|
2010-06-02 08:22:01 +04:00
|
|
|
if (unlikely(is_reserved(gpio_irq, gpio, 1))) {
|
2009-01-07 18:14:38 +03:00
|
|
|
printk(KERN_NOTICE "bfin-gpio: GPIO %d is already reserved as gpio-irq!"
|
|
|
|
" (Documentation/blackfin/bfin-gpio-notes.txt)\n", gpio);
|
2009-02-04 11:49:45 +03:00
|
|
|
}
|
2009-03-28 15:32:57 +03:00
|
|
|
#ifndef CONFIG_BF54x
|
2009-02-04 11:49:45 +03:00
|
|
|
else { /* Reset POLAR setting when acquiring a gpio for the first time */
|
|
|
|
set_gpio_polar(gpio, 0);
|
|
|
|
}
|
|
|
|
#endif
|
2007-08-28 12:47:46 +04:00
|
|
|
|
2010-06-02 08:22:01 +04:00
|
|
|
reserve(gpio, gpio);
|
2009-01-07 18:14:38 +03:00
|
|
|
set_label(gpio, label);
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
|
2010-10-07 17:08:52 +04:00
|
|
|
hard_local_irq_restore(flags);
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
|
|
|
|
port_setup(gpio, GPIO_USAGE);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
2008-11-18 12:48:22 +03:00
|
|
|
EXPORT_SYMBOL(bfin_gpio_request);
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
|
2008-11-18 12:48:22 +03:00
|
|
|
void bfin_gpio_free(unsigned gpio)
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
{
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
if (check_gpio(gpio) < 0)
|
|
|
|
return;
|
|
|
|
|
2009-02-04 12:02:30 +03:00
|
|
|
might_sleep();
|
|
|
|
|
2010-10-07 17:08:52 +04:00
|
|
|
flags = hard_local_irq_save();
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
|
2010-06-02 08:22:01 +04:00
|
|
|
if (unlikely(!is_reserved(gpio, gpio, 0))) {
|
2009-03-28 20:10:30 +03:00
|
|
|
if (system_state == SYSTEM_BOOTING)
|
|
|
|
dump_stack();
|
2008-03-26 03:34:23 +03:00
|
|
|
gpio_error(gpio);
|
2010-10-07 17:08:52 +04:00
|
|
|
hard_local_irq_restore(flags);
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2010-06-02 08:22:01 +04:00
|
|
|
unreserve(gpio, gpio);
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
|
2007-10-10 20:24:40 +04:00
|
|
|
set_label(gpio, "free");
|
|
|
|
|
2010-10-07 17:08:52 +04:00
|
|
|
hard_local_irq_restore(flags);
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
}
|
2008-11-18 12:48:22 +03:00
|
|
|
EXPORT_SYMBOL(bfin_gpio_free);
|
blackfin architecture
This adds support for the Analog Devices Blackfin processor architecture, and
currently supports the BF533, BF532, BF531, BF537, BF536, BF534, and BF561
(Dual Core) devices, with a variety of development platforms including those
avaliable from Analog Devices (BF533-EZKit, BF533-STAMP, BF537-STAMP,
BF561-EZKIT), and Bluetechnix! Tinyboards.
The Blackfin architecture was jointly developed by Intel and Analog Devices
Inc. (ADI) as the Micro Signal Architecture (MSA) core and introduced it in
December of 2000. Since then ADI has put this core into its Blackfin
processor family of devices. The Blackfin core has the advantages of a clean,
orthogonal,RISC-like microprocessor instruction set. It combines a dual-MAC
(Multiply/Accumulate), state-of-the-art signal processing engine and
single-instruction, multiple-data (SIMD) multimedia capabilities into a single
instruction-set architecture.
The Blackfin architecture, including the instruction set, is described by the
ADSP-BF53x/BF56x Blackfin Processor Programming Reference
http://blackfin.uclinux.org/gf/download/frsrelease/29/2549/Blackfin_PRM.pdf
The Blackfin processor is already supported by major releases of gcc, and
there are binary and source rpms/tarballs for many architectures at:
http://blackfin.uclinux.org/gf/project/toolchain/frs There is complete
documentation, including "getting started" guides available at:
http://docs.blackfin.uclinux.org/ which provides links to the sources and
patches you will need in order to set up a cross-compiling environment for
bfin-linux-uclibc
This patch, as well as the other patches (toolchain, distribution,
uClibc) are actively supported by Analog Devices Inc, at:
http://blackfin.uclinux.org/
We have tested this on LTP, and our test plan (including pass/fails) can
be found at:
http://docs.blackfin.uclinux.org/doku.php?id=testing_the_linux_kernel
[m.kozlowski@tuxland.pl: balance parenthesis in blackfin header files]
Signed-off-by: Bryan Wu <bryan.wu@analog.com>
Signed-off-by: Mariusz Kozlowski <m.kozlowski@tuxland.pl>
Signed-off-by: Aubrey Li <aubrey.li@analog.com>
Signed-off-by: Jie Zhang <jie.zhang@analog.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2007-05-07 01:50:22 +04:00
|
|
|
|
2009-09-28 16:23:41 +04:00
|
|
|
#ifdef BFIN_SPECIAL_GPIO_BANKS
|
2010-06-02 08:22:01 +04:00
|
|
|
DECLARE_RESERVED_MAP(special_gpio, gpio_bank(MAX_RESOURCES));
|
2009-09-28 16:23:41 +04:00
|
|
|
|
|
|
|
int bfin_special_gpio_request(unsigned gpio, const char *label)
|
|
|
|
{
|
|
|
|
unsigned long flags;
|
|
|
|
|
2010-10-07 17:08:52 +04:00
|
|
|
flags = hard_local_irq_save();
|
2009-09-28 16:23:41 +04:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Allow that the identical GPIO can
|
|
|
|
* be requested from the same driver twice
|
|
|
|
* Do nothing and return -
|
|
|
|
*/
|
|
|
|
|
|
|
|
if (cmp_label(gpio, label) == 0) {
|
2010-10-07 17:08:52 +04:00
|
|
|
hard_local_irq_restore(flags);
|
2009-09-28 16:23:41 +04:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2010-06-02 08:22:01 +04:00
|
|
|
if (unlikely(is_reserved(special_gpio, gpio, 1))) {
|
2010-10-07 17:08:52 +04:00
|
|
|
hard_local_irq_restore(flags);
|
2009-09-28 16:23:41 +04:00
|
|
|
printk(KERN_ERR "bfin-gpio: GPIO %d is already reserved by %s !\n",
|
|
|
|
gpio, get_label(gpio));
|
|
|
|
|
|
|
|
return -EBUSY;
|
|
|
|
}
|
2010-06-02 08:22:01 +04:00
|
|
|
if (unlikely(is_reserved(peri, gpio, 1))) {
|
2010-10-07 17:08:52 +04:00
|
|
|
hard_local_irq_restore(flags);
|
2009-09-28 16:23:41 +04:00
|
|
|
printk(KERN_ERR
|
|
|
|
"bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
|
|
|
|
gpio, get_label(gpio));
|
|
|
|
|
|
|
|
return -EBUSY;
|
|
|
|
}
|
|
|
|
|
2010-06-02 08:22:01 +04:00
|
|
|
reserve(special_gpio, gpio);
|
|
|
|
reserve(peri, gpio);
|
2009-09-28 16:23:41 +04:00
|
|
|
|
|
|
|
set_label(gpio, label);
|
2010-10-07 17:08:52 +04:00
|
|
|
hard_local_irq_restore(flags);
|
2009-09-28 16:23:41 +04:00
|
|
|
port_setup(gpio, GPIO_USAGE);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(bfin_special_gpio_request);
|
|
|
|
|
|
|
|
void bfin_special_gpio_free(unsigned gpio)
|
|
|
|
{
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
might_sleep();
|
|
|
|
|
2010-10-07 17:08:52 +04:00
|
|
|
flags = hard_local_irq_save();
|
2009-09-28 16:23:41 +04:00
|
|
|
|
2010-06-02 08:22:01 +04:00
|
|
|
if (unlikely(!is_reserved(special_gpio, gpio, 0))) {
|
2009-09-28 16:23:41 +04:00
|
|
|
gpio_error(gpio);
|
2010-10-07 17:08:52 +04:00
|
|
|
hard_local_irq_restore(flags);
|
2009-09-28 16:23:41 +04:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2010-06-02 08:22:01 +04:00
|
|
|
unreserve(special_gpio, gpio);
|
|
|
|
unreserve(peri, gpio);
|
2009-09-28 16:23:41 +04:00
|
|
|
set_label(gpio, "free");
|
2010-10-07 17:08:52 +04:00
|
|
|
hard_local_irq_restore(flags);
|
2009-09-28 16:23:41 +04:00
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(bfin_special_gpio_free);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
|
2009-01-07 18:14:38 +03:00
|
|
|
int bfin_gpio_irq_request(unsigned gpio, const char *label)
|
|
|
|
{
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
if (check_gpio(gpio) < 0)
|
|
|
|
return -EINVAL;
|
|
|
|
|
2010-10-07 17:08:52 +04:00
|
|
|
flags = hard_local_irq_save();
|
2009-01-07 18:14:38 +03:00
|
|
|
|
2010-06-02 08:22:01 +04:00
|
|
|
if (unlikely(is_reserved(peri, gpio, 1))) {
|
2009-03-28 20:10:30 +03:00
|
|
|
if (system_state == SYSTEM_BOOTING)
|
|
|
|
dump_stack();
|
2009-01-07 18:14:38 +03:00
|
|
|
printk(KERN_ERR
|
|
|
|
"bfin-gpio: GPIO %d is already reserved as Peripheral by %s !\n",
|
|
|
|
gpio, get_label(gpio));
|
2010-10-07 17:08:52 +04:00
|
|
|
hard_local_irq_restore(flags);
|
2009-01-07 18:14:38 +03:00
|
|
|
return -EBUSY;
|
|
|
|
}
|
2010-06-02 08:22:01 +04:00
|
|
|
if (unlikely(is_reserved(gpio, gpio, 1)))
|
2009-01-07 18:14:38 +03:00
|
|
|
printk(KERN_NOTICE "bfin-gpio: GPIO %d is already reserved by %s! "
|
|
|
|
"(Documentation/blackfin/bfin-gpio-notes.txt)\n",
|
|
|
|
gpio, get_label(gpio));
|
|
|
|
|
2010-06-02 08:22:01 +04:00
|
|
|
reserve(gpio_irq, gpio);
|
2009-01-07 18:14:38 +03:00
|
|
|
set_label(gpio, label);
|
|
|
|
|
2010-10-07 17:08:52 +04:00
|
|
|
hard_local_irq_restore(flags);
|
2009-01-07 18:14:38 +03:00
|
|
|
|
|
|
|
port_setup(gpio, GPIO_USAGE);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
void bfin_gpio_irq_free(unsigned gpio)
|
|
|
|
{
|
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
if (check_gpio(gpio) < 0)
|
|
|
|
return;
|
|
|
|
|
2010-10-07 17:08:52 +04:00
|
|
|
flags = hard_local_irq_save();
|
2009-01-07 18:14:38 +03:00
|
|
|
|
2010-06-02 08:22:01 +04:00
|
|
|
if (unlikely(!is_reserved(gpio_irq, gpio, 0))) {
|
2009-03-28 20:10:30 +03:00
|
|
|
if (system_state == SYSTEM_BOOTING)
|
|
|
|
dump_stack();
|
2009-01-07 18:14:38 +03:00
|
|
|
gpio_error(gpio);
|
2010-10-07 17:08:52 +04:00
|
|
|
hard_local_irq_restore(flags);
|
2009-01-07 18:14:38 +03:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2010-06-02 08:22:01 +04:00
|
|
|
unreserve(gpio_irq, gpio);
|
2009-01-07 18:14:38 +03:00
|
|
|
|
|
|
|
set_label(gpio, "free");
|
|
|
|
|
2010-10-07 17:08:52 +04:00
|
|
|
hard_local_irq_restore(flags);
|
2009-01-07 18:14:38 +03:00
|
|
|
}
|
|
|
|
|
2009-02-04 11:49:45 +03:00
|
|
|
static inline void __bfin_gpio_direction_input(unsigned gpio)
|
|
|
|
{
|
2009-03-28 15:32:57 +03:00
|
|
|
#ifdef CONFIG_BF54x
|
2009-02-04 11:49:45 +03:00
|
|
|
gpio_array[gpio_bank(gpio)]->dir_clear = gpio_bit(gpio);
|
|
|
|
#else
|
|
|
|
gpio_array[gpio_bank(gpio)]->dir &= ~gpio_bit(gpio);
|
|
|
|
#endif
|
|
|
|
gpio_array[gpio_bank(gpio)]->inen |= gpio_bit(gpio);
|
|
|
|
}
|
|
|
|
|
2008-11-18 12:48:22 +03:00
|
|
|
int bfin_gpio_direction_input(unsigned gpio)
|
2007-08-28 12:47:46 +04:00
|
|
|
{
|
|
|
|
unsigned long flags;
|
|
|
|
|
2010-06-02 08:22:01 +04:00
|
|
|
if (unlikely(!is_reserved(gpio, gpio, 0))) {
|
2008-01-22 13:36:20 +03:00
|
|
|
gpio_error(gpio);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2010-10-07 17:08:52 +04:00
|
|
|
flags = hard_local_irq_save();
|
2009-02-04 11:49:45 +03:00
|
|
|
__bfin_gpio_direction_input(gpio);
|
|
|
|
AWA_DUMMY_READ(inen);
|
2010-10-07 17:08:52 +04:00
|
|
|
hard_local_irq_restore(flags);
|
2008-01-22 13:36:20 +03:00
|
|
|
|
|
|
|
return 0;
|
2007-08-28 12:47:46 +04:00
|
|
|
}
|
2008-11-18 12:48:22 +03:00
|
|
|
EXPORT_SYMBOL(bfin_gpio_direction_input);
|
2007-08-28 12:47:46 +04:00
|
|
|
|
2009-02-04 11:49:45 +03:00
|
|
|
void bfin_gpio_irq_prepare(unsigned gpio)
|
2007-08-28 12:47:46 +04:00
|
|
|
{
|
2009-03-28 15:32:57 +03:00
|
|
|
#ifdef CONFIG_BF54x
|
2007-08-28 12:47:46 +04:00
|
|
|
unsigned long flags;
|
2009-02-04 11:49:45 +03:00
|
|
|
#endif
|
2007-08-28 12:47:46 +04:00
|
|
|
|
2009-02-04 11:49:45 +03:00
|
|
|
port_setup(gpio, GPIO_USAGE);
|
2007-08-28 12:47:46 +04:00
|
|
|
|
2009-03-28 15:32:57 +03:00
|
|
|
#ifdef CONFIG_BF54x
|
2010-10-07 17:08:52 +04:00
|
|
|
flags = hard_local_irq_save();
|
2009-02-04 11:49:45 +03:00
|
|
|
__bfin_gpio_direction_input(gpio);
|
2010-10-07 17:08:52 +04:00
|
|
|
hard_local_irq_restore(flags);
|
2009-02-04 11:49:45 +03:00
|
|
|
#endif
|
2007-08-28 12:47:46 +04:00
|
|
|
}
|
|
|
|
|
2008-11-18 12:48:22 +03:00
|
|
|
void bfin_gpio_set_value(unsigned gpio, int arg)
|
2007-08-28 12:47:46 +04:00
|
|
|
{
|
|
|
|
if (arg)
|
2009-02-04 11:49:45 +03:00
|
|
|
gpio_array[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
|
2007-08-28 12:47:46 +04:00
|
|
|
else
|
2009-02-04 11:49:45 +03:00
|
|
|
gpio_array[gpio_bank(gpio)]->data_clear = gpio_bit(gpio);
|
2007-08-28 12:47:46 +04:00
|
|
|
}
|
2008-11-18 12:48:22 +03:00
|
|
|
EXPORT_SYMBOL(bfin_gpio_set_value);
|
2007-08-28 12:47:46 +04:00
|
|
|
|
2009-02-04 11:49:45 +03:00
|
|
|
int bfin_gpio_direction_output(unsigned gpio, int value)
|
2008-04-24 04:10:10 +04:00
|
|
|
{
|
|
|
|
unsigned long flags;
|
|
|
|
|
2010-06-02 08:22:01 +04:00
|
|
|
if (unlikely(!is_reserved(gpio, gpio, 0))) {
|
2009-02-04 11:49:45 +03:00
|
|
|
gpio_error(gpio);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
2008-04-24 04:10:10 +04:00
|
|
|
|
2010-10-07 17:08:52 +04:00
|
|
|
flags = hard_local_irq_save();
|
2008-04-24 04:10:10 +04:00
|
|
|
|
2009-02-04 11:49:45 +03:00
|
|
|
gpio_array[gpio_bank(gpio)]->inen &= ~gpio_bit(gpio);
|
|
|
|
gpio_set_value(gpio, value);
|
2009-03-28 15:32:57 +03:00
|
|
|
#ifdef CONFIG_BF54x
|
2009-02-04 11:49:45 +03:00
|
|
|
gpio_array[gpio_bank(gpio)]->dir_set = gpio_bit(gpio);
|
2007-08-28 12:47:46 +04:00
|
|
|
#else
|
2009-02-04 11:49:45 +03:00
|
|
|
gpio_array[gpio_bank(gpio)]->dir |= gpio_bit(gpio);
|
|
|
|
#endif
|
|
|
|
|
|
|
|
AWA_DUMMY_READ(dir);
|
2010-10-07 17:08:52 +04:00
|
|
|
hard_local_irq_restore(flags);
|
2009-02-04 11:49:45 +03:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
EXPORT_SYMBOL(bfin_gpio_direction_output);
|
2007-08-28 12:47:46 +04:00
|
|
|
|
2008-11-18 12:48:22 +03:00
|
|
|
int bfin_gpio_get_value(unsigned gpio)
|
2008-05-17 12:01:51 +04:00
|
|
|
{
|
2009-03-28 15:32:57 +03:00
|
|
|
#ifdef CONFIG_BF54x
|
2009-02-04 11:49:45 +03:00
|
|
|
return (1 & (gpio_array[gpio_bank(gpio)]->data >> gpio_sub_n(gpio)));
|
|
|
|
#else
|
2008-05-17 12:01:51 +04:00
|
|
|
unsigned long flags;
|
|
|
|
|
|
|
|
if (unlikely(get_gpio_edge(gpio))) {
|
2009-02-04 11:49:45 +03:00
|
|
|
int ret;
|
2010-10-07 17:08:52 +04:00
|
|
|
flags = hard_local_irq_save();
|
2008-05-17 12:01:51 +04:00
|
|
|
set_gpio_edge(gpio, 0);
|
|
|
|
ret = get_gpio_data(gpio);
|
|
|
|
set_gpio_edge(gpio, 1);
|
2010-10-07 17:08:52 +04:00
|
|
|
hard_local_irq_restore(flags);
|
2008-05-17 12:01:51 +04:00
|
|
|
return ret;
|
|
|
|
} else
|
|
|
|
return get_gpio_data(gpio);
|
2009-02-04 11:49:45 +03:00
|
|
|
#endif
|
2008-05-17 12:01:51 +04:00
|
|
|
}
|
2008-11-18 12:48:22 +03:00
|
|
|
EXPORT_SYMBOL(bfin_gpio_get_value);
|
2008-05-17 12:01:51 +04:00
|
|
|
|
2007-10-10 20:22:35 +04:00
|
|
|
/* If we are booting from SPI and our board lacks a strong enough pull up,
|
|
|
|
* the core can reset and execute the bootrom faster than the resistor can
|
|
|
|
* pull the signal logically high. To work around this (common) error in
|
|
|
|
* board design, we explicitly set the pin back to GPIO mode, force /CS
|
|
|
|
* high, and wait for the electrons to do their thing.
|
|
|
|
*
|
|
|
|
* This function only makes sense to be called from reset code, but it
|
|
|
|
* lives here as we need to force all the GPIO states w/out going through
|
|
|
|
* BUG() checks and such.
|
|
|
|
*/
|
2009-02-04 11:49:45 +03:00
|
|
|
void bfin_reset_boot_spi_cs(unsigned short pin)
|
2007-10-10 20:22:35 +04:00
|
|
|
{
|
2009-02-04 11:49:45 +03:00
|
|
|
unsigned short gpio = P_IDENT(pin);
|
2007-08-27 12:46:17 +04:00
|
|
|
port_setup(gpio, GPIO_USAGE);
|
2009-02-04 11:49:45 +03:00
|
|
|
gpio_array[gpio_bank(gpio)]->data_set = gpio_bit(gpio);
|
2008-01-22 12:20:10 +03:00
|
|
|
AWA_DUMMY_READ(data_set);
|
2007-10-10 20:22:35 +04:00
|
|
|
udelay(1);
|
|
|
|
}
|
2007-08-28 12:47:46 +04:00
|
|
|
|
2007-12-24 11:54:48 +03:00
|
|
|
#if defined(CONFIG_PROC_FS)
|
|
|
|
static int gpio_proc_read(char *buf, char **start, off_t offset,
|
|
|
|
int len, int *unused_i, void *unused_v)
|
|
|
|
{
|
2009-01-07 18:14:38 +03:00
|
|
|
int c, irq, gpio, outlen = 0;
|
2007-12-24 11:54:48 +03:00
|
|
|
|
|
|
|
for (c = 0; c < MAX_RESOURCES; c++) {
|
2010-06-02 08:22:01 +04:00
|
|
|
irq = is_reserved(gpio_irq, c, 1);
|
|
|
|
gpio = is_reserved(gpio, c, 1);
|
2009-01-07 18:14:38 +03:00
|
|
|
if (!check_gpio(c) && (gpio || irq))
|
|
|
|
len = sprintf(buf, "GPIO_%d: \t%s%s \t\tGPIO %s\n", c,
|
|
|
|
get_label(c), (gpio && irq) ? " *" : "",
|
|
|
|
get_gpio_dir(c) ? "OUTPUT" : "INPUT");
|
2010-06-02 08:22:01 +04:00
|
|
|
else if (is_reserved(peri, c, 1))
|
2008-11-18 12:48:22 +03:00
|
|
|
len = sprintf(buf, "GPIO_%d: \t%s \t\tPeripheral\n", c, get_label(c));
|
2007-12-24 11:54:48 +03:00
|
|
|
else
|
|
|
|
continue;
|
|
|
|
buf += len;
|
|
|
|
outlen += len;
|
|
|
|
}
|
|
|
|
return outlen;
|
|
|
|
}
|
|
|
|
|
|
|
|
static __init int gpio_register_proc(void)
|
|
|
|
{
|
|
|
|
struct proc_dir_entry *proc_gpio;
|
|
|
|
|
|
|
|
proc_gpio = create_proc_entry("gpio", S_IRUGO, NULL);
|
|
|
|
if (proc_gpio)
|
|
|
|
proc_gpio->read_proc = gpio_proc_read;
|
|
|
|
return proc_gpio != NULL;
|
|
|
|
}
|
|
|
|
__initcall(gpio_register_proc);
|
|
|
|
#endif
|
2008-11-18 12:48:22 +03:00
|
|
|
|
|
|
|
#ifdef CONFIG_GPIOLIB
|
2010-02-11 14:41:11 +03:00
|
|
|
static int bfin_gpiolib_direction_input(struct gpio_chip *chip, unsigned gpio)
|
2008-11-18 12:48:22 +03:00
|
|
|
{
|
|
|
|
return bfin_gpio_direction_input(gpio);
|
|
|
|
}
|
|
|
|
|
2010-02-11 14:41:11 +03:00
|
|
|
static int bfin_gpiolib_direction_output(struct gpio_chip *chip, unsigned gpio, int level)
|
2008-11-18 12:48:22 +03:00
|
|
|
{
|
|
|
|
return bfin_gpio_direction_output(gpio, level);
|
|
|
|
}
|
|
|
|
|
2010-02-11 14:41:11 +03:00
|
|
|
static int bfin_gpiolib_get_value(struct gpio_chip *chip, unsigned gpio)
|
2008-11-18 12:48:22 +03:00
|
|
|
{
|
|
|
|
return bfin_gpio_get_value(gpio);
|
|
|
|
}
|
|
|
|
|
2010-02-11 14:41:11 +03:00
|
|
|
static void bfin_gpiolib_set_value(struct gpio_chip *chip, unsigned gpio, int value)
|
2008-11-18 12:48:22 +03:00
|
|
|
{
|
|
|
|
return bfin_gpio_set_value(gpio, value);
|
|
|
|
}
|
|
|
|
|
2010-02-11 14:41:11 +03:00
|
|
|
static int bfin_gpiolib_gpio_request(struct gpio_chip *chip, unsigned gpio)
|
2008-11-18 12:48:22 +03:00
|
|
|
{
|
|
|
|
return bfin_gpio_request(gpio, chip->label);
|
|
|
|
}
|
|
|
|
|
2010-02-11 14:41:11 +03:00
|
|
|
static void bfin_gpiolib_gpio_free(struct gpio_chip *chip, unsigned gpio)
|
2008-11-18 12:48:22 +03:00
|
|
|
{
|
|
|
|
return bfin_gpio_free(gpio);
|
|
|
|
}
|
|
|
|
|
2010-02-11 14:41:11 +03:00
|
|
|
static int bfin_gpiolib_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
|
2010-02-10 14:31:41 +03:00
|
|
|
{
|
|
|
|
return gpio + GPIO_IRQ_BASE;
|
|
|
|
}
|
|
|
|
|
2008-11-18 12:48:22 +03:00
|
|
|
static struct gpio_chip bfin_chip = {
|
2009-12-16 11:45:17 +03:00
|
|
|
.label = "BFIN-GPIO",
|
2008-11-18 12:48:22 +03:00
|
|
|
.direction_input = bfin_gpiolib_direction_input,
|
|
|
|
.get = bfin_gpiolib_get_value,
|
|
|
|
.direction_output = bfin_gpiolib_direction_output,
|
|
|
|
.set = bfin_gpiolib_set_value,
|
|
|
|
.request = bfin_gpiolib_gpio_request,
|
|
|
|
.free = bfin_gpiolib_gpio_free,
|
2010-02-10 14:31:41 +03:00
|
|
|
.to_irq = bfin_gpiolib_gpio_to_irq,
|
2008-11-18 12:48:22 +03:00
|
|
|
.base = 0,
|
|
|
|
.ngpio = MAX_BLACKFIN_GPIOS,
|
|
|
|
};
|
|
|
|
|
|
|
|
static int __init bfin_gpiolib_setup(void)
|
|
|
|
{
|
|
|
|
return gpiochip_add(&bfin_chip);
|
|
|
|
}
|
|
|
|
arch_initcall(bfin_gpiolib_setup);
|
|
|
|
#endif
|