2020-10-05 20:36:45 +03:00
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/* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
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/*
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* Copyright 2013-2016 Freescale Semiconductor Inc.
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* Copyright 2016,2019-2020 NXP
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*/
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#ifndef VFIO_FSL_MC_PRIVATE_H
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#define VFIO_FSL_MC_PRIVATE_H
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2020-10-05 20:36:48 +03:00
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#define VFIO_FSL_MC_OFFSET_SHIFT 40
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#define VFIO_FSL_MC_OFFSET_MASK (((u64)(1) << VFIO_FSL_MC_OFFSET_SHIFT) - 1)
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#define VFIO_FSL_MC_OFFSET_TO_INDEX(off) ((off) >> VFIO_FSL_MC_OFFSET_SHIFT)
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#define VFIO_FSL_MC_INDEX_TO_OFFSET(index) \
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((u64)(index) << VFIO_FSL_MC_OFFSET_SHIFT)
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2020-10-05 20:36:52 +03:00
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struct vfio_fsl_mc_irq {
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u32 flags;
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u32 count;
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struct eventfd_ctx *trigger;
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char *name;
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};
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2020-10-05 20:36:48 +03:00
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struct vfio_fsl_mc_region {
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u32 flags;
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u32 type;
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u64 addr;
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resource_size_t size;
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2020-10-05 20:36:53 +03:00
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void __iomem *ioaddr;
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2020-10-05 20:36:48 +03:00
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};
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2020-10-05 20:36:45 +03:00
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struct vfio_fsl_mc_device {
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2021-03-30 18:53:06 +03:00
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struct vfio_device vdev;
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2020-10-05 20:36:45 +03:00
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struct fsl_mc_device *mc_dev;
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2020-10-05 20:36:46 +03:00
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struct notifier_block nb;
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2020-10-05 20:36:48 +03:00
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struct vfio_fsl_mc_region *regions;
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2020-10-05 20:36:51 +03:00
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struct mutex igate;
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2020-10-05 20:36:52 +03:00
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struct vfio_fsl_mc_irq *mc_irqs;
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2020-10-05 20:36:45 +03:00
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};
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2022-06-08 21:55:13 +03:00
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int vfio_fsl_mc_set_irqs_ioctl(struct vfio_fsl_mc_device *vdev,
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2020-10-05 20:36:51 +03:00
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u32 flags, unsigned int index,
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unsigned int start, unsigned int count,
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void *data);
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2020-10-05 20:36:52 +03:00
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void vfio_fsl_mc_irqs_cleanup(struct vfio_fsl_mc_device *vdev);
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2020-10-05 20:36:45 +03:00
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#endif /* VFIO_FSL_MC_PRIVATE_H */
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