2012-07-26 18:01:32 +04:00
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/*
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* Device Tree Source for OMAP243x SoC
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*
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* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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/include/ "omap2.dtsi"
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/ {
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compatible = "ti,omap2430", "ti,omap2";
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ocp {
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2012-10-25 23:24:14 +04:00
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counter32k: counter@49020000 {
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compatible = "ti,omap-counter32k";
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reg = <0x49020000 0x20>;
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ti,hwmods = "counter_32k";
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};
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2012-09-10 21:34:51 +04:00
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omap2430_pmx: pinmux@49002030 {
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compatible = "ti,omap2430-padconf", "pinctrl-single";
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reg = <0x49002030 0x0154>;
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-single,register-width = <8>;
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pinctrl-single,function-mask = <0x3f>;
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};
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2013-03-01 01:32:00 +04:00
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gpio1: gpio@4900c000 {
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compatible = "ti,omap2-gpio";
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reg = <0x4900c000 0x200>;
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interrupts = <29>;
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ti,hwmods = "gpio1";
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2013-04-05 00:16:16 +04:00
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ti,gpio-always-on;
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2013-03-01 01:32:00 +04:00
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#gpio-cells = <2>;
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gpio-controller;
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#interrupt-cells = <2>;
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interrupt-controller;
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};
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gpio2: gpio@4900e000 {
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compatible = "ti,omap2-gpio";
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reg = <0x4900e000 0x200>;
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interrupts = <30>;
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ti,hwmods = "gpio2";
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2013-04-05 00:16:16 +04:00
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ti,gpio-always-on;
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2013-03-01 01:32:00 +04:00
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#gpio-cells = <2>;
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gpio-controller;
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#interrupt-cells = <2>;
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interrupt-controller;
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};
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gpio3: gpio@49010000 {
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compatible = "ti,omap2-gpio";
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reg = <0x49010000 0x200>;
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interrupts = <31>;
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ti,hwmods = "gpio3";
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2013-04-05 00:16:16 +04:00
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ti,gpio-always-on;
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2013-03-01 01:32:00 +04:00
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#gpio-cells = <2>;
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gpio-controller;
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#interrupt-cells = <2>;
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interrupt-controller;
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};
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gpio4: gpio@49012000 {
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compatible = "ti,omap2-gpio";
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reg = <0x49012000 0x200>;
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interrupts = <32>;
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ti,hwmods = "gpio4";
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2013-04-05 00:16:16 +04:00
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ti,gpio-always-on;
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2013-03-01 01:32:00 +04:00
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#gpio-cells = <2>;
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gpio-controller;
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#interrupt-cells = <2>;
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interrupt-controller;
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};
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gpio5: gpio@480b6000 {
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compatible = "ti,omap2-gpio";
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reg = <0x480b6000 0x200>;
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interrupts = <33>;
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ti,hwmods = "gpio5";
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#gpio-cells = <2>;
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gpio-controller;
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#interrupt-cells = <2>;
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interrupt-controller;
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};
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2013-02-23 01:33:31 +04:00
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gpmc: gpmc@6e000000 {
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compatible = "ti,omap2430-gpmc";
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reg = <0x6e000000 0x1000>;
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#address-cells = <2>;
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#size-cells = <1>;
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interrupts = <20>;
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gpmc,num-cs = <8>;
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gpmc,num-waitpins = <4>;
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ti,hwmods = "gpmc";
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};
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2012-07-26 18:01:32 +04:00
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mcbsp1: mcbsp@48074000 {
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compatible = "ti,omap2430-mcbsp";
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reg = <0x48074000 0xff>;
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reg-names = "mpu";
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interrupts = <64>, /* OCP compliant interrupt */
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<59>, /* TX interrupt */
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<60>, /* RX interrupt */
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<61>; /* RX overflow interrupt */
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interrupt-names = "common", "tx", "rx", "rx_overflow";
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ti,buffer-size = <128>;
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ti,hwmods = "mcbsp1";
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2013-03-11 11:50:21 +04:00
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dmas = <&sdma 31>,
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<&sdma 32>;
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dma-names = "tx", "rx";
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2012-07-26 18:01:32 +04:00
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};
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mcbsp2: mcbsp@48076000 {
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compatible = "ti,omap2430-mcbsp";
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reg = <0x48076000 0xff>;
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reg-names = "mpu";
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interrupts = <16>, /* OCP compliant interrupt */
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<62>, /* TX interrupt */
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<63>; /* RX interrupt */
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interrupt-names = "common", "tx", "rx";
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ti,buffer-size = <128>;
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ti,hwmods = "mcbsp2";
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2013-03-11 11:50:21 +04:00
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dmas = <&sdma 33>,
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<&sdma 34>;
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dma-names = "tx", "rx";
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2012-07-26 18:01:32 +04:00
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};
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mcbsp3: mcbsp@4808c000 {
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compatible = "ti,omap2430-mcbsp";
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reg = <0x4808c000 0xff>;
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reg-names = "mpu";
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interrupts = <17>, /* OCP compliant interrupt */
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<89>, /* TX interrupt */
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<90>; /* RX interrupt */
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interrupt-names = "common", "tx", "rx";
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ti,buffer-size = <128>;
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ti,hwmods = "mcbsp3";
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2013-03-11 11:50:21 +04:00
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dmas = <&sdma 17>,
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<&sdma 18>;
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dma-names = "tx", "rx";
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2012-07-26 18:01:32 +04:00
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};
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mcbsp4: mcbsp@4808e000 {
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compatible = "ti,omap2430-mcbsp";
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reg = <0x4808e000 0xff>;
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reg-names = "mpu";
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interrupts = <18>, /* OCP compliant interrupt */
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<54>, /* TX interrupt */
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<55>; /* RX interrupt */
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interrupt-names = "common", "tx", "rx";
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ti,buffer-size = <128>;
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ti,hwmods = "mcbsp4";
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2013-03-11 11:50:21 +04:00
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dmas = <&sdma 19>,
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<&sdma 20>;
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dma-names = "tx", "rx";
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2012-07-26 18:01:32 +04:00
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};
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mcbsp5: mcbsp@48096000 {
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compatible = "ti,omap2430-mcbsp";
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reg = <0x48096000 0xff>;
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reg-names = "mpu";
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interrupts = <19>, /* OCP compliant interrupt */
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<81>, /* TX interrupt */
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<82>; /* RX interrupt */
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interrupt-names = "common", "tx", "rx";
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ti,buffer-size = <128>;
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ti,hwmods = "mcbsp5";
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2013-03-11 11:50:21 +04:00
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dmas = <&sdma 21>,
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<&sdma 22>;
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dma-names = "tx", "rx";
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2012-07-26 18:01:32 +04:00
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};
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2012-10-19 18:59:00 +04:00
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timer1: timer@49018000 {
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2013-03-19 21:38:18 +04:00
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compatible = "ti,omap2420-timer";
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2012-10-19 18:59:00 +04:00
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reg = <0x49018000 0x400>;
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interrupts = <37>;
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ti,hwmods = "timer1";
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ti,timer-alwon;
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};
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2012-07-26 18:01:32 +04:00
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};
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};
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