staging: comedi: adv_pci_dio: cleanup PCI-175[46] interrupt registers
For aesthetics, replace these defines with a macro. Refactor the switch in pci_dio_reset() to use common code. Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com> Reviewed-by: Ian Abbott <abbotti@mev.co.uk> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -64,11 +64,9 @@ enum hw_cards_id {
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#define PCI1753_INT_REG(x) (0x10 + (x)) /* R/W: control group 0 to 3 */
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#define PCI1753E_INT_REG(x) (0x30 + (x)) /* R/W: control group 0 to 3 */
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/* Advantech PCI-1752/4/6 */
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#define PCI1754_6_ICR0 0x08 /* R/W: Interrupt control register group 0 */
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#define PCI1754_6_ICR1 0x0a /* R/W: Interrupt control register group 1 */
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#define PCI1754_ICR2 0x0c /* R/W: Interrupt control register group 2 */
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#define PCI1754_ICR3 0x0e /* R/W: Interrupt control register group 3 */
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/* PCI-1754, PCI-1756 interrupt control registers */
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#define PCI1754_INT_REG(x) (0x08 + (x) * 2) /* R/W: control group 0 to 3 */
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#define PCI1752_6_CFC 0x12 /* R/W: set/read channel freeze function */
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/* Advantech PCI-1762 registers */
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@ -318,14 +316,13 @@ static int pci_dio_reset(struct comedi_device *dev)
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}
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break;
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case TYPE_PCI1754:
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outw(0x08, dev->iobase + PCI1754_6_ICR0);
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outw(0x08, dev->iobase + PCI1754_6_ICR1);
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outw(0x08, dev->iobase + PCI1754_ICR2);
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outw(0x08, dev->iobase + PCI1754_ICR3);
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break;
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case TYPE_PCI1756:
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outw(0x08, dev->iobase + PCI1754_6_ICR0);
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outw(0x08, dev->iobase + PCI1754_6_ICR1);
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outw(0x08, dev->iobase + PCI1754_INT_REG(0));
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outw(0x08, dev->iobase + PCI1754_INT_REG(1));
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if (board->cardtype == TYPE_PCI1754) {
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outw(0x08, dev->iobase + PCI1754_INT_REG(2));
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outw(0x08, dev->iobase + PCI1754_INT_REG(3));
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}
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break;
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case TYPE_PCI1762:
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outw(0x0101, dev->iobase + PCI1762_ICR);
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