sata_mv: rearrange mv_start_dma() and friends
Rearrange mv_start_dma() and friends, in preparation for adding non-EDMA DMA modes, and non-EDMA interrupts, to the driver. Signed-off-by: Mark Lord <mlord@pobox.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
This commit is contained in:
Mark Lord
Jeff Garzik
Родитель
91b1a84c10
Коммит
00b81235aa
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@ -536,7 +536,7 @@ static void mv_reset_channel(struct mv_host_priv *hpriv, void __iomem *mmio,
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unsigned int port_no);
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static int mv_stop_edma(struct ata_port *ap);
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static int mv_stop_edma_engine(void __iomem *port_mmio);
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static void mv_edma_cfg(struct ata_port *ap, int want_ncq);
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static void mv_edma_cfg(struct ata_port *ap, int want_ncq, int want_edma);
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static void mv_pmp_select(struct ata_port *ap, int pmp);
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static int mv_pmp_hardreset(struct ata_link *link, unsigned int *class,
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@ -849,8 +849,32 @@ static void mv_enable_port_irqs(struct ata_port *ap,
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mv_set_main_irq_mask(ap->host, disable_bits, enable_bits);
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}
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static void mv_clear_and_enable_port_irqs(struct ata_port *ap,
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void __iomem *port_mmio,
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unsigned int port_irqs)
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{
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struct mv_host_priv *hpriv = ap->host->private_data;
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int hardport = mv_hardport_from_port(ap->port_no);
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void __iomem *hc_mmio = mv_hc_base_from_port(
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mv_host_base(ap->host), ap->port_no);
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u32 hc_irq_cause;
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/* clear EDMA event indicators, if any */
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writelfl(0, port_mmio + EDMA_ERR_IRQ_CAUSE_OFS);
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/* clear pending irq events */
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hc_irq_cause = ~((DEV_IRQ | DMA_IRQ) << hardport);
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writelfl(hc_irq_cause, hc_mmio + HC_IRQ_CAUSE_OFS);
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/* clear FIS IRQ Cause */
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if (IS_GEN_IIE(hpriv))
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writelfl(0, port_mmio + SATA_FIS_IRQ_CAUSE_OFS);
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mv_enable_port_irqs(ap, port_irqs);
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}
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/**
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* mv_start_dma - Enable eDMA engine
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* mv_start_edma - Enable eDMA engine
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* @base: port base address
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* @pp: port private data
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*
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@ -860,7 +884,7 @@ static void mv_enable_port_irqs(struct ata_port *ap,
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* LOCKING:
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* Inherited from caller.
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*/
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static void mv_start_dma(struct ata_port *ap, void __iomem *port_mmio,
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static void mv_start_edma(struct ata_port *ap, void __iomem *port_mmio,
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struct mv_port_priv *pp, u8 protocol)
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{
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int want_ncq = (protocol == ATA_PROT_NCQ);
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@ -872,26 +896,11 @@ static void mv_start_dma(struct ata_port *ap, void __iomem *port_mmio,
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}
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if (!(pp->pp_flags & MV_PP_FLAG_EDMA_EN)) {
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struct mv_host_priv *hpriv = ap->host->private_data;
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int hardport = mv_hardport_from_port(ap->port_no);
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void __iomem *hc_mmio = mv_hc_base_from_port(
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mv_host_base(ap->host), ap->port_no);
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u32 hc_irq_cause;
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/* clear EDMA event indicators, if any */
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writelfl(0, port_mmio + EDMA_ERR_IRQ_CAUSE_OFS);
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/* clear pending irq events */
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hc_irq_cause = ~((DEV_IRQ | DMA_IRQ) << hardport);
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writelfl(hc_irq_cause, hc_mmio + HC_IRQ_CAUSE_OFS);
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mv_edma_cfg(ap, want_ncq);
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/* clear FIS IRQ Cause */
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if (IS_GEN_IIE(hpriv))
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writelfl(0, port_mmio + SATA_FIS_IRQ_CAUSE_OFS);
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mv_edma_cfg(ap, want_ncq, 1);
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mv_set_edma_ptrs(port_mmio, hpriv, pp);
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mv_enable_port_irqs(ap, DONE_IRQ|ERR_IRQ);
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mv_clear_and_enable_port_irqs(ap, port_mmio, DONE_IRQ|ERR_IRQ);
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writelfl(EDMA_EN, port_mmio + EDMA_CMD_OFS);
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pp->pp_flags |= MV_PP_FLAG_EDMA_EN;
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@ -1173,7 +1182,7 @@ static void mv_60x1_errata_sata25(struct ata_port *ap, int want_ncq)
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writel(new, hpriv->base + MV_GPIO_PORT_CTL_OFS);
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}
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static void mv_edma_cfg(struct ata_port *ap, int want_ncq)
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static void mv_edma_cfg(struct ata_port *ap, int want_ncq, int want_edma)
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{
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u32 cfg;
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struct mv_port_priv *pp = ap->private_data;
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@ -1182,7 +1191,7 @@ static void mv_edma_cfg(struct ata_port *ap, int want_ncq)
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/* set up non-NCQ EDMA configuration */
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cfg = EDMA_CFG_Q_DEPTH; /* always 0x1f for *all* chips */
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pp->pp_flags &= ~MV_PP_FLAG_FBS_EN;
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pp->pp_flags &= ~(MV_PP_FLAG_FBS_EN | MV_PP_FLAG_NCQ_EN);
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if (IS_GEN_I(hpriv))
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cfg |= (1 << 8); /* enab config burst size mask */
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@ -1211,9 +1220,11 @@ static void mv_edma_cfg(struct ata_port *ap, int want_ncq)
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}
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cfg |= (1 << 23); /* do not mask PM field in rx'd FIS */
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cfg |= (1 << 22); /* enab 4-entry host queue cache */
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if (!IS_SOC(hpriv))
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cfg |= (1 << 18); /* enab early completion */
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if (want_edma) {
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cfg |= (1 << 22); /* enab 4-entry host queue cache */
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if (!IS_SOC(hpriv))
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cfg |= (1 << 18); /* enab early completion */
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}
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if (hpriv->hp_flags & MV_HP_CUT_THROUGH)
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cfg |= (1 << 17); /* enab cut-thru (dis stor&forwrd) */
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}
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@ -1221,8 +1232,7 @@ static void mv_edma_cfg(struct ata_port *ap, int want_ncq)
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if (want_ncq) {
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cfg |= EDMA_CFG_NCQ;
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pp->pp_flags |= MV_PP_FLAG_NCQ_EN;
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} else
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pp->pp_flags &= ~MV_PP_FLAG_NCQ_EN;
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}
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writelfl(cfg, port_mmio + EDMA_CFG_OFS);
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}
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@ -1591,7 +1601,7 @@ static unsigned int mv_qc_issue(struct ata_queued_cmd *qc)
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return ata_sff_qc_issue(qc);
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}
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mv_start_dma(ap, port_mmio, pp, qc->tf.protocol);
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mv_start_edma(ap, port_mmio, pp, qc->tf.protocol);
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pp->req_idx = (pp->req_idx + 1) & MV_MAX_Q_DEPTH_MASK;
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in_index = pp->req_idx << EDMA_REQ_Q_PTR_SHIFT;
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