[media] ths8200: Corrected sync polarities setting
HS_IN/VS_IN was always set to positive. Acked-by: Lad, Prabhakar <prabhakar.csengg@gmail.com> Signed-off-by: Martin Bugge <marbugge@cisco.com> Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
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@ -356,7 +356,7 @@ static void ths8200_setup(struct v4l2_subdev *sd, struct v4l2_bt_timings *bt)
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/* Timing of video input bus is derived from HS, VS, and FID dedicated
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* inputs
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*/
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ths8200_write(sd, THS8200_DTG2_CNTL, 0x47 | polarity);
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ths8200_write(sd, THS8200_DTG2_CNTL, 0x44 | polarity);
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/* leave reset */
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ths8200_s_stream(sd, true);
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