crypto: x86/nhpoly1305 - add SSE2 accelerated NHPoly1305
Add a 64-bit SSE2 implementation of NHPoly1305, an ε-almost-∆-universal hash function used in the Adiantum encryption mode. For now, only the NH portion is actually SSE2-accelerated; the Poly1305 part is less performance-critical so is just implemented in C. Signed-off-by: Eric Biggers <ebiggers@google.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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@ -47,6 +47,8 @@ obj-$(CONFIG_CRYPTO_MORUS1280_GLUE) += morus1280_glue.o
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obj-$(CONFIG_CRYPTO_MORUS640_SSE2) += morus640-sse2.o
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obj-$(CONFIG_CRYPTO_MORUS1280_SSE2) += morus1280-sse2.o
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obj-$(CONFIG_CRYPTO_NHPOLY1305_SSE2) += nhpoly1305-sse2.o
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# These modules require assembler to support AVX.
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ifeq ($(avx_supported),yes)
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obj-$(CONFIG_CRYPTO_CAMELLIA_AESNI_AVX_X86_64) += \
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@ -85,6 +87,8 @@ aegis256-aesni-y := aegis256-aesni-asm.o aegis256-aesni-glue.o
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morus640-sse2-y := morus640-sse2-asm.o morus640-sse2-glue.o
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morus1280-sse2-y := morus1280-sse2-asm.o morus1280-sse2-glue.o
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nhpoly1305-sse2-y := nh-sse2-x86_64.o nhpoly1305-sse2-glue.o
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ifeq ($(avx_supported),yes)
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camellia-aesni-avx-x86_64-y := camellia-aesni-avx-asm_64.o \
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camellia_aesni_avx_glue.o
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@ -0,0 +1,123 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* NH - ε-almost-universal hash function, x86_64 SSE2 accelerated
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*
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* Copyright 2018 Google LLC
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*
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* Author: Eric Biggers <ebiggers@google.com>
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*/
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#include <linux/linkage.h>
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#define PASS0_SUMS %xmm0
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#define PASS1_SUMS %xmm1
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#define PASS2_SUMS %xmm2
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#define PASS3_SUMS %xmm3
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#define K0 %xmm4
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#define K1 %xmm5
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#define K2 %xmm6
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#define K3 %xmm7
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#define T0 %xmm8
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#define T1 %xmm9
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#define T2 %xmm10
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#define T3 %xmm11
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#define T4 %xmm12
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#define T5 %xmm13
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#define T6 %xmm14
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#define T7 %xmm15
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#define KEY %rdi
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#define MESSAGE %rsi
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#define MESSAGE_LEN %rdx
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#define HASH %rcx
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.macro _nh_stride k0, k1, k2, k3, offset
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// Load next message stride
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movdqu \offset(MESSAGE), T1
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// Load next key stride
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movdqu \offset(KEY), \k3
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// Add message words to key words
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movdqa T1, T2
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movdqa T1, T3
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paddd T1, \k0 // reuse k0 to avoid a move
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paddd \k1, T1
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paddd \k2, T2
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paddd \k3, T3
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// Multiply 32x32 => 64 and accumulate
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pshufd $0x10, \k0, T4
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pshufd $0x32, \k0, \k0
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pshufd $0x10, T1, T5
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pshufd $0x32, T1, T1
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pshufd $0x10, T2, T6
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pshufd $0x32, T2, T2
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pshufd $0x10, T3, T7
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pshufd $0x32, T3, T3
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pmuludq T4, \k0
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pmuludq T5, T1
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pmuludq T6, T2
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pmuludq T7, T3
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paddq \k0, PASS0_SUMS
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paddq T1, PASS1_SUMS
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paddq T2, PASS2_SUMS
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paddq T3, PASS3_SUMS
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.endm
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/*
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* void nh_sse2(const u32 *key, const u8 *message, size_t message_len,
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* u8 hash[NH_HASH_BYTES])
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*
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* It's guaranteed that message_len % 16 == 0.
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*/
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ENTRY(nh_sse2)
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movdqu 0x00(KEY), K0
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movdqu 0x10(KEY), K1
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movdqu 0x20(KEY), K2
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add $0x30, KEY
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pxor PASS0_SUMS, PASS0_SUMS
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pxor PASS1_SUMS, PASS1_SUMS
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pxor PASS2_SUMS, PASS2_SUMS
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pxor PASS3_SUMS, PASS3_SUMS
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sub $0x40, MESSAGE_LEN
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jl .Lloop4_done
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.Lloop4:
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_nh_stride K0, K1, K2, K3, 0x00
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_nh_stride K1, K2, K3, K0, 0x10
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_nh_stride K2, K3, K0, K1, 0x20
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_nh_stride K3, K0, K1, K2, 0x30
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add $0x40, KEY
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add $0x40, MESSAGE
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sub $0x40, MESSAGE_LEN
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jge .Lloop4
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.Lloop4_done:
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and $0x3f, MESSAGE_LEN
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jz .Ldone
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_nh_stride K0, K1, K2, K3, 0x00
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sub $0x10, MESSAGE_LEN
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jz .Ldone
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_nh_stride K1, K2, K3, K0, 0x10
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sub $0x10, MESSAGE_LEN
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jz .Ldone
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_nh_stride K2, K3, K0, K1, 0x20
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.Ldone:
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// Sum the accumulators for each pass, then store the sums to 'hash'
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movdqa PASS0_SUMS, T0
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movdqa PASS2_SUMS, T1
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punpcklqdq PASS1_SUMS, T0 // => (PASS0_SUM_A PASS1_SUM_A)
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punpcklqdq PASS3_SUMS, T1 // => (PASS2_SUM_A PASS3_SUM_A)
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punpckhqdq PASS1_SUMS, PASS0_SUMS // => (PASS0_SUM_B PASS1_SUM_B)
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punpckhqdq PASS3_SUMS, PASS2_SUMS // => (PASS2_SUM_B PASS3_SUM_B)
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paddq PASS0_SUMS, T0
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paddq PASS2_SUMS, T1
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movdqu T0, 0x00(HASH)
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movdqu T1, 0x10(HASH)
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ret
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ENDPROC(nh_sse2)
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@ -0,0 +1,76 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* NHPoly1305 - ε-almost-∆-universal hash function for Adiantum
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* (SSE2 accelerated version)
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*
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* Copyright 2018 Google LLC
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*/
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#include <crypto/internal/hash.h>
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#include <crypto/nhpoly1305.h>
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#include <linux/module.h>
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#include <asm/fpu/api.h>
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asmlinkage void nh_sse2(const u32 *key, const u8 *message, size_t message_len,
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u8 hash[NH_HASH_BYTES]);
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/* wrapper to avoid indirect call to assembly, which doesn't work with CFI */
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static void _nh_sse2(const u32 *key, const u8 *message, size_t message_len,
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__le64 hash[NH_NUM_PASSES])
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{
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nh_sse2(key, message, message_len, (u8 *)hash);
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}
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static int nhpoly1305_sse2_update(struct shash_desc *desc,
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const u8 *src, unsigned int srclen)
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{
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if (srclen < 64 || !irq_fpu_usable())
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return crypto_nhpoly1305_update(desc, src, srclen);
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do {
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unsigned int n = min_t(unsigned int, srclen, PAGE_SIZE);
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kernel_fpu_begin();
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crypto_nhpoly1305_update_helper(desc, src, n, _nh_sse2);
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kernel_fpu_end();
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src += n;
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srclen -= n;
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} while (srclen);
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return 0;
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}
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static struct shash_alg nhpoly1305_alg = {
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.base.cra_name = "nhpoly1305",
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.base.cra_driver_name = "nhpoly1305-sse2",
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.base.cra_priority = 200,
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.base.cra_ctxsize = sizeof(struct nhpoly1305_key),
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.base.cra_module = THIS_MODULE,
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.digestsize = POLY1305_DIGEST_SIZE,
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.init = crypto_nhpoly1305_init,
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.update = nhpoly1305_sse2_update,
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.final = crypto_nhpoly1305_final,
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.setkey = crypto_nhpoly1305_setkey,
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.descsize = sizeof(struct nhpoly1305_state),
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};
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static int __init nhpoly1305_mod_init(void)
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{
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if (!boot_cpu_has(X86_FEATURE_XMM2))
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return -ENODEV;
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return crypto_register_shash(&nhpoly1305_alg);
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}
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static void __exit nhpoly1305_mod_exit(void)
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{
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crypto_unregister_shash(&nhpoly1305_alg);
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}
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module_init(nhpoly1305_mod_init);
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module_exit(nhpoly1305_mod_exit);
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MODULE_DESCRIPTION("NHPoly1305 ε-almost-∆-universal hash function (SSE2-accelerated)");
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MODULE_LICENSE("GPL v2");
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MODULE_AUTHOR("Eric Biggers <ebiggers@google.com>");
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MODULE_ALIAS_CRYPTO("nhpoly1305");
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MODULE_ALIAS_CRYPTO("nhpoly1305-sse2");
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@ -501,6 +501,14 @@ config CRYPTO_NHPOLY1305
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select CRYPTO_HASH
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select CRYPTO_POLY1305
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config CRYPTO_NHPOLY1305_SSE2
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tristate "NHPoly1305 hash function (x86_64 SSE2 implementation)"
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depends on X86 && 64BIT
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select CRYPTO_NHPOLY1305
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help
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SSE2 optimized implementation of the hash function used by the
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Adiantum encryption mode.
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config CRYPTO_ADIANTUM
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tristate "Adiantum support"
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select CRYPTO_CHACHA20
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