ARM64: DT: Hisilicon SoCs DT updates for 5.9
- Refactor hi6220-hikey dts to use phandles for overriding nodes - Align UART node name to fix dtschema validator warnings for hi6220 - Add basic usb gadget support on hikey960 - Update adv7533 nodes to meet with the binding for hikey and hikey960 -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJfFk9pAAoJEAvIV27ZiWZcclYP/2OyRU1WLQr624IzkTunqshF tgySbXVFC8v7sfUGHV5o4AbTVx27rWkQZXDac3yCiHuUDYzoK3kJtYAQf/3pm8yW 7M5t4GiwmFm0iK5IX3h3jpzz6RdyDT+wG1fbSq/9zvJ8hjfjm4wIO6GG4Cor8nxw jmE42W7FYkzWkHBzevt46wURbiJvCL17f3eySKCl9wzokhCbJ1jYkt/55kq4Fl9Z 2TuqJ0L4ptviOBzNGACPyymHoXVZHX4kvuPCk3quJlcc/ZUjvCn/8XCg+JliLUVb JZnkNIu/Hc2MbJclVBUnrofEIkd3nqoW6Vm+pmRCyY0oGuE17QHed8MJ49YHI/jB bum2PEQwPw+ScIfK7kwx5esh+hUc7eVgf9Rm5woPyZIg9recYPvxWGp9GjzBCWZP KTQQh2HgZhdGkAc58l+ODfSiQzZa8c042Q4jT+XtRUlrAWW2OxyI/lafvz9E4XEb JMz1lg3gZKjfZ9Z4IhdsCv4wIMWidnMK4cLFIGLjISSipx5ojDjUDLYpIQ0tA8TP qufZVhQCHCm8wHjxajgteCRuYs9Hbw8dMgG9J/bCvkpGy4aYLlx7W9tQ506scCJM pSZKSF3vktbZ5A3wpE70rD/mPcMFSI9d9JIueHO7dORfzBucuFHU3K3BTLkpEym7 1OVZ9BINHqiF2ZL3tvIN =GARv -----END PGP SIGNATURE----- Merge tag 'hisi-arm64-dt-for-5.9' of git://github.com/hisilicon/linux-hisi into arm/dt ARM64: DT: Hisilicon SoCs DT updates for 5.9 - Refactor hi6220-hikey dts to use phandles for overriding nodes - Align UART node name to fix dtschema validator warnings for hi6220 - Add basic usb gadget support on hikey960 - Update adv7533 nodes to meet with the binding for hikey and hikey960 * tag 'hisi-arm64-dt-for-5.9' of git://github.com/hisilicon/linux-hisi: arm64: dts: hisilicon: hikey: fixes to comply with adi, adv7533 DT binding dts: hi3660: Add support for basic usb gadget on Hikey960 arm64: dts: hisilicon: Align UART nodename with dtschema arm64: dts: hisilicon: Use phandles for overriding nodes in hi6220 Link: https://lore.kernel.org/r/5F165E8E.3030503@hisilicon.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
Коммит
01407153cf
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@ -13,6 +13,7 @@
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/usb/pd.h>
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/ {
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model = "HiKey960";
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@ -526,10 +527,63 @@
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&i2c1 {
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status = "okay";
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rt1711h: rt1711h@4e {
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compatible = "richtek,rt1711h";
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reg = <0x4e>;
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status = "ok";
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interrupt-parent = <&gpio27>;
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interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
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pinctrl-names = "default";
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pinctrl-0 = <&usb_cfg_func>;
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usb_con: connector {
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compatible = "usb-c-connector";
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label = "USB-C";
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data-role = "dual";
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power-role = "dual";
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try-power-role = "sink";
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source-pdos = <PDO_FIXED(5000, 500, PDO_FIXED_USB_COMM)>;
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sink-pdos = <PDO_FIXED(5000, 500, PDO_FIXED_USB_COMM)
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PDO_VAR(5000, 5000, 1000)>;
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op-sink-microwatt = <10000000>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@1 {
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reg = <1>;
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usb_con_ss: endpoint {
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remote-endpoint = <&dwc3_ss>;
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};
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};
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};
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};
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port {
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#address-cells = <1>;
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#size-cells = <0>;
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rt1711h_ep: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&dwc3_role_switch>;
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};
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};
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};
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adv7533: adv7533@39 {
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status = "ok";
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compatible = "adi,adv7533";
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reg = <0x39>;
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adi,dsi-lanes = <4>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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};
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port@1 {
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reg = <1>;
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};
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};
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};
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};
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@ -612,3 +666,32 @@
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interrupts = <3 IRQ_TYPE_EDGE_RISING>;
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};
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};
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&dwc3 { /* USB */
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dr_mode = "otg";
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maximum-speed = "super-speed";
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phy_type = "utmi";
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snps,dis-del-phy-power-chg-quirk;
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snps,lfps_filter_quirk;
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snps,dis_u2_susphy_quirk;
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snps,dis_u3_susphy_quirk;
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snps,tx_de_emphasis_quirk;
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snps,tx_de_emphasis = <1>;
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snps,dis_enblslpm_quirk;
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snps,gctl-reset-quirk;
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usb-role-switch;
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role-switch-default-mode = "host";
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port {
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#address-cells = <1>;
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#size-cells = <0>;
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dwc3_role_switch: endpoint@0 {
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reg = <0>;
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remote-endpoint = <&rt1711h_ep>;
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};
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dwc3_ss: endpoint@1 {
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reg = <1>;
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remote-endpoint = <&usb_con_ss>;
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};
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};
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};
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@ -1152,6 +1152,40 @@
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};
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};
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};
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usb3_otg_bc: usb3_otg_bc@ff200000 {
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compatible = "syscon", "simple-mfd";
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reg = <0x0 0xff200000 0x0 0x1000>;
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usb_phy: usb-phy {
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compatible = "hisilicon,hi3660-usb-phy";
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#phy-cells = <0>;
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hisilicon,pericrg-syscon = <&crg_ctrl>;
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hisilicon,pctrl-syscon = <&pctrl>;
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hisilicon,eye-diagram-param = <0x22466e4>;
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};
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};
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dwc3: dwc3@ff100000 {
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compatible = "snps,dwc3";
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reg = <0x0 0xff100000 0x0 0x100000>;
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clocks = <&crg_ctrl HI3660_CLK_ABB_USB>,
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<&crg_ctrl HI3660_ACLK_GATE_USB3OTG>;
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clock-names = "ref", "bus_early";
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assigned-clocks = <&crg_ctrl HI3660_ACLK_GATE_USB3OTG>;
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assigned-clock-rates = <229000000>;
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resets = <&crg_rst 0x90 8>,
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<&crg_rst 0x90 7>,
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<&crg_rst 0x90 6>,
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<&crg_rst 0x90 5>;
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interrupts = <0 159 4>, <0 161 4>;
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phys = <&usb_phy>;
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phy-names = "usb3-phy";
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};
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};
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};
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@ -122,222 +122,6 @@
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power-off-delay-us = <10>;
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};
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soc {
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spi0: spi@f7106000 {
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status = "ok";
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};
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i2c0: i2c@f7100000 {
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status = "ok";
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};
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i2c1: i2c@f7101000 {
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status = "ok";
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};
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uart1: uart@f7111000 {
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assigned-clocks = <&sys_ctrl HI6220_UART1_SRC>;
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assigned-clock-rates = <150000000>;
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status = "ok";
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bluetooth {
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compatible = "ti,wl1835-st";
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enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
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clocks = <&pmic>;
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clock-names = "ext_clock";
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};
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};
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uart2: uart@f7112000 {
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status = "ok";
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};
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uart3: uart@f7113000 {
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status = "ok";
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};
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/*
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* Legend: proper name = the GPIO line is used as GPIO
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* NC = not connected (not routed from the SoC)
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* "[PER]" = pin is muxed for peripheral (not GPIO)
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* "" = no idea, schematic doesn't say, could be
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* unrouted (not connected to any external pin)
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* LSEC = Low Speed External Connector
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* HSEC = High Speed External Connector
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*
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* Pin assignments taken from LeMaker and CircuitCo Schematics
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* Rev A1.
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*
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* For the lines routed to the external connectors the
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* lines are named after the 96Boards CE Specification 1.0,
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* Appendix "Expansion Connector Signal Description".
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*
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* When the 96Board naming of a line and the schematic name of
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* the same line are in conflict, the 96Board specification
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* takes precedence, which means that the external UART on the
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* LSEC is named UART0 while the schematic and SoC names this
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* UART2. This is only for the informational lines i.e. "[FOO]",
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* the GPIO named lines "GPIO-A" thru "GPIO-L" are the only
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* ones actually used for GPIO.
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*/
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gpio0: gpio@f8011000 {
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gpio-line-names = "PWR_HOLD", "DSI_SEL",
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"USB_HUB_RESET_N", "USB_SEL", "HDMI_PD", "WL_REG_ON",
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"PWRON_DET", "5V_HUB_EN";
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};
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gpio1: gpio@f8012000 {
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gpio-line-names = "SD_DET", "HDMI_INT", "PMU_IRQ_N",
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"WL_HOST_WAKE", "NC", "NC", "NC", "BT_REG_ON";
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};
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gpio2: gpio@f8013000 {
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gpio-line-names =
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"GPIO-A", /* LSEC Pin 23: GPIO2_0 */
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"GPIO-B", /* LSEC Pin 24: GPIO2_1 */
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"GPIO-C", /* LSEC Pin 25: GPIO2_2 */
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"GPIO-D", /* LSEC Pin 26: GPIO2_3 */
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"GPIO-E", /* LSEC Pin 27: GPIO2_4 */
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"USB_ID_DET", "USB_VBUS_DET",
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"GPIO-H"; /* LSEC Pin 30: GPIO2_7 */
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};
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gpio3: gpio@f8014000 {
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gpio-line-names = "GPIO3_0", "NC", "NC", "", "NC", "",
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"WLAN_ACTIVE", "NC", "NC";
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};
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gpio4: gpio@f7020000 {
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gpio-line-names = "USER_LED1", "USER_LED2", "USER_LED3",
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"USER_LED4", "SD_SEL", "NC", "NC", "BT_ACTIVE";
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};
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gpio5: gpio@f7021000 {
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gpio-line-names = "NC", "NC",
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"[UART1_RxD]", /* LSEC Pin 11: UART3_RX */
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"[UART1_TxD]", /* LSEC Pin 13: UART3_TX */
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"[AUX_SSI1]", "NC",
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"[PCM_CLK]", /* LSEC Pin 18: MODEM_PCM_XCLK */
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"[PCM_FS]"; /* LSEC Pin 16: MODEM_PCM_XFS */
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};
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gpio6: gpio@f7022000 {
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gpio-line-names =
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"[SPI0_DIN]", /* Pin 10: SPI0_DI */
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"[SPI0_DOUT]", /* Pin 14: SPI0_DO */
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"[SPI0_CS]", /* Pin 12: SPI0_CS_N */
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"[SPI0_SCLK]", /* Pin 8: SPI0_SCLK */
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"NC", "NC", "NC",
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"GPIO-G"; /* Pin 29: GPIO6_7_DSI_TE0 */
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};
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gpio7: gpio@f7023000 {
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gpio-line-names = "NC", "NC", "NC", "NC",
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"[PCM_DI]", /* Pin 22: MODEM_PCM_DI */
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"[PCM_DO]", /* Pin 20: MODEM_PCM_DO */
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"NC", "NC";
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};
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gpio8: gpio@f7024000 {
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gpio-line-names = "NC", "[CEC_CLK_19_2MHZ]", "NC",
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"", "", "", "", "", "";
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};
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gpio9: gpio@f7025000 {
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gpio-line-names = "",
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"GPIO-J", /* LSEC Pin 32: ISP_PWDN0_GPIO9_1 */
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"GPIO-L", /* LSEC Pin 34: ISP_PWDN1_GPIO9_2 */
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"NC", "NC", "NC", "NC", "[ISP_CCLK0]";
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};
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gpio10: gpio@f7026000 {
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gpio-line-names = "BOOT_SEL",
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"[ISP_CCLK1]",
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"GPIO-I", /* LSEC Pin 31: ISP_RSTB0_GPIO10_2 */
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"GPIO-K", /* LSEC Pin 33: ISP_RSTB1_GPIO10_3 */
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"NC", "NC",
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"[I2C2_SDA]", /* HSEC Pin 34: ISP0_SDA */
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"[I2C2_SCL]"; /* HSEC Pin 32: ISP0_SCL */
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};
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gpio11: gpio@f7027000 {
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gpio-line-names =
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"[I2C3_SDA]", /* HSEC Pin 38: ISP1_SDA */
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"[I2C3_SCL]", /* HSEC Pin 36: ISP1_SCL */
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"", "NC", "NC", "NC", "", "";
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};
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gpio12: gpio@f7028000 {
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gpio-line-names = "[BT_PCM_XFS]", "[BT_PCM_DI]",
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"[BT_PCM_DO]",
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"NC", "NC", "NC", "NC",
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"GPIO-F"; /* LSEC Pin 28: BL_PWM_GPIO12_7 */
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};
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gpio13: gpio@f7029000 {
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gpio-line-names = "[UART0_RX]", "[UART0_TX]",
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"[BT_UART1_CTS]", "[BT_UART1_RTS]",
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"[BT_UART1_RX]", "[BT_UART1_TX]",
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"[UART0_CTS]", /* LSEC Pin 3: UART2_CTS_N */
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"[UART0_RTS]"; /* LSEC Pin 9: UART2_RTS_N */
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};
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gpio14: gpio@f702a000 {
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gpio-line-names =
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"[UART0_RxD]", /* LSEC Pin 7: UART2_RX */
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"[UART0_TxD]", /* LSEC Pin 5: UART2_TX */
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"[I2C0_SCL]", /* LSEC Pin 15: I2C0_SCL */
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"[I2C0_SDA]", /* LSEC Pin 17: I2C0_SDA */
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"[I2C1_SCL]", /* LSEC Pin 19: I2C1_SCL */
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"[I2C1_SDA]", /* LSEC Pin 21: I2C1_SDA */
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"[I2C2_SCL]", "[I2C2_SDA]";
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};
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gpio15: gpio@f702b000 {
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gpio-line-names = "", "", "", "", "", "", "NC", "";
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};
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/* GPIO blocks 16 thru 19 do not appear to be routed to pins */
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dwmmc_0: dwmmc0@f723d000 {
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cap-mmc-highspeed;
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non-removable;
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bus-width = <0x8>;
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vmmc-supply = <&ldo19>;
|
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};
|
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|
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dwmmc_1: dwmmc1@f723e000 {
|
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card-detect-delay = <200>;
|
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cap-sd-highspeed;
|
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sd-uhs-sdr12;
|
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sd-uhs-sdr25;
|
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sd-uhs-sdr50;
|
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vqmmc-supply = <&ldo7>;
|
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vmmc-supply = <&ldo10>;
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bus-width = <0x4>;
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disable-wp;
|
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cd-gpios = <&gpio1 0 1>;
|
||||
};
|
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|
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dwmmc_2: dwmmc2@f723f000 {
|
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bus-width = <0x4>;
|
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non-removable;
|
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cap-power-off-card;
|
||||
vmmc-supply = <®_vdd_3v3>;
|
||||
mmc-pwrseq = <&wl1835_pwrseq>;
|
||||
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x0>;
|
||||
wlcore: wlcore@2 {
|
||||
compatible = "ti,wl1835";
|
||||
reg = <2>; /* sdio func num */
|
||||
/* WL_IRQ, WL_HOST_WAKE_GPIO1_3 */
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <3 IRQ_TYPE_EDGE_RISING>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
|
|
@ -480,10 +264,26 @@
|
|||
};
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
assigned-clocks = <&sys_ctrl HI6220_UART1_SRC>;
|
||||
assigned-clock-rates = <150000000>;
|
||||
status = "ok";
|
||||
|
||||
bluetooth {
|
||||
compatible = "ti,wl1835-st";
|
||||
enable-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
|
||||
clocks = <&pmic>;
|
||||
clock-names = "ext_clock";
|
||||
};
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
status = "ok";
|
||||
label = "LS-UART0";
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
status = "ok";
|
||||
label = "LS-UART1";
|
||||
};
|
||||
|
||||
|
|
@ -506,6 +306,196 @@
|
|||
};
|
||||
};
|
||||
|
||||
&dwmmc_0 {
|
||||
cap-mmc-highspeed;
|
||||
non-removable;
|
||||
bus-width = <0x8>;
|
||||
vmmc-supply = <&ldo19>;
|
||||
};
|
||||
|
||||
&dwmmc_1 {
|
||||
card-detect-delay = <200>;
|
||||
cap-sd-highspeed;
|
||||
sd-uhs-sdr12;
|
||||
sd-uhs-sdr25;
|
||||
sd-uhs-sdr50;
|
||||
vqmmc-supply = <&ldo7>;
|
||||
vmmc-supply = <&ldo10>;
|
||||
bus-width = <0x4>;
|
||||
disable-wp;
|
||||
cd-gpios = <&gpio1 0 1>;
|
||||
};
|
||||
|
||||
&dwmmc_2 {
|
||||
bus-width = <0x4>;
|
||||
non-removable;
|
||||
cap-power-off-card;
|
||||
vmmc-supply = <®_vdd_3v3>;
|
||||
mmc-pwrseq = <&wl1835_pwrseq>;
|
||||
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x0>;
|
||||
wlcore: wlcore@2 {
|
||||
compatible = "ti,wl1835";
|
||||
reg = <2>; /* sdio func num */
|
||||
/* WL_IRQ, WL_HOST_WAKE_GPIO1_3 */
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <3 IRQ_TYPE_EDGE_RISING>;
|
||||
};
|
||||
};
|
||||
|
||||
/*
|
||||
* Legend: proper name = the GPIO line is used as GPIO
|
||||
* NC = not connected (not routed from the SoC)
|
||||
* "[PER]" = pin is muxed for peripheral (not GPIO)
|
||||
* "" = no idea, schematic doesn't say, could be
|
||||
* unrouted (not connected to any external pin)
|
||||
* LSEC = Low Speed External Connector
|
||||
* HSEC = High Speed External Connector
|
||||
*
|
||||
* Pin assignments taken from LeMaker and CircuitCo Schematics
|
||||
* Rev A1.
|
||||
*
|
||||
* For the lines routed to the external connectors the
|
||||
* lines are named after the 96Boards CE Specification 1.0,
|
||||
* Appendix "Expansion Connector Signal Description".
|
||||
*
|
||||
* When the 96Board naming of a line and the schematic name of
|
||||
* the same line are in conflict, the 96Board specification
|
||||
* takes precedence, which means that the external UART on the
|
||||
* LSEC is named UART0 while the schematic and SoC names this
|
||||
* UART2. This is only for the informational lines i.e. "[FOO]",
|
||||
* the GPIO named lines "GPIO-A" thru "GPIO-L" are the only
|
||||
* ones actually used for GPIO.
|
||||
*/
|
||||
&gpio0 {
|
||||
gpio-line-names = "PWR_HOLD", "DSI_SEL",
|
||||
"USB_HUB_RESET_N", "USB_SEL", "HDMI_PD", "WL_REG_ON",
|
||||
"PWRON_DET", "5V_HUB_EN";
|
||||
};
|
||||
|
||||
&gpio1 {
|
||||
gpio-line-names = "SD_DET", "HDMI_INT", "PMU_IRQ_N",
|
||||
"WL_HOST_WAKE", "NC", "NC", "NC", "BT_REG_ON";
|
||||
};
|
||||
|
||||
&gpio2 {
|
||||
gpio-line-names =
|
||||
"GPIO-A", /* LSEC Pin 23: GPIO2_0 */
|
||||
"GPIO-B", /* LSEC Pin 24: GPIO2_1 */
|
||||
"GPIO-C", /* LSEC Pin 25: GPIO2_2 */
|
||||
"GPIO-D", /* LSEC Pin 26: GPIO2_3 */
|
||||
"GPIO-E", /* LSEC Pin 27: GPIO2_4 */
|
||||
"USB_ID_DET", "USB_VBUS_DET",
|
||||
"GPIO-H"; /* LSEC Pin 30: GPIO2_7 */
|
||||
};
|
||||
|
||||
&gpio3 {
|
||||
gpio-line-names = "GPIO3_0", "NC", "NC", "", "NC", "",
|
||||
"WLAN_ACTIVE", "NC", "NC";
|
||||
};
|
||||
|
||||
&gpio4 {
|
||||
gpio-line-names = "USER_LED1", "USER_LED2", "USER_LED3",
|
||||
"USER_LED4", "SD_SEL", "NC", "NC", "BT_ACTIVE";
|
||||
};
|
||||
|
||||
&gpio5 {
|
||||
gpio-line-names = "NC", "NC",
|
||||
"[UART1_RxD]", /* LSEC Pin 11: UART3_RX */
|
||||
"[UART1_TxD]", /* LSEC Pin 13: UART3_TX */
|
||||
"[AUX_SSI1]", "NC",
|
||||
"[PCM_CLK]", /* LSEC Pin 18: MODEM_PCM_XCLK */
|
||||
"[PCM_FS]"; /* LSEC Pin 16: MODEM_PCM_XFS */
|
||||
};
|
||||
|
||||
&gpio6 {
|
||||
gpio-line-names =
|
||||
"[SPI0_DIN]", /* Pin 10: SPI0_DI */
|
||||
"[SPI0_DOUT]", /* Pin 14: SPI0_DO */
|
||||
"[SPI0_CS]", /* Pin 12: SPI0_CS_N */
|
||||
"[SPI0_SCLK]", /* Pin 8: SPI0_SCLK */
|
||||
"NC", "NC", "NC",
|
||||
"GPIO-G"; /* Pin 29: GPIO6_7_DSI_TE0 */
|
||||
};
|
||||
|
||||
&gpio7 {
|
||||
gpio-line-names = "NC", "NC", "NC", "NC",
|
||||
"[PCM_DI]", /* Pin 22: MODEM_PCM_DI */
|
||||
"[PCM_DO]", /* Pin 20: MODEM_PCM_DO */
|
||||
"NC", "NC";
|
||||
};
|
||||
|
||||
&gpio8 {
|
||||
gpio-line-names = "NC", "[CEC_CLK_19_2MHZ]", "NC",
|
||||
"", "", "", "", "", "";
|
||||
};
|
||||
|
||||
&gpio9 {
|
||||
gpio-line-names = "",
|
||||
"GPIO-J", /* LSEC Pin 32: ISP_PWDN0_GPIO9_1 */
|
||||
"GPIO-L", /* LSEC Pin 34: ISP_PWDN1_GPIO9_2 */
|
||||
"NC", "NC", "NC", "NC", "[ISP_CCLK0]";
|
||||
};
|
||||
|
||||
&gpio10 {
|
||||
gpio-line-names = "BOOT_SEL",
|
||||
"[ISP_CCLK1]",
|
||||
"GPIO-I", /* LSEC Pin 31: ISP_RSTB0_GPIO10_2 */
|
||||
"GPIO-K", /* LSEC Pin 33: ISP_RSTB1_GPIO10_3 */
|
||||
"NC", "NC",
|
||||
"[I2C2_SDA]", /* HSEC Pin 34: ISP0_SDA */
|
||||
"[I2C2_SCL]"; /* HSEC Pin 32: ISP0_SCL */
|
||||
};
|
||||
|
||||
&gpio11 {
|
||||
gpio-line-names =
|
||||
"[I2C3_SDA]", /* HSEC Pin 38: ISP1_SDA */
|
||||
"[I2C3_SCL]", /* HSEC Pin 36: ISP1_SCL */
|
||||
"", "NC", "NC", "NC", "", "";
|
||||
};
|
||||
|
||||
&gpio12 {
|
||||
gpio-line-names = "[BT_PCM_XFS]", "[BT_PCM_DI]",
|
||||
"[BT_PCM_DO]",
|
||||
"NC", "NC", "NC", "NC",
|
||||
"GPIO-F"; /* LSEC Pin 28: BL_PWM_GPIO12_7 */
|
||||
};
|
||||
|
||||
&gpio13 {
|
||||
gpio-line-names = "[UART0_RX]", "[UART0_TX]",
|
||||
"[BT_UART1_CTS]", "[BT_UART1_RTS]",
|
||||
"[BT_UART1_RX]", "[BT_UART1_TX]",
|
||||
"[UART0_CTS]", /* LSEC Pin 3: UART2_CTS_N */
|
||||
"[UART0_RTS]"; /* LSEC Pin 9: UART2_RTS_N */
|
||||
};
|
||||
|
||||
&gpio14 {
|
||||
gpio-line-names =
|
||||
"[UART0_RxD]", /* LSEC Pin 7: UART2_RX */
|
||||
"[UART0_TxD]", /* LSEC Pin 5: UART2_TX */
|
||||
"[I2C0_SCL]", /* LSEC Pin 15: I2C0_SCL */
|
||||
"[I2C0_SDA]", /* LSEC Pin 17: I2C0_SDA */
|
||||
"[I2C1_SCL]", /* LSEC Pin 19: I2C1_SCL */
|
||||
"[I2C1_SDA]", /* LSEC Pin 21: I2C1_SDA */
|
||||
"[I2C2_SCL]", "[I2C2_SDA]";
|
||||
};
|
||||
|
||||
&gpio15 {
|
||||
gpio-line-names = "", "", "", "", "", "", "NC", "";
|
||||
};
|
||||
|
||||
/* GPIO blocks 16 thru 19 do not appear to be routed to pins */
|
||||
|
||||
|
||||
&i2c0 {
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
|
@ -516,7 +506,7 @@
|
|||
reg = <0x39>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <1 2>;
|
||||
pd-gpio = <&gpio0 4 0>;
|
||||
pd-gpios = <&gpio0 4 0>;
|
||||
adi,dsi-lanes = <4>;
|
||||
#sound-dai-cells = <0>;
|
||||
|
||||
|
|
@ -549,3 +539,7 @@
|
|||
};
|
||||
};
|
||||
};
|
||||
|
||||
&spi0 {
|
||||
status = "ok";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -302,7 +302,7 @@
|
|||
mboxes = <&mailbox 1 0 11>;
|
||||
};
|
||||
|
||||
uart0: uart@f8015000 { /* console */
|
||||
uart0: serial@f8015000 { /* console */
|
||||
compatible = "arm,pl011", "arm,primecell";
|
||||
reg = <0x0 0xf8015000 0x0 0x1000>;
|
||||
interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
|
@ -311,7 +311,7 @@
|
|||
clock-names = "uartclk", "apb_pclk";
|
||||
};
|
||||
|
||||
uart1: uart@f7111000 {
|
||||
uart1: serial@f7111000 {
|
||||
compatible = "arm,pl011", "arm,primecell";
|
||||
reg = <0x0 0xf7111000 0x0 0x1000>;
|
||||
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
|
@ -325,7 +325,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
uart2: uart@f7112000 {
|
||||
uart2: serial@f7112000 {
|
||||
compatible = "arm,pl011", "arm,primecell";
|
||||
reg = <0x0 0xf7112000 0x0 0x1000>;
|
||||
interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
|
@ -337,7 +337,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
uart3: uart@f7113000 {
|
||||
uart3: serial@f7113000 {
|
||||
compatible = "arm,pl011", "arm,primecell";
|
||||
reg = <0x0 0xf7113000 0x0 0x1000>;
|
||||
interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
|
@ -349,7 +349,7 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
uart4: uart@f7114000 {
|
||||
uart4: serial@f7114000 {
|
||||
compatible = "arm,pl011", "arm,primecell";
|
||||
reg = <0x0 0xf7114000 0x0 0x1000>;
|
||||
interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
|
|
|||
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