Merge branch 'core-rcu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'core-rcu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: smp: Document transitivity for memory barriers. rcu: add comment saying why DEBUG_OBJECTS_RCU_HEAD depends on PREEMPT. rcupdate: remove dead code rcu: add documentation saying which RCU flavor to choose rcutorture: Get rid of duplicate sched.h include rcu: call __rcu_read_unlock() in exit_rcu for tiny RCU
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@ -849,6 +849,37 @@ All: lockdep-checked RCU-protected pointer access
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See the comment headers in the source code (or the docbook generated
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from them) for more information.
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However, given that there are no fewer than four families of RCU APIs
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in the Linux kernel, how do you choose which one to use? The following
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list can be helpful:
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a. Will readers need to block? If so, you need SRCU.
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b. What about the -rt patchset? If readers would need to block
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in an non-rt kernel, you need SRCU. If readers would block
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in a -rt kernel, but not in a non-rt kernel, SRCU is not
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necessary.
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c. Do you need to treat NMI handlers, hardirq handlers,
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and code segments with preemption disabled (whether
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via preempt_disable(), local_irq_save(), local_bh_disable(),
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or some other mechanism) as if they were explicit RCU readers?
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If so, you need RCU-sched.
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d. Do you need RCU grace periods to complete even in the face
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of softirq monopolization of one or more of the CPUs? For
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example, is your code subject to network-based denial-of-service
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attacks? If so, you need RCU-bh.
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e. Is your workload too update-intensive for normal use of
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RCU, but inappropriate for other synchronization mechanisms?
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If so, consider SLAB_DESTROY_BY_RCU. But please be careful!
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f. Otherwise, use RCU.
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Of course, this all assumes that you have determined that RCU is in fact
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the right tool for your job.
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8. ANSWERS TO QUICK QUIZZES
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@ -21,6 +21,7 @@ Contents:
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- SMP barrier pairing.
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- Examples of memory barrier sequences.
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- Read memory barriers vs load speculation.
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- Transitivity
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(*) Explicit kernel barriers.
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@ -959,6 +960,63 @@ the speculation will be cancelled and the value reloaded:
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retrieved : : +-------+
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TRANSITIVITY
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------------
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Transitivity is a deeply intuitive notion about ordering that is not
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always provided by real computer systems. The following example
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demonstrates transitivity (also called "cumulativity"):
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CPU 1 CPU 2 CPU 3
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======================= ======================= =======================
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{ X = 0, Y = 0 }
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STORE X=1 LOAD X STORE Y=1
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<general barrier> <general barrier>
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LOAD Y LOAD X
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Suppose that CPU 2's load from X returns 1 and its load from Y returns 0.
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This indicates that CPU 2's load from X in some sense follows CPU 1's
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store to X and that CPU 2's load from Y in some sense preceded CPU 3's
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store to Y. The question is then "Can CPU 3's load from X return 0?"
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Because CPU 2's load from X in some sense came after CPU 1's store, it
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is natural to expect that CPU 3's load from X must therefore return 1.
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This expectation is an example of transitivity: if a load executing on
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CPU A follows a load from the same variable executing on CPU B, then
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CPU A's load must either return the same value that CPU B's load did,
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or must return some later value.
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In the Linux kernel, use of general memory barriers guarantees
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transitivity. Therefore, in the above example, if CPU 2's load from X
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returns 1 and its load from Y returns 0, then CPU 3's load from X must
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also return 1.
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However, transitivity is -not- guaranteed for read or write barriers.
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For example, suppose that CPU 2's general barrier in the above example
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is changed to a read barrier as shown below:
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CPU 1 CPU 2 CPU 3
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======================= ======================= =======================
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{ X = 0, Y = 0 }
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STORE X=1 LOAD X STORE Y=1
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<read barrier> <general barrier>
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LOAD Y LOAD X
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This substitution destroys transitivity: in this example, it is perfectly
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legal for CPU 2's load from X to return 1, its load from Y to return 0,
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and CPU 3's load from X to return 0.
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The key point is that although CPU 2's read barrier orders its pair
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of loads, it does not guarantee to order CPU 1's store. Therefore, if
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this example runs on a system where CPUs 1 and 2 share a store buffer
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or a level of cache, CPU 2 might have early access to CPU 1's writes.
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General barriers are therefore required to ensure that all CPUs agree
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on the combined order of CPU 1's and CPU 2's accesses.
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To reiterate, if your code requires transitivity, use general barriers
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throughout.
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========================
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EXPLICIT KERNEL BARRIERS
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========================
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@ -214,11 +214,12 @@ static int rcuhead_fixup_free(void *addr, enum debug_obj_state state)
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* Ensure that queued callbacks are all executed.
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* If we detect that we are nested in a RCU read-side critical
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* section, we should simply fail, otherwise we would deadlock.
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* Note that the machinery to reliably determine whether
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* or not we are in an RCU read-side critical section
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* exists only in the preemptible RCU implementations
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* (TINY_PREEMPT_RCU and TREE_PREEMPT_RCU), which is why
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* DEBUG_OBJECTS_RCU_HEAD is disallowed if !PREEMPT.
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*/
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#ifndef CONFIG_PREEMPT
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WARN_ON(1);
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return 0;
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#else
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if (rcu_preempt_depth() != 0 || preempt_count() != 0 ||
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irqs_disabled()) {
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WARN_ON(1);
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@ -229,7 +230,6 @@ static int rcuhead_fixup_free(void *addr, enum debug_obj_state state)
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rcu_barrier_bh();
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debug_object_free(head, &rcuhead_debug_descr);
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return 1;
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#endif
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default:
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return 0;
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}
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@ -852,7 +852,7 @@ void exit_rcu(void)
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if (t->rcu_read_lock_nesting == 0)
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return;
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t->rcu_read_lock_nesting = 1;
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rcu_read_unlock();
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__rcu_read_unlock();
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}
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#else /* #ifdef CONFIG_TINY_PREEMPT_RCU */
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@ -47,7 +47,6 @@
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#include <linux/srcu.h>
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#include <linux/slab.h>
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#include <asm/byteorder.h>
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#include <linux/sched.h>
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Paul E. McKenney <paulmck@us.ibm.com> and "
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