hwmon: (w83795) Fix PWM duty cycle frequency attributes
The PWM duty cycle frequenty attributes are improperly named (fanN_div instead of pwmN_div) and contain raw values instead of actual frequencies. Rename them and fix their contents. Also improve the logic when the user asks for a new frequency, to always pick the closest supported frequency. The algorithm could certainly be optimized, but the operation is infrequent enough that I don't think it's worth the effort. Signed-off-by: Jean Delvare <khali@linux-fr.org>
This commit is contained in:
Родитель
0e256018b0
Коммит
01879a855f
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@ -200,7 +200,6 @@ static const u8 IN_LSB_SHIFT_IDX[][2] = {
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#define W83795_REG_FCMS2 0x208
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#define W83795_REG_TFMR(index) (0x202 + (index))
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#define W83795_REG_FOMC 0x20F
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#define W83795_REG_FOPFP(index) (0x218 + (index))
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#define W83795_REG_TSS(index) (0x209 + (index))
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@ -208,18 +207,13 @@ static const u8 IN_LSB_SHIFT_IDX[][2] = {
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#define PWM_START 1
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#define PWM_NONSTOP 2
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#define PWM_STOP_TIME 3
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#define PWM_DIV 4
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#define PWM_FREQ 4
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#define W83795_REG_PWM(index, nr) \
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(((nr) == 0 ? 0x210 : \
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(nr) == 1 ? 0x220 : \
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(nr) == 2 ? 0x228 : \
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(nr) == 3 ? 0x230 : 0x218) + (index))
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#define W83795_REG_FOPFP_DIV(index) \
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(((index) < 8) ? ((index) + 1) : \
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((index) == 8) ? 12 : \
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(16 << ((index) - 9)))
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#define W83795_REG_FTSH(index) (0x240 + (index) * 2)
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#define W83795_REG_FTSL(index) (0x241 + (index) * 2)
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#define W83795_REG_TFTS 0x250
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@ -304,6 +298,50 @@ static inline s8 temp_to_reg(long val, s8 min, s8 max)
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return SENSORS_LIMIT((val < 0 ? -val : val) / 1000, min, max);
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}
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static const u16 pwm_freq_cksel0[16] = {
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1024, 512, 341, 256, 205, 171, 146, 128,
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85, 64, 32, 16, 8, 4, 2, 1
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};
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static unsigned int pwm_freq_from_reg(u8 reg, u16 clkin)
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{
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unsigned long base_clock;
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if (reg & 0x80) {
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base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256);
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return base_clock / ((reg & 0x7f) + 1);
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} else
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return pwm_freq_cksel0[reg & 0x0f];
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}
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static u8 pwm_freq_to_reg(unsigned long val, u16 clkin)
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{
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unsigned long base_clock;
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u8 reg0, reg1;
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unsigned long best0, best1;
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/* Best fit for cksel = 0 */
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for (reg0 = 0; reg0 < ARRAY_SIZE(pwm_freq_cksel0) - 1; reg0++) {
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if (val > (pwm_freq_cksel0[reg0] +
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pwm_freq_cksel0[reg0 + 1]) / 2)
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break;
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}
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if (val < 375) /* cksel = 1 can't beat this */
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return reg0;
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best0 = pwm_freq_cksel0[reg0];
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/* Best fit for cksel = 1 */
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base_clock = clkin * 1000 / ((clkin == 48000) ? 384 : 256);
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reg1 = SENSORS_LIMIT(DIV_ROUND_CLOSEST(base_clock, val), 1, 128);
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best1 = base_clock / reg1;
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reg1 = 0x80 | (reg1 - 1);
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/* Choose the closest one */
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if (abs(val - best0) > abs(val - best1))
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return reg1;
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else
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return reg0;
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}
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enum chip_types {w83795g, w83795adg};
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@ -343,7 +381,8 @@ struct w83795_data {
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* no config register, only affected by chip
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* type */
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u8 pwm[8][5]; /* Register value, output, start, non stop, stop
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* time, div */
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* time, freq */
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u16 clkin; /* CLKIN frequency in kHz */
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u8 pwm_fcms[2]; /* Register value */
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u8 pwm_tfmr[6]; /* Register value */
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u8 pwm_fomc; /* Register value */
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@ -688,14 +727,14 @@ show_pwm(struct device *dev, struct device_attribute *attr, char *buf)
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to_sensor_dev_attr_2(attr);
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int nr = sensor_attr->nr;
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int index = sensor_attr->index;
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u16 val;
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unsigned int val;
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switch (nr) {
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case PWM_STOP_TIME:
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val = time_from_reg(data->pwm[index][nr]);
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break;
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case PWM_DIV:
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val = W83795_REG_FOPFP_DIV(data->pwm[index][nr] & 0x0f);
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case PWM_FREQ:
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val = pwm_freq_from_reg(data->pwm[index][nr], data->clkin);
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break;
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default:
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val = data->pwm[index][nr];
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@ -716,7 +755,6 @@ store_pwm(struct device *dev, struct device_attribute *attr,
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int nr = sensor_attr->nr;
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int index = sensor_attr->index;
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unsigned long val;
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int i;
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if (strict_strtoul(buf, 10, &val) < 0)
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return -EINVAL;
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@ -726,28 +764,17 @@ store_pwm(struct device *dev, struct device_attribute *attr,
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case PWM_STOP_TIME:
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val = time_to_reg(val);
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break;
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case PWM_DIV:
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for (i = 0; i < 16; i++) {
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if (W83795_REG_FOPFP_DIV(i) == val) {
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val = i;
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break;
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}
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}
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if (i >= 16)
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goto err_end;
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val |= w83795_read(client, W83795_REG_PWM(index, nr)) & 0x80;
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case PWM_FREQ:
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val = pwm_freq_to_reg(val, data->clkin);
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break;
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default:
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val = SENSORS_LIMIT(val, 0, 0xff);
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break;
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}
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w83795_write(client, W83795_REG_PWM(index, nr), val);
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data->pwm[index][nr] = val & 0xff;
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data->pwm[index][nr] = val;
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mutex_unlock(&data->update_lock);
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return count;
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err_end:
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mutex_unlock(&data->update_lock);
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return -EINVAL;
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}
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static ssize_t
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@ -1502,8 +1529,8 @@ store_sf_setup(struct device *dev, struct device_attribute *attr,
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show_pwm, store_pwm, PWM_START, index - 1), \
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SENSOR_ATTR_2(pwm##index##_stop_time, S_IWUSR | S_IRUGO, \
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show_pwm, store_pwm, PWM_STOP_TIME, index - 1), \
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SENSOR_ATTR_2(fan##index##_div, S_IWUSR | S_IRUGO, \
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show_pwm, store_pwm, PWM_DIV, index - 1), \
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SENSOR_ATTR_2(pwm##index##_freq, S_IWUSR | S_IRUGO, \
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show_pwm, store_pwm, PWM_FREQ, index - 1), \
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SENSOR_ATTR_2(pwm##index##_enable, S_IWUSR | S_IRUGO, \
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show_pwm_enable, store_pwm_enable, NOT_USED, index - 1), \
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SENSOR_ATTR_2(fan##index##_target, S_IWUSR | S_IRUGO, \
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@ -1685,6 +1712,10 @@ static const struct sensor_device_attribute_2 sda_single_files[] = {
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static void w83795_init_client(struct i2c_client *client)
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{
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struct w83795_data *data = i2c_get_clientdata(client);
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static const u16 clkin[4] = { /* in kHz */
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14318, 24000, 33333, 48000
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};
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u8 config;
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if (reset)
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@ -1697,6 +1728,9 @@ static void w83795_init_client(struct i2c_client *client)
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w83795_write(client, W83795_REG_CONFIG,
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config | W83795_REG_CONFIG_START);
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}
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data->clkin = clkin[(config >> 3) & 0x3];
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dev_dbg(&client->dev, "clkin = %u kHz\n", data->clkin);
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}
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static int w83795_get_device_id(struct i2c_client *client)
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