drm/i915: Only poll DW3_A when init DDI PHY for ports B and C.
According to Bspec we need to "Poll for PORT_REF_DW3_A grc_done == 1b" only on ports B and C initialization sequence when copying rcomp from port A. So let's follow the spec and only poll for that case and not on every port A initialization. v2: Also remove the grc_done check from bxt_ddi_phy_is_enabled() otherwise it might believe it is disabled and force it to re program. Cc: Imre Deak <imre.deak@intel.com> Cc: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1479410256-25735-1-git-send-email-rodrigo.vivi@intel.com
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01a551971c
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@ -328,14 +328,6 @@ bool bxt_ddi_phy_is_enabled(struct drm_i915_private *dev_priv,
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return false;
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}
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if (phy_info->rcomp_phy == -1 &&
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!(I915_READ(BXT_PORT_REF_DW3(phy)) & GRC_DONE)) {
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DRM_DEBUG_DRIVER("DDI PHY %d powered, but GRC isn't done\n",
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phy);
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return false;
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}
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if (!(I915_READ(BXT_PHY_CTL_FAMILY(phy)) & COMMON_RESET_DIS)) {
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DRM_DEBUG_DRIVER("DDI PHY %d powered, but still in reset\n",
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phy);
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@ -441,6 +433,9 @@ static void _bxt_ddi_phy_init(struct drm_i915_private *dev_priv,
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if (phy_info->rcomp_phy != -1) {
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uint32_t grc_code;
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bxt_phy_wait_grc_done(dev_priv, phy_info->rcomp_phy);
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/*
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* PHY0 isn't connected to an RCOMP resistor so copy over
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* the corresponding calibrated value from PHY1, and disable
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@ -464,10 +459,6 @@ static void _bxt_ddi_phy_init(struct drm_i915_private *dev_priv,
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val = I915_READ(BXT_PHY_CTL_FAMILY(phy));
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val |= COMMON_RESET_DIS;
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I915_WRITE(BXT_PHY_CTL_FAMILY(phy), val);
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if (phy_info->rcomp_phy == -1)
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bxt_phy_wait_grc_done(dev_priv, phy);
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}
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void bxt_ddi_phy_uninit(struct drm_i915_private *dev_priv, enum dpio_phy phy)
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