Merge 5.4-rc7 into char-misc-next
We need the char/misc driver fixes in here as well. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Коммит
01b59c763f
4
.mailmap
4
.mailmap
|
@ -108,6 +108,10 @@ Jason Gunthorpe <jgg@ziepe.ca> <jgg@mellanox.com>
|
|||
Jason Gunthorpe <jgg@ziepe.ca> <jgunthorpe@obsidianresearch.com>
|
||||
Javi Merino <javi.merino@kernel.org> <javi.merino@arm.com>
|
||||
<javier@osg.samsung.com> <javier.martinez@collabora.co.uk>
|
||||
Jayachandran C <c.jayachandran@gmail.com> <jayachandranc@netlogicmicro.com>
|
||||
Jayachandran C <c.jayachandran@gmail.com> <jchandra@broadcom.com>
|
||||
Jayachandran C <c.jayachandran@gmail.com> <jchandra@digeo.com>
|
||||
Jayachandran C <c.jayachandran@gmail.com> <jnair@caviumnetworks.com>
|
||||
Jean Tourrilhes <jt@hpl.hp.com>
|
||||
<jean-philippe@linaro.org> <jean-philippe.brucker@arm.com>
|
||||
Jeff Garzik <jgarzik@pretzel.yyz.us>
|
||||
|
|
|
@ -91,6 +91,11 @@ stable kernels.
|
|||
| ARM | MMU-500 | #841119,826419 | N/A |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| Broadcom | Brahma-B53 | N/A | ARM64_ERRATUM_845719 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| Broadcom | Brahma-B53 | N/A | ARM64_ERRATUM_843419 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| Cavium | ThunderX ITS | #22375,24313 | CAVIUM_ERRATUM_22375 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| Cavium | ThunderX ITS | #23144 | CAVIUM_ERRATUM_23144 |
|
||||
|
@ -126,7 +131,7 @@ stable kernels.
|
|||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| Qualcomm Tech. | Kryo/Falkor v1 | E1003 | QCOM_FALKOR_ERRATUM_1003 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| Qualcomm Tech. | Falkor v1 | E1009 | QCOM_FALKOR_ERRATUM_1009 |
|
||||
| Qualcomm Tech. | Kryo/Falkor v1 | E1009 | QCOM_FALKOR_ERRATUM_1009 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
| Qualcomm Tech. | QDF2400 ITS | E0065 | QCOM_QDF2400_ERRATUM_0065 |
|
||||
+----------------+-----------------+-----------------+-----------------------------+
|
||||
|
|
|
@ -1,8 +1,8 @@
|
|||
.. SPDX-License-Identifier: GPL-2.0+
|
||||
|
||||
==============================================================
|
||||
Linux* Base Driver for the Intel(R) PRO/100 Family of Adapters
|
||||
==============================================================
|
||||
=============================================================
|
||||
Linux Base Driver for the Intel(R) PRO/100 Family of Adapters
|
||||
=============================================================
|
||||
|
||||
June 1, 2018
|
||||
|
||||
|
@ -21,7 +21,7 @@ Contents
|
|||
In This Release
|
||||
===============
|
||||
|
||||
This file describes the Linux* Base Driver for the Intel(R) PRO/100 Family of
|
||||
This file describes the Linux Base Driver for the Intel(R) PRO/100 Family of
|
||||
Adapters. This driver includes support for Itanium(R)2-based systems.
|
||||
|
||||
For questions related to hardware requirements, refer to the documentation
|
||||
|
@ -138,9 +138,9 @@ version 1.6 or later is required for this functionality.
|
|||
The latest release of ethtool can be found from
|
||||
https://www.kernel.org/pub/software/network/ethtool/
|
||||
|
||||
Enabling Wake on LAN* (WoL)
|
||||
---------------------------
|
||||
WoL is provided through the ethtool* utility. For instructions on
|
||||
Enabling Wake on LAN (WoL)
|
||||
--------------------------
|
||||
WoL is provided through the ethtool utility. For instructions on
|
||||
enabling WoL with ethtool, refer to the ethtool man page. WoL will be
|
||||
enabled on the system during the next shut down or reboot. For this
|
||||
driver version, in order to enable WoL, the e100 driver must be loaded
|
||||
|
|
|
@ -1,8 +1,8 @@
|
|||
.. SPDX-License-Identifier: GPL-2.0+
|
||||
|
||||
===========================================================
|
||||
Linux* Base Driver for Intel(R) Ethernet Network Connection
|
||||
===========================================================
|
||||
==========================================================
|
||||
Linux Base Driver for Intel(R) Ethernet Network Connection
|
||||
==========================================================
|
||||
|
||||
Intel Gigabit Linux driver.
|
||||
Copyright(c) 1999 - 2013 Intel Corporation.
|
||||
|
@ -438,10 +438,10 @@ ethtool
|
|||
The latest release of ethtool can be found from
|
||||
https://www.kernel.org/pub/software/network/ethtool/
|
||||
|
||||
Enabling Wake on LAN* (WoL)
|
||||
---------------------------
|
||||
Enabling Wake on LAN (WoL)
|
||||
--------------------------
|
||||
|
||||
WoL is configured through the ethtool* utility.
|
||||
WoL is configured through the ethtool utility.
|
||||
|
||||
WoL will be enabled on the system during the next shut down or reboot.
|
||||
For this driver version, in order to enable WoL, the e1000 driver must be
|
||||
|
|
|
@ -1,8 +1,8 @@
|
|||
.. SPDX-License-Identifier: GPL-2.0+
|
||||
|
||||
======================================================
|
||||
Linux* Driver for Intel(R) Ethernet Network Connection
|
||||
======================================================
|
||||
=====================================================
|
||||
Linux Driver for Intel(R) Ethernet Network Connection
|
||||
=====================================================
|
||||
|
||||
Intel Gigabit Linux driver.
|
||||
Copyright(c) 2008-2018 Intel Corporation.
|
||||
|
@ -338,7 +338,7 @@ and higher cannot be forced. Use the autonegotiation advertising setting to
|
|||
manually set devices for 1 Gbps and higher.
|
||||
|
||||
Speed, duplex, and autonegotiation advertising are configured through the
|
||||
ethtool* utility.
|
||||
ethtool utility.
|
||||
|
||||
Caution: Only experienced network administrators should force speed and duplex
|
||||
or change autonegotiation advertising manually. The settings at the switch must
|
||||
|
@ -351,9 +351,9 @@ will not attempt to auto-negotiate with its link partner since those adapters
|
|||
operate only in full duplex and only at their native speed.
|
||||
|
||||
|
||||
Enabling Wake on LAN* (WoL)
|
||||
---------------------------
|
||||
WoL is configured through the ethtool* utility.
|
||||
Enabling Wake on LAN (WoL)
|
||||
--------------------------
|
||||
WoL is configured through the ethtool utility.
|
||||
|
||||
WoL will be enabled on the system during the next shut down or reboot. For
|
||||
this driver version, in order to enable WoL, the e1000e driver must be loaded
|
||||
|
|
|
@ -1,8 +1,8 @@
|
|||
.. SPDX-License-Identifier: GPL-2.0+
|
||||
|
||||
==============================================================
|
||||
Linux* Base Driver for Intel(R) Ethernet Multi-host Controller
|
||||
==============================================================
|
||||
=============================================================
|
||||
Linux Base Driver for Intel(R) Ethernet Multi-host Controller
|
||||
=============================================================
|
||||
|
||||
August 20, 2018
|
||||
Copyright(c) 2015-2018 Intel Corporation.
|
||||
|
@ -120,8 +120,8 @@ rx-flow-hash tcp4|udp4|ah4|esp4|sctp4|tcp6|udp6|ah6|esp6|sctp6 m|v|t|s|d|f|n|r
|
|||
Known Issues/Troubleshooting
|
||||
============================
|
||||
|
||||
Enabling SR-IOV in a 64-bit Microsoft* Windows Server* 2012/R2 guest OS under Linux KVM
|
||||
---------------------------------------------------------------------------------------
|
||||
Enabling SR-IOV in a 64-bit Microsoft Windows Server 2012/R2 guest OS under Linux KVM
|
||||
-------------------------------------------------------------------------------------
|
||||
KVM Hypervisor/VMM supports direct assignment of a PCIe device to a VM. This
|
||||
includes traditional PCIe devices, as well as SR-IOV-capable devices based on
|
||||
the Intel Ethernet Controller XL710.
|
||||
|
|
|
@ -1,8 +1,8 @@
|
|||
.. SPDX-License-Identifier: GPL-2.0+
|
||||
|
||||
==================================================================
|
||||
Linux* Base Driver for the Intel(R) Ethernet Controller 700 Series
|
||||
==================================================================
|
||||
=================================================================
|
||||
Linux Base Driver for the Intel(R) Ethernet Controller 700 Series
|
||||
=================================================================
|
||||
|
||||
Intel 40 Gigabit Linux driver.
|
||||
Copyright(c) 1999-2018 Intel Corporation.
|
||||
|
@ -384,7 +384,7 @@ NOTE: You cannot set the speed for devices based on the Intel(R) Ethernet
|
|||
Network Adapter XXV710 based devices.
|
||||
|
||||
Speed, duplex, and autonegotiation advertising are configured through the
|
||||
ethtool* utility.
|
||||
ethtool utility.
|
||||
|
||||
Caution: Only experienced network administrators should force speed and duplex
|
||||
or change autonegotiation advertising manually. The settings at the switch must
|
||||
|
|
|
@ -1,8 +1,8 @@
|
|||
.. SPDX-License-Identifier: GPL-2.0+
|
||||
|
||||
==================================================================
|
||||
Linux* Base Driver for Intel(R) Ethernet Adaptive Virtual Function
|
||||
==================================================================
|
||||
=================================================================
|
||||
Linux Base Driver for Intel(R) Ethernet Adaptive Virtual Function
|
||||
=================================================================
|
||||
|
||||
Intel Ethernet Adaptive Virtual Function Linux driver.
|
||||
Copyright(c) 2013-2018 Intel Corporation.
|
||||
|
@ -19,7 +19,7 @@ Contents
|
|||
Overview
|
||||
========
|
||||
|
||||
This file describes the iavf Linux* Base Driver. This driver was formerly
|
||||
This file describes the iavf Linux Base Driver. This driver was formerly
|
||||
called i40evf.
|
||||
|
||||
The iavf driver supports the below mentioned virtual function devices and
|
||||
|
|
|
@ -1,8 +1,8 @@
|
|||
.. SPDX-License-Identifier: GPL-2.0+
|
||||
|
||||
===================================================================
|
||||
Linux* Base Driver for the Intel(R) Ethernet Connection E800 Series
|
||||
===================================================================
|
||||
==================================================================
|
||||
Linux Base Driver for the Intel(R) Ethernet Connection E800 Series
|
||||
==================================================================
|
||||
|
||||
Intel ice Linux driver.
|
||||
Copyright(c) 2018 Intel Corporation.
|
||||
|
|
|
@ -1,8 +1,8 @@
|
|||
.. SPDX-License-Identifier: GPL-2.0+
|
||||
|
||||
===========================================================
|
||||
Linux* Base Driver for Intel(R) Ethernet Network Connection
|
||||
===========================================================
|
||||
==========================================================
|
||||
Linux Base Driver for Intel(R) Ethernet Network Connection
|
||||
==========================================================
|
||||
|
||||
Intel Gigabit Linux driver.
|
||||
Copyright(c) 1999-2018 Intel Corporation.
|
||||
|
@ -129,9 +129,9 @@ version is required for this functionality. Download it at:
|
|||
https://www.kernel.org/pub/software/network/ethtool/
|
||||
|
||||
|
||||
Enabling Wake on LAN* (WoL)
|
||||
---------------------------
|
||||
WoL is configured through the ethtool* utility.
|
||||
Enabling Wake on LAN (WoL)
|
||||
--------------------------
|
||||
WoL is configured through the ethtool utility.
|
||||
|
||||
WoL will be enabled on the system during the next shut down or reboot. For
|
||||
this driver version, in order to enable WoL, the igb driver must be loaded
|
||||
|
|
|
@ -1,8 +1,8 @@
|
|||
.. SPDX-License-Identifier: GPL-2.0+
|
||||
|
||||
============================================================
|
||||
Linux* Base Virtual Function Driver for Intel(R) 1G Ethernet
|
||||
============================================================
|
||||
===========================================================
|
||||
Linux Base Virtual Function Driver for Intel(R) 1G Ethernet
|
||||
===========================================================
|
||||
|
||||
Intel Gigabit Virtual Function Linux driver.
|
||||
Copyright(c) 1999-2018 Intel Corporation.
|
||||
|
|
|
@ -1,8 +1,8 @@
|
|||
.. SPDX-License-Identifier: GPL-2.0+
|
||||
|
||||
=============================================================================
|
||||
Linux* Base Driver for the Intel(R) Ethernet 10 Gigabit PCI Express Adapters
|
||||
=============================================================================
|
||||
===========================================================================
|
||||
Linux Base Driver for the Intel(R) Ethernet 10 Gigabit PCI Express Adapters
|
||||
===========================================================================
|
||||
|
||||
Intel 10 Gigabit Linux driver.
|
||||
Copyright(c) 1999-2018 Intel Corporation.
|
||||
|
@ -519,8 +519,8 @@ The offload is also supported for ixgbe's VFs, but the VF must be set as
|
|||
Known Issues/Troubleshooting
|
||||
============================
|
||||
|
||||
Enabling SR-IOV in a 64-bit Microsoft* Windows Server* 2012/R2 guest OS
|
||||
-----------------------------------------------------------------------
|
||||
Enabling SR-IOV in a 64-bit Microsoft Windows Server 2012/R2 guest OS
|
||||
---------------------------------------------------------------------
|
||||
Linux KVM Hypervisor/VMM supports direct assignment of a PCIe device to a VM.
|
||||
This includes traditional PCIe devices, as well as SR-IOV-capable devices based
|
||||
on the Intel Ethernet Controller XL710.
|
||||
|
|
|
@ -1,8 +1,8 @@
|
|||
.. SPDX-License-Identifier: GPL-2.0+
|
||||
|
||||
=============================================================
|
||||
Linux* Base Virtual Function Driver for Intel(R) 10G Ethernet
|
||||
=============================================================
|
||||
============================================================
|
||||
Linux Base Virtual Function Driver for Intel(R) 10G Ethernet
|
||||
============================================================
|
||||
|
||||
Intel 10 Gigabit Virtual Function Linux driver.
|
||||
Copyright(c) 1999-2018 Intel Corporation.
|
||||
|
|
|
@ -1,8 +1,8 @@
|
|||
.. SPDX-License-Identifier: GPL-2.0+
|
||||
|
||||
==========================================================
|
||||
Linux* Driver for the Pensando(R) Ethernet adapter family
|
||||
==========================================================
|
||||
========================================================
|
||||
Linux Driver for the Pensando(R) Ethernet adapter family
|
||||
========================================================
|
||||
|
||||
Pensando Linux Ethernet driver.
|
||||
Copyright(c) 2019 Pensando Systems, Inc
|
||||
|
|
|
@ -207,8 +207,8 @@ TCP variables:
|
|||
|
||||
somaxconn - INTEGER
|
||||
Limit of socket listen() backlog, known in userspace as SOMAXCONN.
|
||||
Defaults to 128. See also tcp_max_syn_backlog for additional tuning
|
||||
for TCP sockets.
|
||||
Defaults to 4096. (Was 128 before linux-5.4)
|
||||
See also tcp_max_syn_backlog for additional tuning for TCP sockets.
|
||||
|
||||
tcp_abort_on_overflow - BOOLEAN
|
||||
If listening service is too slow to accept new connections,
|
||||
|
@ -408,11 +408,14 @@ tcp_max_orphans - INTEGER
|
|||
up to ~64K of unswappable memory.
|
||||
|
||||
tcp_max_syn_backlog - INTEGER
|
||||
Maximal number of remembered connection requests, which have not
|
||||
received an acknowledgment from connecting client.
|
||||
Maximal number of remembered connection requests (SYN_RECV),
|
||||
which have not received an acknowledgment from connecting client.
|
||||
This is a per-listener limit.
|
||||
The minimal value is 128 for low memory machines, and it will
|
||||
increase in proportion to the memory of machine.
|
||||
If server suffers from overload, try increasing this number.
|
||||
Remember to also check /proc/sys/net/core/somaxconn
|
||||
A SYN_RECV request socket consumes about 304 bytes of memory.
|
||||
|
||||
tcp_max_tw_buckets - INTEGER
|
||||
Maximal number of timewait sockets held by system simultaneously.
|
||||
|
|
|
@ -436,6 +436,10 @@ by the driver:
|
|||
encryption.
|
||||
* ``tx_tls_ooo`` - number of TX packets which were part of a TLS stream
|
||||
but did not arrive in the expected order.
|
||||
* ``tx_tls_skip_no_sync_data`` - number of TX packets which were part of
|
||||
a TLS stream and arrived out-of-order, but skipped the HW offload routine
|
||||
and went to the regular transmit flow as they were retransmissions of the
|
||||
connection handshake.
|
||||
* ``tx_tls_drop_no_sync_data`` - number of TX packets which were part of
|
||||
a TLS stream dropped, because they arrived out of order and associated
|
||||
record could not be found.
|
||||
|
|
20
MAINTAINERS
20
MAINTAINERS
|
@ -3053,6 +3053,7 @@ M: Daniel Borkmann <daniel@iogearbox.net>
|
|||
R: Martin KaFai Lau <kafai@fb.com>
|
||||
R: Song Liu <songliubraving@fb.com>
|
||||
R: Yonghong Song <yhs@fb.com>
|
||||
R: Andrii Nakryiko <andriin@fb.com>
|
||||
L: netdev@vger.kernel.org
|
||||
L: bpf@vger.kernel.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/bpf/bpf.git
|
||||
|
@ -3737,7 +3738,6 @@ F: drivers/crypto/cavium/cpt/
|
|||
|
||||
CAVIUM THUNDERX2 ARM64 SOC
|
||||
M: Robert Richter <rrichter@cavium.com>
|
||||
M: Jayachandran C <jnair@caviumnetworks.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
F: arch/arm64/boot/dts/cavium/thunder2-99xx*
|
||||
|
@ -10519,8 +10519,12 @@ F: mm/memblock.c
|
|||
F: Documentation/core-api/boot-time-mm.rst
|
||||
|
||||
MEMORY MANAGEMENT
|
||||
M: Andrew Morton <akpm@linux-foundation.org>
|
||||
L: linux-mm@kvack.org
|
||||
W: http://www.linux-mm.org
|
||||
T: quilt https://ozlabs.org/~akpm/mmotm/
|
||||
T: quilt https://ozlabs.org/~akpm/mmots/
|
||||
T: git git://github.com/hnaz/linux-mm.git
|
||||
S: Maintained
|
||||
F: include/linux/mm.h
|
||||
F: include/linux/gfp.h
|
||||
|
@ -11408,7 +11412,6 @@ F: include/trace/events/tcp.h
|
|||
NETWORKING [TLS]
|
||||
M: Boris Pismenny <borisp@mellanox.com>
|
||||
M: Aviad Yehezkel <aviadye@mellanox.com>
|
||||
M: Dave Watson <davejwatson@fb.com>
|
||||
M: John Fastabend <john.fastabend@gmail.com>
|
||||
M: Daniel Borkmann <daniel@iogearbox.net>
|
||||
M: Jakub Kicinski <jakub.kicinski@netronome.com>
|
||||
|
@ -13906,7 +13909,7 @@ F: drivers/mtd/nand/raw/r852.h
|
|||
|
||||
RISC-V ARCHITECTURE
|
||||
M: Paul Walmsley <paul.walmsley@sifive.com>
|
||||
M: Palmer Dabbelt <palmer@sifive.com>
|
||||
M: Palmer Dabbelt <palmer@dabbelt.com>
|
||||
M: Albert Ou <aou@eecs.berkeley.edu>
|
||||
L: linux-riscv@lists.infradead.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git
|
||||
|
@ -14783,7 +14786,7 @@ F: drivers/media/usb/siano/
|
|||
F: drivers/media/mmc/siano/
|
||||
|
||||
SIFIVE DRIVERS
|
||||
M: Palmer Dabbelt <palmer@sifive.com>
|
||||
M: Palmer Dabbelt <palmer@dabbelt.com>
|
||||
M: Paul Walmsley <paul.walmsley@sifive.com>
|
||||
L: linux-riscv@lists.infradead.org
|
||||
T: git git://github.com/sifive/riscv-linux.git
|
||||
|
@ -14793,7 +14796,7 @@ N: sifive
|
|||
|
||||
SIFIVE FU540 SYSTEM-ON-CHIP
|
||||
M: Paul Walmsley <paul.walmsley@sifive.com>
|
||||
M: Palmer Dabbelt <palmer@sifive.com>
|
||||
M: Palmer Dabbelt <palmer@dabbelt.com>
|
||||
L: linux-riscv@lists.infradead.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/pjw/sifive.git
|
||||
S: Supported
|
||||
|
@ -17335,6 +17338,12 @@ F: include/linux/vbox_utils.h
|
|||
F: include/uapi/linux/vbox*.h
|
||||
F: drivers/virt/vboxguest/
|
||||
|
||||
VIRTUAL BOX SHARED FOLDER VFS DRIVER:
|
||||
M: Hans de Goede <hdegoede@redhat.com>
|
||||
L: linux-fsdevel@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/staging/vboxsf/*
|
||||
|
||||
VIRTUAL SERIO DEVICE DRIVER
|
||||
M: Stephen Chandler Paul <thatslyude@gmail.com>
|
||||
S: Maintained
|
||||
|
@ -18035,6 +18044,7 @@ F: Documentation/vm/zsmalloc.rst
|
|||
ZSWAP COMPRESSED SWAP CACHING
|
||||
M: Seth Jennings <sjenning@redhat.com>
|
||||
M: Dan Streetman <ddstreet@ieee.org>
|
||||
M: Vitaly Wool <vitaly.wool@konsulko.com>
|
||||
L: linux-mm@kvack.org
|
||||
S: Maintained
|
||||
F: mm/zswap.c
|
||||
|
|
2
Makefile
2
Makefile
|
@ -2,7 +2,7 @@
|
|||
VERSION = 5
|
||||
PATCHLEVEL = 4
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc5
|
||||
EXTRAVERSION = -rc7
|
||||
NAME = Kleptomaniac Octopus
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
|
@ -65,6 +65,14 @@
|
|||
clock-frequency = <33333333>;
|
||||
};
|
||||
|
||||
reg_5v0: regulator-5v0 {
|
||||
compatible = "regulator-fixed";
|
||||
|
||||
regulator-name = "5v0-supply";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
};
|
||||
|
||||
cpu_intc: cpu-interrupt-controller {
|
||||
compatible = "snps,archs-intc";
|
||||
interrupt-controller;
|
||||
|
@ -264,6 +272,21 @@
|
|||
clocks = <&input_clk>;
|
||||
cs-gpios = <&creg_gpio 0 GPIO_ACTIVE_LOW>,
|
||||
<&creg_gpio 1 GPIO_ACTIVE_LOW>;
|
||||
|
||||
spi-flash@0 {
|
||||
compatible = "sst26wf016b", "jedec,spi-nor";
|
||||
reg = <0>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
spi-max-frequency = <4000000>;
|
||||
};
|
||||
|
||||
adc@1 {
|
||||
compatible = "ti,adc108s102";
|
||||
reg = <1>;
|
||||
vref-supply = <®_5v0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
};
|
||||
};
|
||||
|
||||
creg_gpio: gpio@14b0 {
|
||||
|
|
|
@ -32,6 +32,8 @@ CONFIG_INET=y
|
|||
CONFIG_DEVTMPFS=y
|
||||
# CONFIG_STANDALONE is not set
|
||||
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_SPI_NOR=y
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_NETDEVICES=y
|
||||
|
@ -55,6 +57,8 @@ CONFIG_GPIO_SYSFS=y
|
|||
CONFIG_GPIO_DWAPB=y
|
||||
CONFIG_GPIO_SNPS_CREG=y
|
||||
# CONFIG_HWMON is not set
|
||||
CONFIG_REGULATOR=y
|
||||
CONFIG_REGULATOR_FIXED_VOLTAGE=y
|
||||
CONFIG_DRM=y
|
||||
# CONFIG_DRM_FBDEV_EMULATION is not set
|
||||
CONFIG_DRM_UDL=y
|
||||
|
@ -72,6 +76,8 @@ CONFIG_MMC_SDHCI_PLTFM=y
|
|||
CONFIG_MMC_DW=y
|
||||
CONFIG_DMADEVICES=y
|
||||
CONFIG_DW_AXI_DMAC=y
|
||||
CONFIG_IIO=y
|
||||
CONFIG_TI_ADC108S102=y
|
||||
CONFIG_EXT3_FS=y
|
||||
CONFIG_VFAT_FS=y
|
||||
CONFIG_TMPFS=y
|
||||
|
|
|
@ -614,8 +614,8 @@ static int arc_pmu_device_probe(struct platform_device *pdev)
|
|||
/* loop thru all available h/w condition indexes */
|
||||
for (i = 0; i < cc_bcr.c; i++) {
|
||||
write_aux_reg(ARC_REG_CC_INDEX, i);
|
||||
cc_name.indiv.word0 = read_aux_reg(ARC_REG_CC_NAME0);
|
||||
cc_name.indiv.word1 = read_aux_reg(ARC_REG_CC_NAME1);
|
||||
cc_name.indiv.word0 = le32_to_cpu(read_aux_reg(ARC_REG_CC_NAME0));
|
||||
cc_name.indiv.word1 = le32_to_cpu(read_aux_reg(ARC_REG_CC_NAME1));
|
||||
|
||||
arc_pmu_map_hw_event(i, cc_name.str);
|
||||
arc_pmu_add_raw_event_attr(i, cc_name.str);
|
||||
|
|
|
@ -328,6 +328,10 @@
|
|||
pinctrl-0 = <&pinctrl_pwm3>;
|
||||
};
|
||||
|
||||
&snvs_pwrkey {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&ssi2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
@ -230,6 +230,8 @@
|
|||
accelerometer@1c {
|
||||
compatible = "fsl,mma8451";
|
||||
reg = <0x1c>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pinctrl_mma8451_int>;
|
||||
interrupt-parent = <&gpio6>;
|
||||
interrupts = <31 IRQ_TYPE_LEVEL_LOW>;
|
||||
};
|
||||
|
@ -628,6 +630,12 @@
|
|||
>;
|
||||
};
|
||||
|
||||
pinctrl_mma8451_int: mma8451intgrp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_EIM_BCLK__GPIO6_IO31 0xb0b1
|
||||
>;
|
||||
};
|
||||
|
||||
pinctrl_pwm3: pwm1grp {
|
||||
fsl,pins = <
|
||||
MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
|
||||
|
|
|
@ -183,14 +183,12 @@
|
|||
|
||||
ov5640: camera@3c {
|
||||
compatible = "ovti,ov5640";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&ov5640_pins>;
|
||||
reg = <0x3c>;
|
||||
clocks = <&clk_ext_camera>;
|
||||
clock-names = "xclk";
|
||||
DOVDD-supply = <&v2v8>;
|
||||
powerdown-gpios = <&stmfx_pinctrl 18 GPIO_ACTIVE_HIGH>;
|
||||
reset-gpios = <&stmfx_pinctrl 19 GPIO_ACTIVE_LOW>;
|
||||
powerdown-gpios = <&stmfx_pinctrl 18 (GPIO_ACTIVE_HIGH | GPIO_PUSH_PULL)>;
|
||||
reset-gpios = <&stmfx_pinctrl 19 (GPIO_ACTIVE_LOW | GPIO_PUSH_PULL)>;
|
||||
rotation = <180>;
|
||||
status = "okay";
|
||||
|
||||
|
@ -223,15 +221,8 @@
|
|||
|
||||
joystick_pins: joystick {
|
||||
pins = "gpio0", "gpio1", "gpio2", "gpio3", "gpio4";
|
||||
drive-push-pull;
|
||||
bias-pull-down;
|
||||
};
|
||||
|
||||
ov5640_pins: camera {
|
||||
pins = "agpio2", "agpio3"; /* stmfx pins 18 & 19 */
|
||||
drive-push-pull;
|
||||
output-low;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
@ -932,7 +932,7 @@
|
|||
interrupt-names = "int0", "int1";
|
||||
clocks = <&rcc CK_HSE>, <&rcc FDCAN_K>;
|
||||
clock-names = "hclk", "cclk";
|
||||
bosch,mram-cfg = <0x1400 0 0 32 0 0 2 2>;
|
||||
bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
@ -945,7 +945,7 @@
|
|||
interrupt-names = "int0", "int1";
|
||||
clocks = <&rcc CK_HSE>, <&rcc FDCAN_K>;
|
||||
clock-names = "hclk", "cclk";
|
||||
bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>;
|
||||
bosch,mram-cfg = <0x1400 0 0 32 0 0 2 2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
|
@ -192,6 +192,7 @@
|
|||
vqmmc-supply = <®_dldo1>;
|
||||
non-removable;
|
||||
wakeup-source;
|
||||
keep-power-in-suspend;
|
||||
status = "okay";
|
||||
|
||||
brcmf: wifi@1 {
|
||||
|
|
|
@ -481,14 +481,18 @@ static void sunxi_mc_smp_cpu_die(unsigned int l_cpu)
|
|||
static int sunxi_cpu_powerdown(unsigned int cpu, unsigned int cluster)
|
||||
{
|
||||
u32 reg;
|
||||
int gating_bit = cpu;
|
||||
|
||||
pr_debug("%s: cluster %u cpu %u\n", __func__, cluster, cpu);
|
||||
if (cpu >= SUNXI_CPUS_PER_CLUSTER || cluster >= SUNXI_NR_CLUSTERS)
|
||||
return -EINVAL;
|
||||
|
||||
if (is_a83t && cpu == 0)
|
||||
gating_bit = 4;
|
||||
|
||||
/* gate processor power */
|
||||
reg = readl(prcm_base + PRCM_PWROFF_GATING_REG(cluster));
|
||||
reg |= PRCM_PWROFF_GATING_REG_CORE(cpu);
|
||||
reg |= PRCM_PWROFF_GATING_REG_CORE(gating_bit);
|
||||
writel(reg, prcm_base + PRCM_PWROFF_GATING_REG(cluster));
|
||||
udelay(20);
|
||||
|
||||
|
|
|
@ -127,7 +127,7 @@
|
|||
status = "okay";
|
||||
|
||||
i2c-mux@77 {
|
||||
compatible = "nxp,pca9847";
|
||||
compatible = "nxp,pca9547";
|
||||
reg = <0x77>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
|
|
@ -394,7 +394,7 @@
|
|||
};
|
||||
|
||||
sdma2: dma-controller@302c0000 {
|
||||
compatible = "fsl,imx8mm-sdma", "fsl,imx7d-sdma";
|
||||
compatible = "fsl,imx8mm-sdma", "fsl,imx8mq-sdma";
|
||||
reg = <0x302c0000 0x10000>;
|
||||
interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clk IMX8MM_CLK_SDMA2_ROOT>,
|
||||
|
@ -405,7 +405,7 @@
|
|||
};
|
||||
|
||||
sdma3: dma-controller@302b0000 {
|
||||
compatible = "fsl,imx8mm-sdma", "fsl,imx7d-sdma";
|
||||
compatible = "fsl,imx8mm-sdma", "fsl,imx8mq-sdma";
|
||||
reg = <0x302b0000 0x10000>;
|
||||
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clk IMX8MM_CLK_SDMA3_ROOT>,
|
||||
|
@ -737,7 +737,7 @@
|
|||
};
|
||||
|
||||
sdma1: dma-controller@30bd0000 {
|
||||
compatible = "fsl,imx8mm-sdma", "fsl,imx7d-sdma";
|
||||
compatible = "fsl,imx8mm-sdma", "fsl,imx8mq-sdma";
|
||||
reg = <0x30bd0000 0x10000>;
|
||||
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clk IMX8MM_CLK_SDMA1_ROOT>,
|
||||
|
|
|
@ -288,7 +288,7 @@
|
|||
};
|
||||
|
||||
sdma3: dma-controller@302b0000 {
|
||||
compatible = "fsl,imx8mn-sdma", "fsl,imx7d-sdma";
|
||||
compatible = "fsl,imx8mn-sdma", "fsl,imx8mq-sdma";
|
||||
reg = <0x302b0000 0x10000>;
|
||||
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clk IMX8MN_CLK_SDMA3_ROOT>,
|
||||
|
@ -299,7 +299,7 @@
|
|||
};
|
||||
|
||||
sdma2: dma-controller@302c0000 {
|
||||
compatible = "fsl,imx8mn-sdma", "fsl,imx7d-sdma";
|
||||
compatible = "fsl,imx8mn-sdma", "fsl,imx8mq-sdma";
|
||||
reg = <0x302c0000 0x10000>;
|
||||
interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clk IMX8MN_CLK_SDMA2_ROOT>,
|
||||
|
@ -612,7 +612,7 @@
|
|||
};
|
||||
|
||||
sdma1: dma-controller@30bd0000 {
|
||||
compatible = "fsl,imx8mn-sdma", "fsl,imx7d-sdma";
|
||||
compatible = "fsl,imx8mn-sdma", "fsl,imx8mq-sdma";
|
||||
reg = <0x30bd0000 0x10000>;
|
||||
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
|
||||
clocks = <&clk IMX8MN_CLK_SDMA1_ROOT>,
|
||||
|
|
|
@ -88,7 +88,7 @@
|
|||
regulator-name = "0V9_ARM";
|
||||
regulator-min-microvolt = <900000>;
|
||||
regulator-max-microvolt = <1000000>;
|
||||
gpios = <&gpio3 19 GPIO_ACTIVE_HIGH>;
|
||||
gpios = <&gpio3 16 GPIO_ACTIVE_HIGH>;
|
||||
states = <1000000 0x1
|
||||
900000 0x0>;
|
||||
regulator-always-on;
|
||||
|
|
|
@ -79,6 +79,7 @@
|
|||
#define CAVIUM_CPU_PART_THUNDERX_83XX 0x0A3
|
||||
#define CAVIUM_CPU_PART_THUNDERX2 0x0AF
|
||||
|
||||
#define BRCM_CPU_PART_BRAHMA_B53 0x100
|
||||
#define BRCM_CPU_PART_VULCAN 0x516
|
||||
|
||||
#define QCOM_CPU_PART_FALKOR_V1 0x800
|
||||
|
@ -105,6 +106,7 @@
|
|||
#define MIDR_THUNDERX_81XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_81XX)
|
||||
#define MIDR_THUNDERX_83XX MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX_83XX)
|
||||
#define MIDR_CAVIUM_THUNDERX2 MIDR_CPU_MODEL(ARM_CPU_IMP_CAVIUM, CAVIUM_CPU_PART_THUNDERX2)
|
||||
#define MIDR_BRAHMA_B53 MIDR_CPU_MODEL(ARM_CPU_IMP_BRCM, BRCM_CPU_PART_BRAHMA_B53)
|
||||
#define MIDR_BRCM_VULCAN MIDR_CPU_MODEL(ARM_CPU_IMP_BRCM, BRCM_CPU_PART_VULCAN)
|
||||
#define MIDR_QCOM_FALKOR_V1 MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_FALKOR_V1)
|
||||
#define MIDR_QCOM_FALKOR MIDR_CPU_MODEL(ARM_CPU_IMP_QCOM, QCOM_CPU_PART_FALKOR)
|
||||
|
|
|
@ -32,11 +32,11 @@
|
|||
#define PROT_DEFAULT (_PROT_DEFAULT | PTE_MAYBE_NG)
|
||||
#define PROT_SECT_DEFAULT (_PROT_SECT_DEFAULT | PMD_MAYBE_NG)
|
||||
|
||||
#define PROT_DEVICE_nGnRnE (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_WRITE | PTE_ATTRINDX(MT_DEVICE_nGnRnE))
|
||||
#define PROT_DEVICE_nGnRE (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_WRITE | PTE_ATTRINDX(MT_DEVICE_nGnRE))
|
||||
#define PROT_NORMAL_NC (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL_NC))
|
||||
#define PROT_NORMAL_WT (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL_WT))
|
||||
#define PROT_NORMAL (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_DIRTY | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL))
|
||||
#define PROT_DEVICE_nGnRnE (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_DEVICE_nGnRnE))
|
||||
#define PROT_DEVICE_nGnRE (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_DEVICE_nGnRE))
|
||||
#define PROT_NORMAL_NC (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL_NC))
|
||||
#define PROT_NORMAL_WT (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL_WT))
|
||||
#define PROT_NORMAL (PROT_DEFAULT | PTE_PXN | PTE_UXN | PTE_WRITE | PTE_ATTRINDX(MT_NORMAL))
|
||||
|
||||
#define PROT_SECT_DEVICE_nGnRE (PROT_SECT_DEFAULT | PMD_SECT_PXN | PMD_SECT_UXN | PMD_ATTRINDX(MT_DEVICE_nGnRE))
|
||||
#define PROT_SECT_NORMAL (PROT_SECT_DEFAULT | PMD_SECT_PXN | PMD_SECT_UXN | PMD_ATTRINDX(MT_NORMAL))
|
||||
|
@ -80,8 +80,9 @@
|
|||
#define PAGE_S2_DEVICE __pgprot(_PROT_DEFAULT | PAGE_S2_MEMATTR(DEVICE_nGnRE) | PTE_S2_RDONLY | PTE_S2_XN)
|
||||
|
||||
#define PAGE_NONE __pgprot(((_PAGE_DEFAULT) & ~PTE_VALID) | PTE_PROT_NONE | PTE_RDONLY | PTE_NG | PTE_PXN | PTE_UXN)
|
||||
#define PAGE_SHARED __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_UXN | PTE_WRITE)
|
||||
#define PAGE_SHARED_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_NG | PTE_PXN | PTE_WRITE)
|
||||
/* shared+writable pages are clean by default, hence PTE_RDONLY|PTE_WRITE */
|
||||
#define PAGE_SHARED __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_RDONLY | PTE_NG | PTE_PXN | PTE_UXN | PTE_WRITE)
|
||||
#define PAGE_SHARED_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_RDONLY | PTE_NG | PTE_PXN | PTE_WRITE)
|
||||
#define PAGE_READONLY __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_RDONLY | PTE_NG | PTE_PXN | PTE_UXN)
|
||||
#define PAGE_READONLY_EXEC __pgprot(_PAGE_DEFAULT | PTE_USER | PTE_RDONLY | PTE_NG | PTE_PXN)
|
||||
#define PAGE_EXECONLY __pgprot(_PAGE_DEFAULT | PTE_RDONLY | PTE_NG | PTE_PXN)
|
||||
|
|
|
@ -283,23 +283,6 @@ static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
|
|||
set_pte(ptep, pte);
|
||||
}
|
||||
|
||||
#define __HAVE_ARCH_PTE_SAME
|
||||
static inline int pte_same(pte_t pte_a, pte_t pte_b)
|
||||
{
|
||||
pteval_t lhs, rhs;
|
||||
|
||||
lhs = pte_val(pte_a);
|
||||
rhs = pte_val(pte_b);
|
||||
|
||||
if (pte_present(pte_a))
|
||||
lhs &= ~PTE_RDONLY;
|
||||
|
||||
if (pte_present(pte_b))
|
||||
rhs &= ~PTE_RDONLY;
|
||||
|
||||
return (lhs == rhs);
|
||||
}
|
||||
|
||||
/*
|
||||
* Huge pte definitions.
|
||||
*/
|
||||
|
|
|
@ -30,13 +30,6 @@ int __arm64_get_clock_mode(struct timekeeper *tk)
|
|||
}
|
||||
#define __arch_get_clock_mode __arm64_get_clock_mode
|
||||
|
||||
static __always_inline
|
||||
int __arm64_use_vsyscall(struct vdso_data *vdata)
|
||||
{
|
||||
return !vdata[CS_HRES_COARSE].clock_mode;
|
||||
}
|
||||
#define __arch_use_vsyscall __arm64_use_vsyscall
|
||||
|
||||
static __always_inline
|
||||
void __arm64_update_vsyscall(struct vdso_data *vdata, struct timekeeper *tk)
|
||||
{
|
||||
|
|
|
@ -489,6 +489,7 @@ static const struct midr_range arm64_ssb_cpus[] = {
|
|||
MIDR_ALL_VERSIONS(MIDR_CORTEX_A35),
|
||||
MIDR_ALL_VERSIONS(MIDR_CORTEX_A53),
|
||||
MIDR_ALL_VERSIONS(MIDR_CORTEX_A55),
|
||||
MIDR_ALL_VERSIONS(MIDR_BRAHMA_B53),
|
||||
{},
|
||||
};
|
||||
|
||||
|
@ -573,6 +574,7 @@ static const struct midr_range spectre_v2_safe_list[] = {
|
|||
MIDR_ALL_VERSIONS(MIDR_CORTEX_A35),
|
||||
MIDR_ALL_VERSIONS(MIDR_CORTEX_A53),
|
||||
MIDR_ALL_VERSIONS(MIDR_CORTEX_A55),
|
||||
MIDR_ALL_VERSIONS(MIDR_BRAHMA_B53),
|
||||
{ /* sentinel */ }
|
||||
};
|
||||
|
||||
|
@ -659,17 +661,23 @@ static const struct midr_range arm64_harden_el2_vectors[] = {
|
|||
#endif
|
||||
|
||||
#ifdef CONFIG_ARM64_WORKAROUND_REPEAT_TLBI
|
||||
|
||||
static const struct midr_range arm64_repeat_tlbi_cpus[] = {
|
||||
static const struct arm64_cpu_capabilities arm64_repeat_tlbi_list[] = {
|
||||
#ifdef CONFIG_QCOM_FALKOR_ERRATUM_1009
|
||||
MIDR_RANGE(MIDR_QCOM_FALKOR_V1, 0, 0, 0, 0),
|
||||
{
|
||||
ERRATA_MIDR_REV(MIDR_QCOM_FALKOR_V1, 0, 0)
|
||||
},
|
||||
{
|
||||
.midr_range.model = MIDR_QCOM_KRYO,
|
||||
.matches = is_kryo_midr,
|
||||
},
|
||||
#endif
|
||||
#ifdef CONFIG_ARM64_ERRATUM_1286807
|
||||
MIDR_RANGE(MIDR_CORTEX_A76, 0, 0, 3, 0),
|
||||
{
|
||||
ERRATA_MIDR_RANGE(MIDR_CORTEX_A76, 0, 0, 3, 0),
|
||||
},
|
||||
#endif
|
||||
{},
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CAVIUM_ERRATUM_27456
|
||||
|
@ -737,6 +745,33 @@ static const struct midr_range erratum_1418040_list[] = {
|
|||
};
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARM64_ERRATUM_845719
|
||||
static const struct midr_range erratum_845719_list[] = {
|
||||
/* Cortex-A53 r0p[01234] */
|
||||
MIDR_REV_RANGE(MIDR_CORTEX_A53, 0, 0, 4),
|
||||
/* Brahma-B53 r0p[0] */
|
||||
MIDR_REV(MIDR_BRAHMA_B53, 0, 0),
|
||||
{},
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_ARM64_ERRATUM_843419
|
||||
static const struct arm64_cpu_capabilities erratum_843419_list[] = {
|
||||
{
|
||||
/* Cortex-A53 r0p[01234] */
|
||||
.matches = is_affected_midr_range,
|
||||
ERRATA_MIDR_REV_RANGE(MIDR_CORTEX_A53, 0, 0, 4),
|
||||
MIDR_FIXED(0x4, BIT(8)),
|
||||
},
|
||||
{
|
||||
/* Brahma-B53 r0p[0] */
|
||||
.matches = is_affected_midr_range,
|
||||
ERRATA_MIDR_REV(MIDR_BRAHMA_B53, 0, 0),
|
||||
},
|
||||
{},
|
||||
};
|
||||
#endif
|
||||
|
||||
const struct arm64_cpu_capabilities arm64_errata[] = {
|
||||
#ifdef CONFIG_ARM64_WORKAROUND_CLEAN_CACHE
|
||||
{
|
||||
|
@ -768,19 +803,18 @@ const struct arm64_cpu_capabilities arm64_errata[] = {
|
|||
#endif
|
||||
#ifdef CONFIG_ARM64_ERRATUM_843419
|
||||
{
|
||||
/* Cortex-A53 r0p[01234] */
|
||||
.desc = "ARM erratum 843419",
|
||||
.capability = ARM64_WORKAROUND_843419,
|
||||
ERRATA_MIDR_REV_RANGE(MIDR_CORTEX_A53, 0, 0, 4),
|
||||
MIDR_FIXED(0x4, BIT(8)),
|
||||
.type = ARM64_CPUCAP_LOCAL_CPU_ERRATUM,
|
||||
.matches = cpucap_multi_entry_cap_matches,
|
||||
.match_list = erratum_843419_list,
|
||||
},
|
||||
#endif
|
||||
#ifdef CONFIG_ARM64_ERRATUM_845719
|
||||
{
|
||||
/* Cortex-A53 r0p[01234] */
|
||||
.desc = "ARM erratum 845719",
|
||||
.capability = ARM64_WORKAROUND_845719,
|
||||
ERRATA_MIDR_REV_RANGE(MIDR_CORTEX_A53, 0, 0, 4),
|
||||
ERRATA_MIDR_RANGE_LIST(erratum_845719_list),
|
||||
},
|
||||
#endif
|
||||
#ifdef CONFIG_CAVIUM_ERRATUM_23154
|
||||
|
@ -816,6 +850,7 @@ const struct arm64_cpu_capabilities arm64_errata[] = {
|
|||
{
|
||||
.desc = "Qualcomm Technologies Falkor/Kryo erratum 1003",
|
||||
.capability = ARM64_WORKAROUND_QCOM_FALKOR_E1003,
|
||||
.type = ARM64_CPUCAP_LOCAL_CPU_ERRATUM,
|
||||
.matches = cpucap_multi_entry_cap_matches,
|
||||
.match_list = qcom_erratum_1003_list,
|
||||
},
|
||||
|
@ -824,7 +859,9 @@ const struct arm64_cpu_capabilities arm64_errata[] = {
|
|||
{
|
||||
.desc = "Qualcomm erratum 1009, ARM erratum 1286807",
|
||||
.capability = ARM64_WORKAROUND_REPEAT_TLBI,
|
||||
ERRATA_MIDR_RANGE_LIST(arm64_repeat_tlbi_cpus),
|
||||
.type = ARM64_CPUCAP_LOCAL_CPU_ERRATUM,
|
||||
.matches = cpucap_multi_entry_cap_matches,
|
||||
.match_list = arm64_repeat_tlbi_list,
|
||||
},
|
||||
#endif
|
||||
#ifdef CONFIG_ARM64_ERRATUM_858921
|
||||
|
|
|
@ -28,13 +28,6 @@ int __mips_get_clock_mode(struct timekeeper *tk)
|
|||
}
|
||||
#define __arch_get_clock_mode __mips_get_clock_mode
|
||||
|
||||
static __always_inline
|
||||
int __mips_use_vsyscall(struct vdso_data *vdata)
|
||||
{
|
||||
return (vdata[CS_HRES_COARSE].clock_mode != VDSO_CLOCK_NONE);
|
||||
}
|
||||
#define __arch_use_vsyscall __mips_use_vsyscall
|
||||
|
||||
/* The asm-generic header needs to be included after the definitions above */
|
||||
#include <asm-generic/vdso/vsyscall.h>
|
||||
|
||||
|
|
|
@ -2125,7 +2125,7 @@ ftrace_regs_caller:
|
|||
copy %rp, %r26
|
||||
LDREG -FTRACE_FRAME_SIZE-PT_SZ_ALGN(%sp), %r25
|
||||
ldo -8(%r25), %r25
|
||||
copy %r3, %arg2
|
||||
ldo -FTRACE_FRAME_SIZE(%r1), %arg2
|
||||
b,l ftrace_function_trampoline, %rp
|
||||
copy %r1, %arg3 /* struct pt_regs */
|
||||
|
||||
|
|
|
@ -91,6 +91,7 @@
|
|||
|
||||
static inline void kuap_update_sr(u32 sr, u32 addr, u32 end)
|
||||
{
|
||||
addr &= 0xf0000000; /* align addr to start of segment */
|
||||
barrier(); /* make sure thread.kuap is updated before playing with SRs */
|
||||
while (addr < end) {
|
||||
mtsrin(sr, addr);
|
||||
|
|
|
@ -175,4 +175,7 @@ do { \
|
|||
ARCH_DLINFO_CACHE_GEOMETRY; \
|
||||
} while (0)
|
||||
|
||||
/* Relocate the kernel image to @final_address */
|
||||
void relocate(unsigned long final_address);
|
||||
|
||||
#endif /* _ASM_POWERPC_ELF_H */
|
||||
|
|
|
@ -3249,7 +3249,20 @@ static void setup_secure_guest(unsigned long kbase, unsigned long fdt)
|
|||
/* Switch to secure mode. */
|
||||
prom_printf("Switching to secure mode.\n");
|
||||
|
||||
/*
|
||||
* The ultravisor will do an integrity check of the kernel image but we
|
||||
* relocated it so the check will fail. Restore the original image by
|
||||
* relocating it back to the kernel virtual base address.
|
||||
*/
|
||||
if (IS_ENABLED(CONFIG_RELOCATABLE))
|
||||
relocate(KERNELBASE);
|
||||
|
||||
ret = enter_secure_mode(kbase, fdt);
|
||||
|
||||
/* Relocate the kernel again. */
|
||||
if (IS_ENABLED(CONFIG_RELOCATABLE))
|
||||
relocate(kbase);
|
||||
|
||||
if (ret != U_SUCCESS) {
|
||||
prom_printf("Returned %d from switching to secure mode.\n", ret);
|
||||
prom_rtas_os_term("Switch to secure mode failed.\n");
|
||||
|
|
|
@ -26,7 +26,8 @@ _end enter_prom $MEM_FUNCS reloc_offset __secondary_hold
|
|||
__secondary_hold_acknowledge __secondary_hold_spinloop __start
|
||||
logo_linux_clut224 btext_prepare_BAT
|
||||
reloc_got2 kernstart_addr memstart_addr linux_banner _stext
|
||||
__prom_init_toc_start __prom_init_toc_end btext_setup_display TOC."
|
||||
__prom_init_toc_start __prom_init_toc_end btext_setup_display TOC.
|
||||
relocate"
|
||||
|
||||
NM="$1"
|
||||
OBJ="$2"
|
||||
|
|
|
@ -1141,6 +1141,19 @@ struct bpf_prog *bpf_int_jit_compile(struct bpf_prog *fp)
|
|||
goto out_addrs;
|
||||
}
|
||||
|
||||
/*
|
||||
* If we have seen a tail call, we need a second pass.
|
||||
* This is because bpf_jit_emit_common_epilogue() is called
|
||||
* from bpf_jit_emit_tail_call() with a not yet stable ctx->seen.
|
||||
*/
|
||||
if (cgctx.seen & SEEN_TAILCALL) {
|
||||
cgctx.idx = 0;
|
||||
if (bpf_jit_build_body(fp, 0, &cgctx, addrs, false)) {
|
||||
fp = org_fp;
|
||||
goto out_addrs;
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
* Pretend to build prologue, given the features we've seen. This will
|
||||
* update ctgtx.idx as it pretends to output instructions, then we can
|
||||
|
|
|
@ -42,7 +42,7 @@ void pnv_pcibios_bus_add_device(struct pci_dev *pdev)
|
|||
{
|
||||
struct pci_dn *pdn = pci_get_pdn(pdev);
|
||||
|
||||
if (eeh_has_flag(EEH_FORCE_DISABLED))
|
||||
if (!pdn || eeh_has_flag(EEH_FORCE_DISABLED))
|
||||
return;
|
||||
|
||||
dev_dbg(&pdev->dev, "EEH: Setting up device\n");
|
||||
|
|
|
@ -146,20 +146,25 @@ static int pnv_smp_cpu_disable(void)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static void pnv_flush_interrupts(void)
|
||||
{
|
||||
if (cpu_has_feature(CPU_FTR_ARCH_300)) {
|
||||
if (xive_enabled())
|
||||
xive_flush_interrupt();
|
||||
else
|
||||
icp_opal_flush_interrupt();
|
||||
} else {
|
||||
icp_native_flush_interrupt();
|
||||
}
|
||||
}
|
||||
|
||||
static void pnv_smp_cpu_kill_self(void)
|
||||
{
|
||||
unsigned long srr1, unexpected_mask, wmask;
|
||||
unsigned int cpu;
|
||||
unsigned long srr1, wmask;
|
||||
u64 lpcr_val;
|
||||
|
||||
/* Standard hot unplug procedure */
|
||||
/*
|
||||
* This hard disables local interurpts, ensuring we have no lazy
|
||||
* irqs pending.
|
||||
*/
|
||||
WARN_ON(irqs_disabled());
|
||||
hard_irq_disable();
|
||||
WARN_ON(lazy_irq_pending());
|
||||
|
||||
idle_task_exit();
|
||||
current->active_mm = NULL; /* for sanity */
|
||||
|
@ -172,6 +177,27 @@ static void pnv_smp_cpu_kill_self(void)
|
|||
if (cpu_has_feature(CPU_FTR_ARCH_207S))
|
||||
wmask = SRR1_WAKEMASK_P8;
|
||||
|
||||
/*
|
||||
* This turns the irq soft-disabled state we're called with, into a
|
||||
* hard-disabled state with pending irq_happened interrupts cleared.
|
||||
*
|
||||
* PACA_IRQ_DEC - Decrementer should be ignored.
|
||||
* PACA_IRQ_HMI - Can be ignored, processing is done in real mode.
|
||||
* PACA_IRQ_DBELL, EE, PMI - Unexpected.
|
||||
*/
|
||||
hard_irq_disable();
|
||||
if (generic_check_cpu_restart(cpu))
|
||||
goto out;
|
||||
|
||||
unexpected_mask = ~(PACA_IRQ_DEC | PACA_IRQ_HMI | PACA_IRQ_HARD_DIS);
|
||||
if (local_paca->irq_happened & unexpected_mask) {
|
||||
if (local_paca->irq_happened & PACA_IRQ_EE)
|
||||
pnv_flush_interrupts();
|
||||
DBG("CPU%d Unexpected exit while offline irq_happened=%lx!\n",
|
||||
cpu, local_paca->irq_happened);
|
||||
}
|
||||
local_paca->irq_happened = PACA_IRQ_HARD_DIS;
|
||||
|
||||
/*
|
||||
* We don't want to take decrementer interrupts while we are
|
||||
* offline, so clear LPCR:PECE1. We keep PECE2 (and
|
||||
|
@ -197,6 +223,7 @@ static void pnv_smp_cpu_kill_self(void)
|
|||
|
||||
srr1 = pnv_cpu_offline(cpu);
|
||||
|
||||
WARN_ON_ONCE(!irqs_disabled());
|
||||
WARN_ON(lazy_irq_pending());
|
||||
|
||||
/*
|
||||
|
@ -212,13 +239,7 @@ static void pnv_smp_cpu_kill_self(void)
|
|||
*/
|
||||
if (((srr1 & wmask) == SRR1_WAKEEE) ||
|
||||
((srr1 & wmask) == SRR1_WAKEHVI)) {
|
||||
if (cpu_has_feature(CPU_FTR_ARCH_300)) {
|
||||
if (xive_enabled())
|
||||
xive_flush_interrupt();
|
||||
else
|
||||
icp_opal_flush_interrupt();
|
||||
} else
|
||||
icp_native_flush_interrupt();
|
||||
pnv_flush_interrupts();
|
||||
} else if ((srr1 & wmask) == SRR1_WAKEHDBELL) {
|
||||
unsigned long msg = PPC_DBELL_TYPE(PPC_DBELL_SERVER);
|
||||
asm volatile(PPC_MSGCLR(%0) : : "r" (msg));
|
||||
|
@ -266,7 +287,7 @@ static void pnv_smp_cpu_kill_self(void)
|
|||
*/
|
||||
lpcr_val = mfspr(SPRN_LPCR) | (u64)LPCR_PECE1;
|
||||
pnv_program_cpu_hotplug_lpcr(cpu, lpcr_val);
|
||||
|
||||
out:
|
||||
DBG("CPU%d coming online...\n", cpu);
|
||||
}
|
||||
|
||||
|
|
|
@ -13,6 +13,7 @@
|
|||
|
||||
#include <linux/types.h>
|
||||
#include <asm/mmiowb.h>
|
||||
#include <asm/pgtable.h>
|
||||
|
||||
extern void __iomem *ioremap(phys_addr_t offset, unsigned long size);
|
||||
|
||||
|
@ -161,6 +162,12 @@ static inline u64 __raw_readq(const volatile void __iomem *addr)
|
|||
#define writeq(v,c) ({ __io_bw(); writeq_cpu((v),(c)); __io_aw(); })
|
||||
#endif
|
||||
|
||||
/*
|
||||
* I/O port access constants.
|
||||
*/
|
||||
#define IO_SPACE_LIMIT (PCI_IO_SIZE - 1)
|
||||
#define PCI_IOBASE ((void __iomem *)PCI_IO_START)
|
||||
|
||||
/*
|
||||
* Emulation routines for the port-mapped IO space used by some PCI drivers.
|
||||
* These are defined as being "fully synchronous", but also "not guaranteed to
|
||||
|
|
|
@ -7,6 +7,9 @@
|
|||
#ifndef _ASM_RISCV_IRQ_H
|
||||
#define _ASM_RISCV_IRQ_H
|
||||
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/linkage.h>
|
||||
|
||||
#define NR_IRQS 0
|
||||
|
||||
void riscv_timer_interrupt(void);
|
||||
|
|
|
@ -7,6 +7,7 @@
|
|||
#define _ASM_RISCV_PGTABLE_H
|
||||
|
||||
#include <linux/mmzone.h>
|
||||
#include <linux/sizes.h>
|
||||
|
||||
#include <asm/pgtable-bits.h>
|
||||
|
||||
|
@ -86,6 +87,7 @@ extern pgd_t swapper_pg_dir[];
|
|||
#define VMALLOC_SIZE (KERN_VIRT_SIZE >> 1)
|
||||
#define VMALLOC_END (PAGE_OFFSET - 1)
|
||||
#define VMALLOC_START (PAGE_OFFSET - VMALLOC_SIZE)
|
||||
#define PCI_IO_SIZE SZ_16M
|
||||
|
||||
/*
|
||||
* Roughly size the vmemmap space to be large enough to fit enough
|
||||
|
@ -100,7 +102,10 @@ extern pgd_t swapper_pg_dir[];
|
|||
|
||||
#define vmemmap ((struct page *)VMEMMAP_START)
|
||||
|
||||
#define FIXADDR_TOP (VMEMMAP_START)
|
||||
#define PCI_IO_END VMEMMAP_START
|
||||
#define PCI_IO_START (PCI_IO_END - PCI_IO_SIZE)
|
||||
#define FIXADDR_TOP PCI_IO_START
|
||||
|
||||
#ifdef CONFIG_64BIT
|
||||
#define FIXADDR_SIZE PMD_SIZE
|
||||
#else
|
||||
|
|
|
@ -6,6 +6,7 @@
|
|||
#ifndef _ASM_RISCV_SWITCH_TO_H
|
||||
#define _ASM_RISCV_SWITCH_TO_H
|
||||
|
||||
#include <linux/sched/task_stack.h>
|
||||
#include <asm/processor.h>
|
||||
#include <asm/ptrace.h>
|
||||
#include <asm/csr.h>
|
||||
|
|
|
@ -10,6 +10,7 @@
|
|||
#include <asm/processor.h>
|
||||
#include <asm/hwcap.h>
|
||||
#include <asm/smp.h>
|
||||
#include <asm/switch_to.h>
|
||||
|
||||
unsigned long elf_hwcap __read_mostly;
|
||||
#ifdef CONFIG_FPU
|
||||
|
|
|
@ -0,0 +1,21 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
/*
|
||||
* Copyright (C) 2019 SiFive, Inc.
|
||||
*/
|
||||
#ifndef __ASM_HEAD_H
|
||||
#define __ASM_HEAD_H
|
||||
|
||||
#include <linux/linkage.h>
|
||||
#include <linux/init.h>
|
||||
|
||||
extern atomic_t hart_lottery;
|
||||
|
||||
asmlinkage void do_page_fault(struct pt_regs *regs);
|
||||
asmlinkage void __init setup_vm(uintptr_t dtb_pa);
|
||||
|
||||
extern void *__cpu_up_stack_pointer[];
|
||||
extern void *__cpu_up_task_pointer[];
|
||||
|
||||
void __init parse_dtb(void);
|
||||
|
||||
#endif /* __ASM_HEAD_H */
|
|
@ -24,7 +24,7 @@ int arch_show_interrupts(struct seq_file *p, int prec)
|
|||
return 0;
|
||||
}
|
||||
|
||||
asmlinkage void __irq_entry do_IRQ(struct pt_regs *regs)
|
||||
asmlinkage __visible void __irq_entry do_IRQ(struct pt_regs *regs)
|
||||
{
|
||||
struct pt_regs *old_regs = set_irq_regs(regs);
|
||||
|
||||
|
|
|
@ -8,6 +8,7 @@
|
|||
#include <linux/elf.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/moduleloader.h>
|
||||
|
||||
unsigned long module_emit_got_entry(struct module *mod, unsigned long val)
|
||||
{
|
||||
|
|
|
@ -7,6 +7,7 @@
|
|||
* Copyright (C) 2017 SiFive
|
||||
*/
|
||||
|
||||
#include <linux/cpu.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/sched/task_stack.h>
|
||||
|
@ -19,6 +20,7 @@
|
|||
#include <asm/csr.h>
|
||||
#include <asm/string.h>
|
||||
#include <asm/switch_to.h>
|
||||
#include <asm/thread_info.h>
|
||||
|
||||
extern asmlinkage void ret_from_fork(void);
|
||||
extern asmlinkage void ret_from_kernel_thread(void);
|
||||
|
|
|
@ -148,7 +148,7 @@ long arch_ptrace(struct task_struct *child, long request,
|
|||
* Allows PTRACE_SYSCALL to work. These are called from entry.S in
|
||||
* {handle,ret_from}_syscall.
|
||||
*/
|
||||
void do_syscall_trace_enter(struct pt_regs *regs)
|
||||
__visible void do_syscall_trace_enter(struct pt_regs *regs)
|
||||
{
|
||||
if (test_thread_flag(TIF_SYSCALL_TRACE))
|
||||
if (tracehook_report_syscall_entry(regs))
|
||||
|
@ -162,7 +162,7 @@ void do_syscall_trace_enter(struct pt_regs *regs)
|
|||
audit_syscall_entry(regs->a7, regs->a0, regs->a1, regs->a2, regs->a3);
|
||||
}
|
||||
|
||||
void do_syscall_trace_exit(struct pt_regs *regs)
|
||||
__visible void do_syscall_trace_exit(struct pt_regs *regs)
|
||||
{
|
||||
audit_syscall_exit(regs);
|
||||
|
||||
|
|
|
@ -4,6 +4,7 @@
|
|||
*/
|
||||
|
||||
#include <linux/reboot.h>
|
||||
#include <linux/pm.h>
|
||||
#include <asm/sbi.h>
|
||||
|
||||
static void default_power_off(void)
|
||||
|
|
|
@ -24,6 +24,8 @@
|
|||
#include <asm/tlbflush.h>
|
||||
#include <asm/thread_info.h>
|
||||
|
||||
#include "head.h"
|
||||
|
||||
#ifdef CONFIG_DUMMY_CONSOLE
|
||||
struct screen_info screen_info = {
|
||||
.orig_video_lines = 30,
|
||||
|
|
|
@ -26,7 +26,7 @@ struct rt_sigframe {
|
|||
|
||||
#ifdef CONFIG_FPU
|
||||
static long restore_fp_state(struct pt_regs *regs,
|
||||
union __riscv_fp_state *sc_fpregs)
|
||||
union __riscv_fp_state __user *sc_fpregs)
|
||||
{
|
||||
long err;
|
||||
struct __riscv_d_ext_state __user *state = &sc_fpregs->d;
|
||||
|
@ -53,7 +53,7 @@ static long restore_fp_state(struct pt_regs *regs,
|
|||
}
|
||||
|
||||
static long save_fp_state(struct pt_regs *regs,
|
||||
union __riscv_fp_state *sc_fpregs)
|
||||
union __riscv_fp_state __user *sc_fpregs)
|
||||
{
|
||||
long err;
|
||||
struct __riscv_d_ext_state __user *state = &sc_fpregs->d;
|
||||
|
@ -292,8 +292,8 @@ static void do_signal(struct pt_regs *regs)
|
|||
* notification of userspace execution resumption
|
||||
* - triggered by the _TIF_WORK_MASK flags
|
||||
*/
|
||||
asmlinkage void do_notify_resume(struct pt_regs *regs,
|
||||
unsigned long thread_info_flags)
|
||||
asmlinkage __visible void do_notify_resume(struct pt_regs *regs,
|
||||
unsigned long thread_info_flags)
|
||||
{
|
||||
/* Handle pending signal delivery */
|
||||
if (thread_info_flags & _TIF_SIGPENDING)
|
||||
|
|
|
@ -8,7 +8,9 @@
|
|||
* Copyright (C) 2017 SiFive
|
||||
*/
|
||||
|
||||
#include <linux/cpu.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/profile.h>
|
||||
#include <linux/smp.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/seq_file.h>
|
||||
|
|
|
@ -29,6 +29,9 @@
|
|||
#include <asm/tlbflush.h>
|
||||
#include <asm/sections.h>
|
||||
#include <asm/sbi.h>
|
||||
#include <asm/smp.h>
|
||||
|
||||
#include "head.h"
|
||||
|
||||
void *__cpu_up_stack_pointer[NR_CPUS];
|
||||
void *__cpu_up_task_pointer[NR_CPUS];
|
||||
|
@ -130,7 +133,7 @@ void __init smp_cpus_done(unsigned int max_cpus)
|
|||
/*
|
||||
* C entry point for a secondary processor.
|
||||
*/
|
||||
asmlinkage void __init smp_callin(void)
|
||||
asmlinkage __visible void __init smp_callin(void)
|
||||
{
|
||||
struct mm_struct *mm = &init_mm;
|
||||
|
||||
|
|
|
@ -8,6 +8,7 @@
|
|||
#include <linux/syscalls.h>
|
||||
#include <asm-generic/syscalls.h>
|
||||
#include <asm/vdso.h>
|
||||
#include <asm/syscall.h>
|
||||
|
||||
#undef __SYSCALL
|
||||
#define __SYSCALL(nr, call) [nr] = (call),
|
||||
|
|
|
@ -7,6 +7,7 @@
|
|||
#include <linux/clocksource.h>
|
||||
#include <linux/delay.h>
|
||||
#include <asm/sbi.h>
|
||||
#include <asm/processor.h>
|
||||
|
||||
unsigned long riscv_timebase;
|
||||
EXPORT_SYMBOL_GPL(riscv_timebase);
|
||||
|
|
|
@ -3,6 +3,7 @@
|
|||
* Copyright (C) 2012 Regents of the University of California
|
||||
*/
|
||||
|
||||
#include <linux/cpu.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/sched.h>
|
||||
|
@ -83,7 +84,7 @@ static void do_trap_error(struct pt_regs *regs, int signo, int code,
|
|||
}
|
||||
|
||||
#define DO_ERROR_INFO(name, signo, code, str) \
|
||||
asmlinkage void name(struct pt_regs *regs) \
|
||||
asmlinkage __visible void name(struct pt_regs *regs) \
|
||||
{ \
|
||||
do_trap_error(regs, signo, code, regs->sepc, "Oops - " str); \
|
||||
}
|
||||
|
@ -120,7 +121,7 @@ static inline unsigned long get_break_insn_length(unsigned long pc)
|
|||
return (((insn & __INSN_LENGTH_MASK) == __INSN_LENGTH_32) ? 4UL : 2UL);
|
||||
}
|
||||
|
||||
asmlinkage void do_trap_break(struct pt_regs *regs)
|
||||
asmlinkage __visible void do_trap_break(struct pt_regs *regs)
|
||||
{
|
||||
if (user_mode(regs))
|
||||
force_sig_fault(SIGTRAP, TRAP_BRKPT, (void __user *)regs->sepc);
|
||||
|
|
|
@ -6,6 +6,7 @@
|
|||
* Copyright (C) 2015 Regents of the University of California
|
||||
*/
|
||||
|
||||
#include <linux/elf.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/binfmts.h>
|
||||
|
@ -25,7 +26,7 @@ static union {
|
|||
struct vdso_data data;
|
||||
u8 page[PAGE_SIZE];
|
||||
} vdso_data_store __page_aligned_data;
|
||||
struct vdso_data *vdso_data = &vdso_data_store.data;
|
||||
static struct vdso_data *vdso_data = &vdso_data_store.data;
|
||||
|
||||
static int __init vdso_init(void)
|
||||
{
|
||||
|
|
|
@ -7,6 +7,7 @@
|
|||
#include <linux/mm.h>
|
||||
#include <asm/tlbflush.h>
|
||||
#include <asm/cacheflush.h>
|
||||
#include <asm/mmu_context.h>
|
||||
|
||||
/*
|
||||
* When necessary, performs a deferred icache flush for the given MM context,
|
||||
|
|
|
@ -18,6 +18,8 @@
|
|||
#include <asm/ptrace.h>
|
||||
#include <asm/tlbflush.h>
|
||||
|
||||
#include "../kernel/head.h"
|
||||
|
||||
/*
|
||||
* This routine handles page faults. It determines the address and the
|
||||
* problem, and then passes it off to one of the appropriate routines.
|
||||
|
|
|
@ -19,6 +19,8 @@
|
|||
#include <asm/pgtable.h>
|
||||
#include <asm/io.h>
|
||||
|
||||
#include "../kernel/head.h"
|
||||
|
||||
unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)]
|
||||
__page_aligned_bss;
|
||||
EXPORT_SYMBOL(empty_zero_page);
|
||||
|
@ -337,8 +339,7 @@ static uintptr_t __init best_map_size(phys_addr_t base, phys_addr_t size)
|
|||
*/
|
||||
|
||||
#ifndef __riscv_cmodel_medany
|
||||
#error "setup_vm() is called from head.S before relocate so it should "
|
||||
"not use absolute addressing."
|
||||
#error "setup_vm() is called from head.S before relocate so it should not use absolute addressing."
|
||||
#endif
|
||||
|
||||
asmlinkage void __init setup_vm(uintptr_t dtb_pa)
|
||||
|
|
|
@ -142,7 +142,7 @@ static irqreturn_t l2_int_handler(int irq, void *device)
|
|||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
int __init sifive_l2_init(void)
|
||||
static int __init sifive_l2_init(void)
|
||||
{
|
||||
struct device_node *np;
|
||||
struct resource res;
|
||||
|
|
|
@ -35,6 +35,7 @@ struct unwind_state {
|
|||
struct task_struct *task;
|
||||
struct pt_regs *regs;
|
||||
unsigned long sp, ip;
|
||||
bool reuse_sp;
|
||||
int graph_idx;
|
||||
bool reliable;
|
||||
bool error;
|
||||
|
|
|
@ -69,18 +69,26 @@ DEVICE_ATTR(idle_count, 0444, show_idle_count, NULL);
|
|||
static ssize_t show_idle_time(struct device *dev,
|
||||
struct device_attribute *attr, char *buf)
|
||||
{
|
||||
unsigned long long now, idle_time, idle_enter, idle_exit, in_idle;
|
||||
struct s390_idle_data *idle = &per_cpu(s390_idle, dev->id);
|
||||
unsigned long long now, idle_time, idle_enter, idle_exit;
|
||||
unsigned int seq;
|
||||
|
||||
do {
|
||||
now = get_tod_clock();
|
||||
seq = read_seqcount_begin(&idle->seqcount);
|
||||
idle_time = READ_ONCE(idle->idle_time);
|
||||
idle_enter = READ_ONCE(idle->clock_idle_enter);
|
||||
idle_exit = READ_ONCE(idle->clock_idle_exit);
|
||||
} while (read_seqcount_retry(&idle->seqcount, seq));
|
||||
idle_time += idle_enter ? ((idle_exit ? : now) - idle_enter) : 0;
|
||||
in_idle = 0;
|
||||
now = get_tod_clock();
|
||||
if (idle_enter) {
|
||||
if (idle_exit) {
|
||||
in_idle = idle_exit - idle_enter;
|
||||
} else if (now > idle_enter) {
|
||||
in_idle = now - idle_enter;
|
||||
}
|
||||
}
|
||||
idle_time += in_idle;
|
||||
return sprintf(buf, "%llu\n", idle_time >> 12);
|
||||
}
|
||||
DEVICE_ATTR(idle_time_us, 0444, show_idle_time, NULL);
|
||||
|
@ -88,17 +96,24 @@ DEVICE_ATTR(idle_time_us, 0444, show_idle_time, NULL);
|
|||
u64 arch_cpu_idle_time(int cpu)
|
||||
{
|
||||
struct s390_idle_data *idle = &per_cpu(s390_idle, cpu);
|
||||
unsigned long long now, idle_enter, idle_exit;
|
||||
unsigned long long now, idle_enter, idle_exit, in_idle;
|
||||
unsigned int seq;
|
||||
|
||||
do {
|
||||
now = get_tod_clock();
|
||||
seq = read_seqcount_begin(&idle->seqcount);
|
||||
idle_enter = READ_ONCE(idle->clock_idle_enter);
|
||||
idle_exit = READ_ONCE(idle->clock_idle_exit);
|
||||
} while (read_seqcount_retry(&idle->seqcount, seq));
|
||||
|
||||
return cputime_to_nsecs(idle_enter ? ((idle_exit ?: now) - idle_enter) : 0);
|
||||
in_idle = 0;
|
||||
now = get_tod_clock();
|
||||
if (idle_enter) {
|
||||
if (idle_exit) {
|
||||
in_idle = idle_exit - idle_enter;
|
||||
} else if (now > idle_enter) {
|
||||
in_idle = now - idle_enter;
|
||||
}
|
||||
}
|
||||
return cputime_to_nsecs(in_idle);
|
||||
}
|
||||
|
||||
void arch_cpu_idle_enter(void)
|
||||
|
|
|
@ -46,10 +46,15 @@ bool unwind_next_frame(struct unwind_state *state)
|
|||
|
||||
regs = state->regs;
|
||||
if (unlikely(regs)) {
|
||||
sp = READ_ONCE_NOCHECK(regs->gprs[15]);
|
||||
if (unlikely(outside_of_stack(state, sp))) {
|
||||
if (!update_stack_info(state, sp))
|
||||
goto out_err;
|
||||
if (state->reuse_sp) {
|
||||
sp = state->sp;
|
||||
state->reuse_sp = false;
|
||||
} else {
|
||||
sp = READ_ONCE_NOCHECK(regs->gprs[15]);
|
||||
if (unlikely(outside_of_stack(state, sp))) {
|
||||
if (!update_stack_info(state, sp))
|
||||
goto out_err;
|
||||
}
|
||||
}
|
||||
sf = (struct stack_frame *) sp;
|
||||
ip = READ_ONCE_NOCHECK(sf->gprs[8]);
|
||||
|
@ -107,9 +112,9 @@ void __unwind_start(struct unwind_state *state, struct task_struct *task,
|
|||
{
|
||||
struct stack_info *info = &state->stack_info;
|
||||
unsigned long *mask = &state->stack_mask;
|
||||
bool reliable, reuse_sp;
|
||||
struct stack_frame *sf;
|
||||
unsigned long ip;
|
||||
bool reliable;
|
||||
|
||||
memset(state, 0, sizeof(*state));
|
||||
state->task = task;
|
||||
|
@ -134,10 +139,12 @@ void __unwind_start(struct unwind_state *state, struct task_struct *task,
|
|||
if (regs) {
|
||||
ip = READ_ONCE_NOCHECK(regs->psw.addr);
|
||||
reliable = true;
|
||||
reuse_sp = true;
|
||||
} else {
|
||||
sf = (struct stack_frame *) sp;
|
||||
ip = READ_ONCE_NOCHECK(sf->gprs[8]);
|
||||
reliable = false;
|
||||
reuse_sp = false;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_FUNCTION_GRAPH_TRACER
|
||||
|
@ -151,5 +158,6 @@ void __unwind_start(struct unwind_state *state, struct task_struct *task,
|
|||
state->sp = sp;
|
||||
state->ip = ip;
|
||||
state->reliable = reliable;
|
||||
state->reuse_sp = reuse_sp;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(__unwind_start);
|
||||
|
|
|
@ -298,16 +298,16 @@ static int cmm_timeout_handler(struct ctl_table *ctl, int write,
|
|||
}
|
||||
|
||||
if (write) {
|
||||
len = *lenp;
|
||||
if (copy_from_user(buf, buffer,
|
||||
len > sizeof(buf) ? sizeof(buf) : len))
|
||||
len = min(*lenp, sizeof(buf));
|
||||
if (copy_from_user(buf, buffer, len))
|
||||
return -EFAULT;
|
||||
buf[sizeof(buf) - 1] = '\0';
|
||||
buf[len - 1] = '\0';
|
||||
cmm_skip_blanks(buf, &p);
|
||||
nr = simple_strtoul(p, &p, 0);
|
||||
cmm_skip_blanks(p, &p);
|
||||
seconds = simple_strtoul(p, &p, 0);
|
||||
cmm_set_timeout(nr, seconds);
|
||||
*ppos += *lenp;
|
||||
} else {
|
||||
len = sprintf(buf, "%ld %ld\n",
|
||||
cmm_timeout_pages, cmm_timeout_seconds);
|
||||
|
@ -315,9 +315,9 @@ static int cmm_timeout_handler(struct ctl_table *ctl, int write,
|
|||
len = *lenp;
|
||||
if (copy_to_user(buffer, buf, len))
|
||||
return -EFAULT;
|
||||
*lenp = len;
|
||||
*ppos += len;
|
||||
}
|
||||
*lenp = len;
|
||||
*ppos += len;
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -1403,8 +1403,12 @@ static blk_status_t ubd_queue_rq(struct blk_mq_hw_ctx *hctx,
|
|||
|
||||
spin_unlock_irq(&ubd_dev->lock);
|
||||
|
||||
if (ret < 0)
|
||||
blk_mq_requeue_request(req, true);
|
||||
if (ret < 0) {
|
||||
if (ret == -ENOMEM)
|
||||
res = BLK_STS_RESOURCE;
|
||||
else
|
||||
res = BLK_STS_DEV_RESOURCE;
|
||||
}
|
||||
|
||||
return res;
|
||||
}
|
||||
|
|
|
@ -13,6 +13,7 @@
|
|||
#include <asm/e820/types.h>
|
||||
#include <asm/setup.h>
|
||||
#include <asm/desc.h>
|
||||
#include <asm/boot.h>
|
||||
|
||||
#include "../string.h"
|
||||
#include "eboot.h"
|
||||
|
@ -813,7 +814,8 @@ efi_main(struct efi_config *c, struct boot_params *boot_params)
|
|||
status = efi_relocate_kernel(sys_table, &bzimage_addr,
|
||||
hdr->init_size, hdr->init_size,
|
||||
hdr->pref_address,
|
||||
hdr->kernel_alignment);
|
||||
hdr->kernel_alignment,
|
||||
LOAD_PHYSICAL_ADDR);
|
||||
if (status != EFI_SUCCESS) {
|
||||
efi_printk(sys_table, "efi_relocate_kernel() failed!\n");
|
||||
goto fail;
|
||||
|
|
|
@ -377,7 +377,8 @@ static inline void perf_ibs_disable_event(struct perf_ibs *perf_ibs,
|
|||
struct hw_perf_event *hwc, u64 config)
|
||||
{
|
||||
config &= ~perf_ibs->cnt_mask;
|
||||
wrmsrl(hwc->config_base, config);
|
||||
if (boot_cpu_data.x86 == 0x10)
|
||||
wrmsrl(hwc->config_base, config);
|
||||
config &= ~perf_ibs->enable_mask;
|
||||
wrmsrl(hwc->config_base, config);
|
||||
}
|
||||
|
@ -553,7 +554,8 @@ static struct perf_ibs perf_ibs_op = {
|
|||
},
|
||||
.msr = MSR_AMD64_IBSOPCTL,
|
||||
.config_mask = IBS_OP_CONFIG_MASK,
|
||||
.cnt_mask = IBS_OP_MAX_CNT,
|
||||
.cnt_mask = IBS_OP_MAX_CNT | IBS_OP_CUR_CNT |
|
||||
IBS_OP_CUR_CNT_RAND,
|
||||
.enable_mask = IBS_OP_ENABLE,
|
||||
.valid_mask = IBS_OP_VAL,
|
||||
.max_period = IBS_OP_MAX_CNT << 4,
|
||||
|
@ -614,7 +616,7 @@ fail:
|
|||
if (event->attr.sample_type & PERF_SAMPLE_RAW)
|
||||
offset_max = perf_ibs->offset_max;
|
||||
else if (check_rip)
|
||||
offset_max = 2;
|
||||
offset_max = 3;
|
||||
else
|
||||
offset_max = 1;
|
||||
do {
|
||||
|
|
|
@ -502,10 +502,8 @@ void uncore_pmu_event_start(struct perf_event *event, int flags)
|
|||
local64_set(&event->hw.prev_count, uncore_read_counter(box, event));
|
||||
uncore_enable_event(box, event);
|
||||
|
||||
if (box->n_active == 1) {
|
||||
uncore_enable_box(box);
|
||||
if (box->n_active == 1)
|
||||
uncore_pmu_start_hrtimer(box);
|
||||
}
|
||||
}
|
||||
|
||||
void uncore_pmu_event_stop(struct perf_event *event, int flags)
|
||||
|
@ -529,10 +527,8 @@ void uncore_pmu_event_stop(struct perf_event *event, int flags)
|
|||
WARN_ON_ONCE(hwc->state & PERF_HES_STOPPED);
|
||||
hwc->state |= PERF_HES_STOPPED;
|
||||
|
||||
if (box->n_active == 0) {
|
||||
uncore_disable_box(box);
|
||||
if (box->n_active == 0)
|
||||
uncore_pmu_cancel_hrtimer(box);
|
||||
}
|
||||
}
|
||||
|
||||
if ((flags & PERF_EF_UPDATE) && !(hwc->state & PERF_HES_UPTODATE)) {
|
||||
|
@ -778,6 +774,40 @@ static int uncore_pmu_event_init(struct perf_event *event)
|
|||
return ret;
|
||||
}
|
||||
|
||||
static void uncore_pmu_enable(struct pmu *pmu)
|
||||
{
|
||||
struct intel_uncore_pmu *uncore_pmu;
|
||||
struct intel_uncore_box *box;
|
||||
|
||||
uncore_pmu = container_of(pmu, struct intel_uncore_pmu, pmu);
|
||||
if (!uncore_pmu)
|
||||
return;
|
||||
|
||||
box = uncore_pmu_to_box(uncore_pmu, smp_processor_id());
|
||||
if (!box)
|
||||
return;
|
||||
|
||||
if (uncore_pmu->type->ops->enable_box)
|
||||
uncore_pmu->type->ops->enable_box(box);
|
||||
}
|
||||
|
||||
static void uncore_pmu_disable(struct pmu *pmu)
|
||||
{
|
||||
struct intel_uncore_pmu *uncore_pmu;
|
||||
struct intel_uncore_box *box;
|
||||
|
||||
uncore_pmu = container_of(pmu, struct intel_uncore_pmu, pmu);
|
||||
if (!uncore_pmu)
|
||||
return;
|
||||
|
||||
box = uncore_pmu_to_box(uncore_pmu, smp_processor_id());
|
||||
if (!box)
|
||||
return;
|
||||
|
||||
if (uncore_pmu->type->ops->disable_box)
|
||||
uncore_pmu->type->ops->disable_box(box);
|
||||
}
|
||||
|
||||
static ssize_t uncore_get_attr_cpumask(struct device *dev,
|
||||
struct device_attribute *attr, char *buf)
|
||||
{
|
||||
|
@ -803,6 +833,8 @@ static int uncore_pmu_register(struct intel_uncore_pmu *pmu)
|
|||
pmu->pmu = (struct pmu) {
|
||||
.attr_groups = pmu->type->attr_groups,
|
||||
.task_ctx_nr = perf_invalid_context,
|
||||
.pmu_enable = uncore_pmu_enable,
|
||||
.pmu_disable = uncore_pmu_disable,
|
||||
.event_init = uncore_pmu_event_init,
|
||||
.add = uncore_pmu_event_add,
|
||||
.del = uncore_pmu_event_del,
|
||||
|
|
|
@ -441,18 +441,6 @@ static inline int uncore_freerunning_hw_config(struct intel_uncore_box *box,
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
static inline void uncore_disable_box(struct intel_uncore_box *box)
|
||||
{
|
||||
if (box->pmu->type->ops->disable_box)
|
||||
box->pmu->type->ops->disable_box(box);
|
||||
}
|
||||
|
||||
static inline void uncore_enable_box(struct intel_uncore_box *box)
|
||||
{
|
||||
if (box->pmu->type->ops->enable_box)
|
||||
box->pmu->type->ops->enable_box(box);
|
||||
}
|
||||
|
||||
static inline void uncore_disable_event(struct intel_uncore_box *box,
|
||||
struct perf_event *event)
|
||||
{
|
||||
|
|
|
@ -1586,9 +1586,6 @@ static void setup_local_APIC(void)
|
|||
{
|
||||
int cpu = smp_processor_id();
|
||||
unsigned int value;
|
||||
#ifdef CONFIG_X86_32
|
||||
int logical_apicid, ldr_apicid;
|
||||
#endif
|
||||
|
||||
if (disable_apic) {
|
||||
disable_ioapic_support();
|
||||
|
@ -1626,16 +1623,21 @@ static void setup_local_APIC(void)
|
|||
apic->init_apic_ldr();
|
||||
|
||||
#ifdef CONFIG_X86_32
|
||||
/*
|
||||
* APIC LDR is initialized. If logical_apicid mapping was
|
||||
* initialized during get_smp_config(), make sure it matches the
|
||||
* actual value.
|
||||
*/
|
||||
logical_apicid = early_per_cpu(x86_cpu_to_logical_apicid, cpu);
|
||||
ldr_apicid = GET_APIC_LOGICAL_ID(apic_read(APIC_LDR));
|
||||
WARN_ON(logical_apicid != BAD_APICID && logical_apicid != ldr_apicid);
|
||||
/* always use the value from LDR */
|
||||
early_per_cpu(x86_cpu_to_logical_apicid, cpu) = ldr_apicid;
|
||||
if (apic->dest_logical) {
|
||||
int logical_apicid, ldr_apicid;
|
||||
|
||||
/*
|
||||
* APIC LDR is initialized. If logical_apicid mapping was
|
||||
* initialized during get_smp_config(), make sure it matches
|
||||
* the actual value.
|
||||
*/
|
||||
logical_apicid = early_per_cpu(x86_cpu_to_logical_apicid, cpu);
|
||||
ldr_apicid = GET_APIC_LOGICAL_ID(apic_read(APIC_LDR));
|
||||
if (logical_apicid != BAD_APICID)
|
||||
WARN_ON(logical_apicid != ldr_apicid);
|
||||
/* Always use the value from LDR. */
|
||||
early_per_cpu(x86_cpu_to_logical_apicid, cpu) = ldr_apicid;
|
||||
}
|
||||
#endif
|
||||
|
||||
/*
|
||||
|
|
|
@ -522,6 +522,10 @@ int rdtgroup_mondata_show(struct seq_file *m, void *arg)
|
|||
int ret = 0;
|
||||
|
||||
rdtgrp = rdtgroup_kn_lock_live(of->kn);
|
||||
if (!rdtgrp) {
|
||||
ret = -ENOENT;
|
||||
goto out;
|
||||
}
|
||||
|
||||
md.priv = of->kn->priv;
|
||||
resid = md.u.rid;
|
||||
|
|
|
@ -94,6 +94,13 @@ static bool in_exception_stack(unsigned long *stack, struct stack_info *info)
|
|||
BUILD_BUG_ON(N_EXCEPTION_STACKS != 6);
|
||||
|
||||
begin = (unsigned long)__this_cpu_read(cea_exception_stacks);
|
||||
/*
|
||||
* Handle the case where stack trace is collected _before_
|
||||
* cea_exception_stacks had been initialized.
|
||||
*/
|
||||
if (!begin)
|
||||
return false;
|
||||
|
||||
end = begin + sizeof(struct cea_exception_stacks);
|
||||
/* Bail if @stack is outside the exception stack area. */
|
||||
if (stk < begin || stk >= end)
|
||||
|
|
|
@ -1505,6 +1505,9 @@ void __init tsc_init(void)
|
|||
return;
|
||||
}
|
||||
|
||||
if (tsc_clocksource_reliable || no_tsc_watchdog)
|
||||
clocksource_tsc_early.flags &= ~CLOCK_SOURCE_MUST_VERIFY;
|
||||
|
||||
clocksource_register_khz(&clocksource_tsc_early, tsc_khz);
|
||||
detect_art();
|
||||
}
|
||||
|
|
|
@ -734,8 +734,14 @@ static int get_npt_level(struct kvm_vcpu *vcpu)
|
|||
static void svm_set_efer(struct kvm_vcpu *vcpu, u64 efer)
|
||||
{
|
||||
vcpu->arch.efer = efer;
|
||||
if (!npt_enabled && !(efer & EFER_LMA))
|
||||
efer &= ~EFER_LME;
|
||||
|
||||
if (!npt_enabled) {
|
||||
/* Shadow paging assumes NX to be available. */
|
||||
efer |= EFER_NX;
|
||||
|
||||
if (!(efer & EFER_LMA))
|
||||
efer &= ~EFER_LME;
|
||||
}
|
||||
|
||||
to_svm(vcpu)->vmcb->save.efer = efer | EFER_SVME;
|
||||
mark_dirty(to_svm(vcpu)->vmcb, VMCB_CR);
|
||||
|
|
|
@ -969,17 +969,9 @@ static bool update_transition_efer(struct vcpu_vmx *vmx, int efer_offset)
|
|||
u64 guest_efer = vmx->vcpu.arch.efer;
|
||||
u64 ignore_bits = 0;
|
||||
|
||||
if (!enable_ept) {
|
||||
/*
|
||||
* NX is needed to handle CR0.WP=1, CR4.SMEP=1. Testing
|
||||
* host CPUID is more efficient than testing guest CPUID
|
||||
* or CR4. Host SMEP is anyway a requirement for guest SMEP.
|
||||
*/
|
||||
if (boot_cpu_has(X86_FEATURE_SMEP))
|
||||
guest_efer |= EFER_NX;
|
||||
else if (!(guest_efer & EFER_NX))
|
||||
ignore_bits |= EFER_NX;
|
||||
}
|
||||
/* Shadow paging assumes NX to be available. */
|
||||
if (!enable_ept)
|
||||
guest_efer |= EFER_NX;
|
||||
|
||||
/*
|
||||
* LMA and LME handled by hardware; SCE meaningless outside long mode.
|
||||
|
|
|
@ -934,9 +934,14 @@ static int blkcg_print_stat(struct seq_file *sf, void *v)
|
|||
int i;
|
||||
bool has_stats = false;
|
||||
|
||||
spin_lock_irq(&blkg->q->queue_lock);
|
||||
|
||||
if (!blkg->online)
|
||||
goto skip;
|
||||
|
||||
dname = blkg_dev_name(blkg);
|
||||
if (!dname)
|
||||
continue;
|
||||
goto skip;
|
||||
|
||||
/*
|
||||
* Hooray string manipulation, count is the size written NOT
|
||||
|
@ -946,8 +951,6 @@ static int blkcg_print_stat(struct seq_file *sf, void *v)
|
|||
*/
|
||||
off += scnprintf(buf+off, size-off, "%s ", dname);
|
||||
|
||||
spin_lock_irq(&blkg->q->queue_lock);
|
||||
|
||||
blkg_rwstat_recursive_sum(blkg, NULL,
|
||||
offsetof(struct blkcg_gq, stat_bytes), &rwstat);
|
||||
rbytes = rwstat.cnt[BLKG_RWSTAT_READ];
|
||||
|
@ -960,8 +963,6 @@ static int blkcg_print_stat(struct seq_file *sf, void *v)
|
|||
wios = rwstat.cnt[BLKG_RWSTAT_WRITE];
|
||||
dios = rwstat.cnt[BLKG_RWSTAT_DISCARD];
|
||||
|
||||
spin_unlock_irq(&blkg->q->queue_lock);
|
||||
|
||||
if (rbytes || wbytes || rios || wios) {
|
||||
has_stats = true;
|
||||
off += scnprintf(buf+off, size-off,
|
||||
|
@ -999,6 +1000,8 @@ static int blkcg_print_stat(struct seq_file *sf, void *v)
|
|||
seq_commit(sf, -1);
|
||||
}
|
||||
}
|
||||
skip:
|
||||
spin_unlock_irq(&blkg->q->queue_lock);
|
||||
}
|
||||
|
||||
rcu_read_unlock();
|
||||
|
|
|
@ -2110,10 +2110,10 @@ static ssize_t ioc_weight_write(struct kernfs_open_file *of, char *buf,
|
|||
goto einval;
|
||||
}
|
||||
|
||||
spin_lock_irq(&iocg->ioc->lock);
|
||||
spin_lock(&iocg->ioc->lock);
|
||||
iocg->cfg_weight = v;
|
||||
weight_updated(iocg);
|
||||
spin_unlock_irq(&iocg->ioc->lock);
|
||||
spin_unlock(&iocg->ioc->lock);
|
||||
|
||||
blkg_conf_finish(&ctx);
|
||||
return nbytes;
|
||||
|
|
|
@ -159,26 +159,34 @@ void acpi_processor_ignore_ppc_init(void)
|
|||
|
||||
void acpi_processor_ppc_init(struct cpufreq_policy *policy)
|
||||
{
|
||||
int cpu = policy->cpu;
|
||||
struct acpi_processor *pr = per_cpu(processors, cpu);
|
||||
int ret;
|
||||
unsigned int cpu;
|
||||
|
||||
if (!pr)
|
||||
return;
|
||||
for_each_cpu(cpu, policy->related_cpus) {
|
||||
struct acpi_processor *pr = per_cpu(processors, cpu);
|
||||
int ret;
|
||||
|
||||
ret = freq_qos_add_request(&policy->constraints, &pr->perflib_req,
|
||||
FREQ_QOS_MAX, INT_MAX);
|
||||
if (ret < 0)
|
||||
pr_err("Failed to add freq constraint for CPU%d (%d)\n", cpu,
|
||||
ret);
|
||||
if (!pr)
|
||||
continue;
|
||||
|
||||
ret = freq_qos_add_request(&policy->constraints,
|
||||
&pr->perflib_req,
|
||||
FREQ_QOS_MAX, INT_MAX);
|
||||
if (ret < 0)
|
||||
pr_err("Failed to add freq constraint for CPU%d (%d)\n",
|
||||
cpu, ret);
|
||||
}
|
||||
}
|
||||
|
||||
void acpi_processor_ppc_exit(struct cpufreq_policy *policy)
|
||||
{
|
||||
struct acpi_processor *pr = per_cpu(processors, policy->cpu);
|
||||
unsigned int cpu;
|
||||
|
||||
if (pr)
|
||||
freq_qos_remove_request(&pr->perflib_req);
|
||||
for_each_cpu(cpu, policy->related_cpus) {
|
||||
struct acpi_processor *pr = per_cpu(processors, cpu);
|
||||
|
||||
if (pr)
|
||||
freq_qos_remove_request(&pr->perflib_req);
|
||||
}
|
||||
}
|
||||
|
||||
static int acpi_processor_get_performance_control(struct acpi_processor *pr)
|
||||
|
|
|
@ -127,26 +127,34 @@ static int cpufreq_set_cur_state(unsigned int cpu, int state)
|
|||
|
||||
void acpi_thermal_cpufreq_init(struct cpufreq_policy *policy)
|
||||
{
|
||||
int cpu = policy->cpu;
|
||||
struct acpi_processor *pr = per_cpu(processors, cpu);
|
||||
int ret;
|
||||
unsigned int cpu;
|
||||
|
||||
if (!pr)
|
||||
return;
|
||||
for_each_cpu(cpu, policy->related_cpus) {
|
||||
struct acpi_processor *pr = per_cpu(processors, cpu);
|
||||
int ret;
|
||||
|
||||
ret = freq_qos_add_request(&policy->constraints, &pr->thermal_req,
|
||||
FREQ_QOS_MAX, INT_MAX);
|
||||
if (ret < 0)
|
||||
pr_err("Failed to add freq constraint for CPU%d (%d)\n", cpu,
|
||||
ret);
|
||||
if (!pr)
|
||||
continue;
|
||||
|
||||
ret = freq_qos_add_request(&policy->constraints,
|
||||
&pr->thermal_req,
|
||||
FREQ_QOS_MAX, INT_MAX);
|
||||
if (ret < 0)
|
||||
pr_err("Failed to add freq constraint for CPU%d (%d)\n",
|
||||
cpu, ret);
|
||||
}
|
||||
}
|
||||
|
||||
void acpi_thermal_cpufreq_exit(struct cpufreq_policy *policy)
|
||||
{
|
||||
struct acpi_processor *pr = per_cpu(processors, policy->cpu);
|
||||
unsigned int cpu;
|
||||
|
||||
if (pr)
|
||||
freq_qos_remove_request(&pr->thermal_req);
|
||||
for_each_cpu(cpu, policy->related_cpus) {
|
||||
struct acpi_processor *pr = per_cpu(processors, policy->cpu);
|
||||
|
||||
if (pr)
|
||||
freq_qos_remove_request(&pr->thermal_req);
|
||||
}
|
||||
}
|
||||
#else /* ! CONFIG_CPU_FREQ */
|
||||
static int cpufreq_get_max_state(unsigned int cpu)
|
||||
|
|
|
@ -786,7 +786,6 @@ int __drbd_send_protocol(struct drbd_connection *connection, enum drbd_packet cm
|
|||
|
||||
if (nc->tentative && connection->agreed_pro_version < 92) {
|
||||
rcu_read_unlock();
|
||||
mutex_unlock(&sock->mutex);
|
||||
drbd_err(connection, "--dry-run is not supported by peer");
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
|
|
|
@ -297,7 +297,10 @@ static int clk_main_probe_frequency(struct regmap *regmap)
|
|||
regmap_read(regmap, AT91_CKGR_MCFR, &mcfr);
|
||||
if (mcfr & AT91_PMC_MAINRDY)
|
||||
return 0;
|
||||
usleep_range(MAINF_LOOP_MIN_WAIT, MAINF_LOOP_MAX_WAIT);
|
||||
if (system_state < SYSTEM_RUNNING)
|
||||
udelay(MAINF_LOOP_MIN_WAIT);
|
||||
else
|
||||
usleep_range(MAINF_LOOP_MIN_WAIT, MAINF_LOOP_MAX_WAIT);
|
||||
} while (time_before(prep_time, timeout));
|
||||
|
||||
return -ETIMEDOUT;
|
||||
|
|
|
@ -43,6 +43,7 @@ static const struct clk_pll_characteristics upll_characteristics = {
|
|||
};
|
||||
|
||||
static const struct clk_programmable_layout sam9x60_programmable_layout = {
|
||||
.pres_mask = 0xff,
|
||||
.pres_shift = 8,
|
||||
.css_mask = 0x1f,
|
||||
.have_slck_mck = 0,
|
||||
|
|
|
@ -76,7 +76,10 @@ static int clk_slow_osc_prepare(struct clk_hw *hw)
|
|||
|
||||
writel(tmp | osc->bits->cr_osc32en, sckcr);
|
||||
|
||||
usleep_range(osc->startup_usec, osc->startup_usec + 1);
|
||||
if (system_state < SYSTEM_RUNNING)
|
||||
udelay(osc->startup_usec);
|
||||
else
|
||||
usleep_range(osc->startup_usec, osc->startup_usec + 1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -187,7 +190,10 @@ static int clk_slow_rc_osc_prepare(struct clk_hw *hw)
|
|||
|
||||
writel(readl(sckcr) | osc->bits->cr_rcen, sckcr);
|
||||
|
||||
usleep_range(osc->startup_usec, osc->startup_usec + 1);
|
||||
if (system_state < SYSTEM_RUNNING)
|
||||
udelay(osc->startup_usec);
|
||||
else
|
||||
usleep_range(osc->startup_usec, osc->startup_usec + 1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -288,7 +294,10 @@ static int clk_sam9x5_slow_set_parent(struct clk_hw *hw, u8 index)
|
|||
|
||||
writel(tmp, sckcr);
|
||||
|
||||
usleep_range(SLOWCK_SW_TIME_USEC, SLOWCK_SW_TIME_USEC + 1);
|
||||
if (system_state < SYSTEM_RUNNING)
|
||||
udelay(SLOWCK_SW_TIME_USEC);
|
||||
else
|
||||
usleep_range(SLOWCK_SW_TIME_USEC, SLOWCK_SW_TIME_USEC + 1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
@ -533,7 +542,10 @@ static int clk_sama5d4_slow_osc_prepare(struct clk_hw *hw)
|
|||
return 0;
|
||||
}
|
||||
|
||||
usleep_range(osc->startup_usec, osc->startup_usec + 1);
|
||||
if (system_state < SYSTEM_RUNNING)
|
||||
udelay(osc->startup_usec);
|
||||
else
|
||||
usleep_range(osc->startup_usec, osc->startup_usec + 1);
|
||||
osc->prepared = true;
|
||||
|
||||
return 0;
|
||||
|
|
|
@ -266,10 +266,11 @@ static int aspeed_g6_clk_enable(struct clk_hw *hw)
|
|||
|
||||
/* Enable clock */
|
||||
if (gate->flags & CLK_GATE_SET_TO_DISABLE) {
|
||||
regmap_write(gate->map, get_clock_reg(gate), clk);
|
||||
} else {
|
||||
/* Use set to clear register */
|
||||
/* Clock is clear to enable, so use set to clear register */
|
||||
regmap_write(gate->map, get_clock_reg(gate) + 0x04, clk);
|
||||
} else {
|
||||
/* Clock is set to enable, so use write to set register */
|
||||
regmap_write(gate->map, get_clock_reg(gate), clk);
|
||||
}
|
||||
|
||||
if (gate->reset_idx >= 0) {
|
||||
|
|
|
@ -638,7 +638,7 @@ static int imx8mm_clocks_probe(struct platform_device *pdev)
|
|||
clks[IMX8MM_CLK_A53_DIV],
|
||||
clks[IMX8MM_CLK_A53_SRC],
|
||||
clks[IMX8MM_ARM_PLL_OUT],
|
||||
clks[IMX8MM_CLK_24M]);
|
||||
clks[IMX8MM_SYS_PLL1_800M]);
|
||||
|
||||
imx_check_clocks(clks, ARRAY_SIZE(clks));
|
||||
|
||||
|
|
|
@ -610,7 +610,7 @@ static int imx8mn_clocks_probe(struct platform_device *pdev)
|
|||
clks[IMX8MN_CLK_A53_DIV],
|
||||
clks[IMX8MN_CLK_A53_SRC],
|
||||
clks[IMX8MN_ARM_PLL_OUT],
|
||||
clks[IMX8MN_CLK_24M]);
|
||||
clks[IMX8MN_SYS_PLL1_800M]);
|
||||
|
||||
imx_check_clocks(clks, ARRAY_SIZE(clks));
|
||||
|
||||
|
|
|
@ -343,6 +343,7 @@ static struct clk_regmap g12a_cpu_clk_premux0 = {
|
|||
.offset = HHI_SYS_CPU_CLK_CNTL0,
|
||||
.mask = 0x3,
|
||||
.shift = 0,
|
||||
.flags = CLK_MUX_ROUND_CLOSEST,
|
||||
},
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "cpu_clk_dyn0_sel",
|
||||
|
@ -353,8 +354,7 @@ static struct clk_regmap g12a_cpu_clk_premux0 = {
|
|||
{ .hw = &g12a_fclk_div3.hw },
|
||||
},
|
||||
.num_parents = 3,
|
||||
/* This sub-tree is used a parking clock */
|
||||
.flags = CLK_SET_RATE_NO_REPARENT,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
},
|
||||
};
|
||||
|
||||
|
@ -410,6 +410,7 @@ static struct clk_regmap g12a_cpu_clk_postmux0 = {
|
|||
.offset = HHI_SYS_CPU_CLK_CNTL0,
|
||||
.mask = 0x1,
|
||||
.shift = 2,
|
||||
.flags = CLK_MUX_ROUND_CLOSEST,
|
||||
},
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "cpu_clk_dyn0",
|
||||
|
@ -466,6 +467,7 @@ static struct clk_regmap g12a_cpu_clk_dyn = {
|
|||
.offset = HHI_SYS_CPU_CLK_CNTL0,
|
||||
.mask = 0x1,
|
||||
.shift = 10,
|
||||
.flags = CLK_MUX_ROUND_CLOSEST,
|
||||
},
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "cpu_clk_dyn",
|
||||
|
@ -485,6 +487,7 @@ static struct clk_regmap g12a_cpu_clk = {
|
|||
.offset = HHI_SYS_CPU_CLK_CNTL0,
|
||||
.mask = 0x1,
|
||||
.shift = 11,
|
||||
.flags = CLK_MUX_ROUND_CLOSEST,
|
||||
},
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "cpu_clk",
|
||||
|
@ -504,6 +507,7 @@ static struct clk_regmap g12b_cpu_clk = {
|
|||
.offset = HHI_SYS_CPU_CLK_CNTL0,
|
||||
.mask = 0x1,
|
||||
.shift = 11,
|
||||
.flags = CLK_MUX_ROUND_CLOSEST,
|
||||
},
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "cpu_clk",
|
||||
|
@ -523,6 +527,7 @@ static struct clk_regmap g12b_cpub_clk_premux0 = {
|
|||
.offset = HHI_SYS_CPUB_CLK_CNTL,
|
||||
.mask = 0x3,
|
||||
.shift = 0,
|
||||
.flags = CLK_MUX_ROUND_CLOSEST,
|
||||
},
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "cpub_clk_dyn0_sel",
|
||||
|
@ -533,6 +538,7 @@ static struct clk_regmap g12b_cpub_clk_premux0 = {
|
|||
{ .hw = &g12a_fclk_div3.hw },
|
||||
},
|
||||
.num_parents = 3,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
},
|
||||
};
|
||||
|
||||
|
@ -567,6 +573,7 @@ static struct clk_regmap g12b_cpub_clk_postmux0 = {
|
|||
.offset = HHI_SYS_CPUB_CLK_CNTL,
|
||||
.mask = 0x1,
|
||||
.shift = 2,
|
||||
.flags = CLK_MUX_ROUND_CLOSEST,
|
||||
},
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "cpub_clk_dyn0",
|
||||
|
@ -644,6 +651,7 @@ static struct clk_regmap g12b_cpub_clk_dyn = {
|
|||
.offset = HHI_SYS_CPUB_CLK_CNTL,
|
||||
.mask = 0x1,
|
||||
.shift = 10,
|
||||
.flags = CLK_MUX_ROUND_CLOSEST,
|
||||
},
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "cpub_clk_dyn",
|
||||
|
@ -663,6 +671,7 @@ static struct clk_regmap g12b_cpub_clk = {
|
|||
.offset = HHI_SYS_CPUB_CLK_CNTL,
|
||||
.mask = 0x1,
|
||||
.shift = 11,
|
||||
.flags = CLK_MUX_ROUND_CLOSEST,
|
||||
},
|
||||
.hw.init = &(struct clk_init_data){
|
||||
.name = "cpub_clk",
|
||||
|
|
|
@ -935,6 +935,7 @@ static struct clk_regmap gxbb_sar_adc_clk_div = {
|
|||
&gxbb_sar_adc_clk_sel.hw
|
||||
},
|
||||
.num_parents = 1,
|
||||
.flags = CLK_SET_RATE_PARENT,
|
||||
},
|
||||
};
|
||||
|
||||
|
|
|
@ -165,12 +165,18 @@ static const unsigned long exynos5x_clk_regs[] __initconst = {
|
|||
GATE_BUS_CPU,
|
||||
GATE_SCLK_CPU,
|
||||
CLKOUT_CMU_CPU,
|
||||
CPLL_CON0,
|
||||
DPLL_CON0,
|
||||
EPLL_CON0,
|
||||
EPLL_CON1,
|
||||
EPLL_CON2,
|
||||
RPLL_CON0,
|
||||
RPLL_CON1,
|
||||
RPLL_CON2,
|
||||
IPLL_CON0,
|
||||
SPLL_CON0,
|
||||
VPLL_CON0,
|
||||
MPLL_CON0,
|
||||
SRC_TOP0,
|
||||
SRC_TOP1,
|
||||
SRC_TOP2,
|
||||
|
@ -1172,8 +1178,6 @@ static const struct samsung_gate_clock exynos5x_gate_clks[] __initconst = {
|
|||
GATE(CLK_SCLK_ISP_SENSOR2, "sclk_isp_sensor2", "dout_isp_sensor2",
|
||||
GATE_TOP_SCLK_ISP, 12, CLK_SET_RATE_PARENT, 0),
|
||||
|
||||
GATE(CLK_G3D, "g3d", "mout_user_aclk_g3d", GATE_IP_G3D, 9, 0, 0),
|
||||
|
||||
/* CDREX */
|
||||
GATE(CLK_CLKM_PHY0, "clkm_phy0", "dout_sclk_cdrex",
|
||||
GATE_BUS_CDREX0, 0, 0, 0),
|
||||
|
@ -1248,6 +1252,15 @@ static struct exynos5_subcmu_reg_dump exynos5x_gsc_suspend_regs[] = {
|
|||
{ DIV2_RATIO0, 0, 0x30 }, /* DIV dout_gscl_blk_300 */
|
||||
};
|
||||
|
||||
static const struct samsung_gate_clock exynos5x_g3d_gate_clks[] __initconst = {
|
||||
GATE(CLK_G3D, "g3d", "mout_user_aclk_g3d", GATE_IP_G3D, 9, 0, 0),
|
||||
};
|
||||
|
||||
static struct exynos5_subcmu_reg_dump exynos5x_g3d_suspend_regs[] = {
|
||||
{ GATE_IP_G3D, 0x3ff, 0x3ff }, /* G3D gates */
|
||||
{ SRC_TOP5, 0, BIT(16) }, /* MUX mout_user_aclk_g3d */
|
||||
};
|
||||
|
||||
static const struct samsung_div_clock exynos5x_mfc_div_clks[] __initconst = {
|
||||
DIV(0, "dout_mfc_blk", "mout_user_aclk333", DIV4_RATIO, 0, 2),
|
||||
};
|
||||
|
@ -1320,6 +1333,14 @@ static const struct exynos5_subcmu_info exynos5x_gsc_subcmu = {
|
|||
.pd_name = "GSC",
|
||||
};
|
||||
|
||||
static const struct exynos5_subcmu_info exynos5x_g3d_subcmu = {
|
||||
.gate_clks = exynos5x_g3d_gate_clks,
|
||||
.nr_gate_clks = ARRAY_SIZE(exynos5x_g3d_gate_clks),
|
||||
.suspend_regs = exynos5x_g3d_suspend_regs,
|
||||
.nr_suspend_regs = ARRAY_SIZE(exynos5x_g3d_suspend_regs),
|
||||
.pd_name = "G3D",
|
||||
};
|
||||
|
||||
static const struct exynos5_subcmu_info exynos5x_mfc_subcmu = {
|
||||
.div_clks = exynos5x_mfc_div_clks,
|
||||
.nr_div_clks = ARRAY_SIZE(exynos5x_mfc_div_clks),
|
||||
|
@ -1351,6 +1372,7 @@ static const struct exynos5_subcmu_info exynos5800_mau_subcmu = {
|
|||
static const struct exynos5_subcmu_info *exynos5x_subcmus[] = {
|
||||
&exynos5x_disp_subcmu,
|
||||
&exynos5x_gsc_subcmu,
|
||||
&exynos5x_g3d_subcmu,
|
||||
&exynos5x_mfc_subcmu,
|
||||
&exynos5x_mscl_subcmu,
|
||||
};
|
||||
|
@ -1358,6 +1380,7 @@ static const struct exynos5_subcmu_info *exynos5x_subcmus[] = {
|
|||
static const struct exynos5_subcmu_info *exynos5800_subcmus[] = {
|
||||
&exynos5x_disp_subcmu,
|
||||
&exynos5x_gsc_subcmu,
|
||||
&exynos5x_g3d_subcmu,
|
||||
&exynos5x_mfc_subcmu,
|
||||
&exynos5x_mscl_subcmu,
|
||||
&exynos5800_mau_subcmu,
|
||||
|
|
|
@ -13,6 +13,7 @@
|
|||
#include <linux/of_device.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/pm_runtime.h>
|
||||
#include <linux/slab.h>
|
||||
|
||||
#include <dt-bindings/clock/exynos5433.h>
|
||||
|
||||
|
@ -5584,6 +5585,8 @@ static int __init exynos5433_cmu_probe(struct platform_device *pdev)
|
|||
|
||||
data->clk_save = samsung_clk_alloc_reg_dump(info->clk_regs,
|
||||
info->nr_clk_regs);
|
||||
if (!data->clk_save)
|
||||
return -ENOMEM;
|
||||
data->nr_clk_save = info->nr_clk_regs;
|
||||
data->clk_suspend = info->suspend_regs;
|
||||
data->nr_clk_suspend = info->nr_suspend_regs;
|
||||
|
@ -5592,12 +5595,19 @@ static int __init exynos5433_cmu_probe(struct platform_device *pdev)
|
|||
if (data->nr_pclks > 0) {
|
||||
data->pclks = devm_kcalloc(dev, sizeof(struct clk *),
|
||||
data->nr_pclks, GFP_KERNEL);
|
||||
|
||||
if (!data->pclks) {
|
||||
kfree(data->clk_save);
|
||||
return -ENOMEM;
|
||||
}
|
||||
for (i = 0; i < data->nr_pclks; i++) {
|
||||
struct clk *clk = of_clk_get(dev->of_node, i);
|
||||
|
||||
if (IS_ERR(clk))
|
||||
if (IS_ERR(clk)) {
|
||||
kfree(data->clk_save);
|
||||
while (--i >= 0)
|
||||
clk_put(data->pclks[i]);
|
||||
return PTR_ERR(clk);
|
||||
}
|
||||
data->pclks[i] = clk;
|
||||
}
|
||||
}
|
||||
|
|
|
@ -1224,7 +1224,7 @@ static int sun9i_a80_ccu_probe(struct platform_device *pdev)
|
|||
|
||||
/* Enforce d1 = 0, d2 = 0 for Audio PLL */
|
||||
val = readl(reg + SUN9I_A80_PLL_AUDIO_REG);
|
||||
val &= (BIT(16) & BIT(18));
|
||||
val &= ~(BIT(16) | BIT(18));
|
||||
writel(val, reg + SUN9I_A80_PLL_AUDIO_REG);
|
||||
|
||||
/* Enforce P = 1 for both CPU cluster PLLs */
|
||||
|
|
|
@ -1080,8 +1080,8 @@ static struct clk ** __init sunxi_divs_clk_setup(struct device_node *node,
|
|||
rate_hw, rate_ops,
|
||||
gate_hw, &clk_gate_ops,
|
||||
clkflags |
|
||||
data->div[i].critical ?
|
||||
CLK_IS_CRITICAL : 0);
|
||||
(data->div[i].critical ?
|
||||
CLK_IS_CRITICAL : 0));
|
||||
|
||||
WARN_ON(IS_ERR(clk_data->clks[i]));
|
||||
}
|
||||
|
|
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