USB: fixes for v5.2-rc4
DWC2 gets a fix for zlp handling which allows DWC2 to pass USBCV MSC tests. A memory leak in fusb300 was plugged. DWC2 also got a fix for wMaxPacketSize handling while acting as host which fixes a regression with USB Cameras. Apart from these, the usual set of minor fixes. Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com> -----BEGIN PGP SIGNATURE----- iQJRBAABCAA7FiEElLzh7wn96CXwjh2IzL64meEamQYFAlz6BIUdHGZlbGlwZS5i YWxiaUBsaW51eC5pbnRlbC5jb20ACgkQzL64meEamQZ76A//TGOZnRqYJTRBRz4R gOyatwmIsMn4T7eCfN0MLHZPOU5MssZ9oaAKvTwt0GV28CsKe5a8JS2+DrYpQvIA 9b0GQqLM7iSesPtkkzZWArsTPu/q+pisZmnbyt2X3AF26pGYHvAB9yfLwfrlhm9K gopAvCBhCwLkLHlElH6XIjW0Gy0UC27dAAYQNEyHB30p6ya5bfTRREUP88XEU9fZ Tu5BPXWhtBY5iuLjdhafy0BtXayEQBIN+oVzTcbug0BaUpHzW/hp4oNV5opMD0Hh EAcDCWVRmNJGz8YsXYzhtILpQGznz+nMfzqaUdoy9Jxcck1YumnP171kW7jexe7t SeoMEwoUyR/DdPd+4Vjv6Wuz/91yHubvinqsvV685+mqbIBjH51cr+uMf1ZqrpPC +3gov0hnVRB+Wnawd567jpXBGn2SwF/ARtVrvA1SQk1bekP2f0Y/jF4nxi4AVEVP XCHxz+sUsipiCXl4oCGAV8fQZZFBaZm0qqFJ+f63lrFjnuiTP6olZDkSo0uw3aVr PKv4GPYtndg9I7B3TbPDq+LfpuLs4xNFpld+p7nMQfu3SkNfhx98YsDbEKtb1mHg oms3HE3vXqkaJio9dDVQpQC04FKQNPTenGyxwqvp5sUDK/kE/IbILuo4WCXeQKQ7 L8jBqbLS4EnQG2gbII4dLqxKQVY= =1yqY -----END PGP SIGNATURE----- Merge tag 'fixes-for-v5.2-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb into usb-linus Felipe writes: USB: fixes for v5.2-rc4 DWC2 gets a fix for zlp handling which allows DWC2 to pass USBCV MSC tests. A memory leak in fusb300 was plugged. DWC2 also got a fix for wMaxPacketSize handling while acting as host which fixes a regression with USB Cameras. Apart from these, the usual set of minor fixes. Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com> * tag 'fixes-for-v5.2-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/balbi/usb: usb: gadget: udc: lpc32xx: fix return value check in lpc32xx_udc_probe() usb: gadget: dwc2: fix zlp handling usb: dwc2: Set actual frame number for completed ISOC transfer for none DDMA usb: gadget: udc: lpc32xx: allocate descriptor with GFP_ATOMIC usb: gadget: fusb300_udc: Fix memory leak of fusb300->ep[i] usb: phy: mxs: Disable external charger detect in mxs_phy_hw_init() usb: dwc2: Fix DMA cache alignment issues usb: dwc2: host: Fix wMaxPacketSize handling (fix webcam regression)
This commit is contained in:
Коммит
01fb49ff12
|
@ -835,19 +835,22 @@ static void dwc2_gadget_fill_nonisoc_xfer_ddma_one(struct dwc2_hsotg_ep *hs_ep,
|
|||
* with corresponding information based on transfer data.
|
||||
*/
|
||||
static void dwc2_gadget_config_nonisoc_xfer_ddma(struct dwc2_hsotg_ep *hs_ep,
|
||||
struct usb_request *ureq,
|
||||
unsigned int offset,
|
||||
dma_addr_t dma_buff,
|
||||
unsigned int len)
|
||||
{
|
||||
struct usb_request *ureq = NULL;
|
||||
struct dwc2_dma_desc *desc = hs_ep->desc_list;
|
||||
struct scatterlist *sg;
|
||||
int i;
|
||||
u8 desc_count = 0;
|
||||
|
||||
if (hs_ep->req)
|
||||
ureq = &hs_ep->req->req;
|
||||
|
||||
/* non-DMA sg buffer */
|
||||
if (!ureq->num_sgs) {
|
||||
if (!ureq || !ureq->num_sgs) {
|
||||
dwc2_gadget_fill_nonisoc_xfer_ddma_one(hs_ep, &desc,
|
||||
ureq->dma + offset, len, true);
|
||||
dma_buff, len, true);
|
||||
return;
|
||||
}
|
||||
|
||||
|
@ -1135,7 +1138,7 @@ static void dwc2_hsotg_start_req(struct dwc2_hsotg *hsotg,
|
|||
offset = ureq->actual;
|
||||
|
||||
/* Fill DDMA chain entries */
|
||||
dwc2_gadget_config_nonisoc_xfer_ddma(hs_ep, ureq, offset,
|
||||
dwc2_gadget_config_nonisoc_xfer_ddma(hs_ep, ureq->dma + offset,
|
||||
length);
|
||||
|
||||
/* write descriptor chain address to control register */
|
||||
|
@ -2037,12 +2040,13 @@ static void dwc2_hsotg_program_zlp(struct dwc2_hsotg *hsotg,
|
|||
dev_dbg(hsotg->dev, "Receiving zero-length packet on ep%d\n",
|
||||
index);
|
||||
if (using_desc_dma(hsotg)) {
|
||||
/* Not specific buffer needed for ep0 ZLP */
|
||||
dma_addr_t dma = hs_ep->desc_list_dma;
|
||||
|
||||
if (!index)
|
||||
dwc2_gadget_set_ep0_desc_chain(hsotg, hs_ep);
|
||||
|
||||
/* Not specific buffer needed for ep0 ZLP */
|
||||
dwc2_gadget_fill_nonisoc_xfer_ddma_one(hs_ep, &hs_ep->desc_list,
|
||||
hs_ep->desc_list_dma, 0, true);
|
||||
dwc2_gadget_config_nonisoc_xfer_ddma(hs_ep, dma, 0);
|
||||
} else {
|
||||
dwc2_writel(hsotg, DXEPTSIZ_MC(1) | DXEPTSIZ_PKTCNT(1) |
|
||||
DXEPTSIZ_XFERSIZE(0),
|
||||
|
@ -2417,6 +2421,10 @@ static void dwc2_hsotg_handle_outdone(struct dwc2_hsotg *hsotg, int epnum)
|
|||
dwc2_gadget_incr_frame_num(hs_ep);
|
||||
}
|
||||
|
||||
/* Set actual frame number for completed transfers */
|
||||
if (!using_desc_dma(hsotg) && hs_ep->isochronous)
|
||||
req->frame_number = hsotg->frame_number;
|
||||
|
||||
dwc2_hsotg_complete_request(hsotg, hs_ep, hs_req, result);
|
||||
}
|
||||
|
||||
|
|
|
@ -2480,8 +2480,10 @@ static void dwc2_free_dma_aligned_buffer(struct urb *urb)
|
|||
return;
|
||||
|
||||
/* Restore urb->transfer_buffer from the end of the allocated area */
|
||||
memcpy(&stored_xfer_buffer, urb->transfer_buffer +
|
||||
urb->transfer_buffer_length, sizeof(urb->transfer_buffer));
|
||||
memcpy(&stored_xfer_buffer,
|
||||
PTR_ALIGN(urb->transfer_buffer + urb->transfer_buffer_length,
|
||||
dma_get_cache_alignment()),
|
||||
sizeof(urb->transfer_buffer));
|
||||
|
||||
if (usb_urb_dir_in(urb)) {
|
||||
if (usb_pipeisoc(urb->pipe))
|
||||
|
@ -2513,6 +2515,7 @@ static int dwc2_alloc_dma_aligned_buffer(struct urb *urb, gfp_t mem_flags)
|
|||
* DMA
|
||||
*/
|
||||
kmalloc_size = urb->transfer_buffer_length +
|
||||
(dma_get_cache_alignment() - 1) +
|
||||
sizeof(urb->transfer_buffer);
|
||||
|
||||
kmalloc_ptr = kmalloc(kmalloc_size, mem_flags);
|
||||
|
@ -2523,7 +2526,8 @@ static int dwc2_alloc_dma_aligned_buffer(struct urb *urb, gfp_t mem_flags)
|
|||
* Position value of original urb->transfer_buffer pointer to the end
|
||||
* of allocation for later referencing
|
||||
*/
|
||||
memcpy(kmalloc_ptr + urb->transfer_buffer_length,
|
||||
memcpy(PTR_ALIGN(kmalloc_ptr + urb->transfer_buffer_length,
|
||||
dma_get_cache_alignment()),
|
||||
&urb->transfer_buffer, sizeof(urb->transfer_buffer));
|
||||
|
||||
if (usb_urb_dir_out(urb))
|
||||
|
@ -2608,7 +2612,7 @@ static int dwc2_assign_and_init_hc(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
|
|||
chan->dev_addr = dwc2_hcd_get_dev_addr(&urb->pipe_info);
|
||||
chan->ep_num = dwc2_hcd_get_ep_num(&urb->pipe_info);
|
||||
chan->speed = qh->dev_speed;
|
||||
chan->max_packet = dwc2_max_packet(qh->maxp);
|
||||
chan->max_packet = qh->maxp;
|
||||
|
||||
chan->xfer_started = 0;
|
||||
chan->halt_status = DWC2_HC_XFER_NO_HALT_STATUS;
|
||||
|
@ -2686,7 +2690,7 @@ static int dwc2_assign_and_init_hc(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh)
|
|||
* This value may be modified when the transfer is started
|
||||
* to reflect the actual transfer length
|
||||
*/
|
||||
chan->multi_count = dwc2_hb_mult(qh->maxp);
|
||||
chan->multi_count = qh->maxp_mult;
|
||||
|
||||
if (hsotg->params.dma_desc_enable) {
|
||||
chan->desc_list_addr = qh->desc_list_dma;
|
||||
|
@ -3806,19 +3810,21 @@ static struct dwc2_hcd_urb *dwc2_hcd_urb_alloc(struct dwc2_hsotg *hsotg,
|
|||
|
||||
static void dwc2_hcd_urb_set_pipeinfo(struct dwc2_hsotg *hsotg,
|
||||
struct dwc2_hcd_urb *urb, u8 dev_addr,
|
||||
u8 ep_num, u8 ep_type, u8 ep_dir, u16 mps)
|
||||
u8 ep_num, u8 ep_type, u8 ep_dir,
|
||||
u16 maxp, u16 maxp_mult)
|
||||
{
|
||||
if (dbg_perio() ||
|
||||
ep_type == USB_ENDPOINT_XFER_BULK ||
|
||||
ep_type == USB_ENDPOINT_XFER_CONTROL)
|
||||
dev_vdbg(hsotg->dev,
|
||||
"addr=%d, ep_num=%d, ep_dir=%1x, ep_type=%1x, mps=%d\n",
|
||||
dev_addr, ep_num, ep_dir, ep_type, mps);
|
||||
"addr=%d, ep_num=%d, ep_dir=%1x, ep_type=%1x, maxp=%d (%d mult)\n",
|
||||
dev_addr, ep_num, ep_dir, ep_type, maxp, maxp_mult);
|
||||
urb->pipe_info.dev_addr = dev_addr;
|
||||
urb->pipe_info.ep_num = ep_num;
|
||||
urb->pipe_info.pipe_type = ep_type;
|
||||
urb->pipe_info.pipe_dir = ep_dir;
|
||||
urb->pipe_info.mps = mps;
|
||||
urb->pipe_info.maxp = maxp;
|
||||
urb->pipe_info.maxp_mult = maxp_mult;
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -3909,8 +3915,9 @@ void dwc2_hcd_dump_state(struct dwc2_hsotg *hsotg)
|
|||
dwc2_hcd_is_pipe_in(&urb->pipe_info) ?
|
||||
"IN" : "OUT");
|
||||
dev_dbg(hsotg->dev,
|
||||
" Max packet size: %d\n",
|
||||
dwc2_hcd_get_mps(&urb->pipe_info));
|
||||
" Max packet size: %d (%d mult)\n",
|
||||
dwc2_hcd_get_maxp(&urb->pipe_info),
|
||||
dwc2_hcd_get_maxp_mult(&urb->pipe_info));
|
||||
dev_dbg(hsotg->dev,
|
||||
" transfer_buffer: %p\n",
|
||||
urb->buf);
|
||||
|
@ -4510,8 +4517,10 @@ static void dwc2_dump_urb_info(struct usb_hcd *hcd, struct urb *urb,
|
|||
}
|
||||
|
||||
dev_vdbg(hsotg->dev, " Speed: %s\n", speed);
|
||||
dev_vdbg(hsotg->dev, " Max packet size: %d\n",
|
||||
usb_maxpacket(urb->dev, urb->pipe, usb_pipeout(urb->pipe)));
|
||||
dev_vdbg(hsotg->dev, " Max packet size: %d (%d mult)\n",
|
||||
usb_endpoint_maxp(&urb->ep->desc),
|
||||
usb_endpoint_maxp_mult(&urb->ep->desc));
|
||||
|
||||
dev_vdbg(hsotg->dev, " Data buffer length: %d\n",
|
||||
urb->transfer_buffer_length);
|
||||
dev_vdbg(hsotg->dev, " Transfer buffer: %p, Transfer DMA: %08lx\n",
|
||||
|
@ -4594,8 +4603,8 @@ static int _dwc2_hcd_urb_enqueue(struct usb_hcd *hcd, struct urb *urb,
|
|||
dwc2_hcd_urb_set_pipeinfo(hsotg, dwc2_urb, usb_pipedevice(urb->pipe),
|
||||
usb_pipeendpoint(urb->pipe), ep_type,
|
||||
usb_pipein(urb->pipe),
|
||||
usb_maxpacket(urb->dev, urb->pipe,
|
||||
!(usb_pipein(urb->pipe))));
|
||||
usb_endpoint_maxp(&ep->desc),
|
||||
usb_endpoint_maxp_mult(&ep->desc));
|
||||
|
||||
buf = urb->transfer_buffer;
|
||||
|
||||
|
|
|
@ -171,7 +171,8 @@ struct dwc2_hcd_pipe_info {
|
|||
u8 ep_num;
|
||||
u8 pipe_type;
|
||||
u8 pipe_dir;
|
||||
u16 mps;
|
||||
u16 maxp;
|
||||
u16 maxp_mult;
|
||||
};
|
||||
|
||||
struct dwc2_hcd_iso_packet_desc {
|
||||
|
@ -264,6 +265,7 @@ struct dwc2_hs_transfer_time {
|
|||
* - USB_ENDPOINT_XFER_ISOC
|
||||
* @ep_is_in: Endpoint direction
|
||||
* @maxp: Value from wMaxPacketSize field of Endpoint Descriptor
|
||||
* @maxp_mult: Multiplier for maxp
|
||||
* @dev_speed: Device speed. One of the following values:
|
||||
* - USB_SPEED_LOW
|
||||
* - USB_SPEED_FULL
|
||||
|
@ -340,6 +342,7 @@ struct dwc2_qh {
|
|||
u8 ep_type;
|
||||
u8 ep_is_in;
|
||||
u16 maxp;
|
||||
u16 maxp_mult;
|
||||
u8 dev_speed;
|
||||
u8 data_toggle;
|
||||
u8 ping_state;
|
||||
|
@ -503,9 +506,14 @@ static inline u8 dwc2_hcd_get_pipe_type(struct dwc2_hcd_pipe_info *pipe)
|
|||
return pipe->pipe_type;
|
||||
}
|
||||
|
||||
static inline u16 dwc2_hcd_get_mps(struct dwc2_hcd_pipe_info *pipe)
|
||||
static inline u16 dwc2_hcd_get_maxp(struct dwc2_hcd_pipe_info *pipe)
|
||||
{
|
||||
return pipe->mps;
|
||||
return pipe->maxp;
|
||||
}
|
||||
|
||||
static inline u16 dwc2_hcd_get_maxp_mult(struct dwc2_hcd_pipe_info *pipe)
|
||||
{
|
||||
return pipe->maxp_mult;
|
||||
}
|
||||
|
||||
static inline u8 dwc2_hcd_get_dev_addr(struct dwc2_hcd_pipe_info *pipe)
|
||||
|
@ -620,12 +628,6 @@ static inline bool dbg_urb(struct urb *urb)
|
|||
static inline bool dbg_perio(void) { return false; }
|
||||
#endif
|
||||
|
||||
/* High bandwidth multiplier as encoded in highspeed endpoint descriptors */
|
||||
#define dwc2_hb_mult(wmaxpacketsize) (1 + (((wmaxpacketsize) >> 11) & 0x03))
|
||||
|
||||
/* Packet size for any kind of endpoint descriptor */
|
||||
#define dwc2_max_packet(wmaxpacketsize) ((wmaxpacketsize) & 0x07ff)
|
||||
|
||||
/*
|
||||
* Returns true if frame1 index is greater than frame2 index. The comparison
|
||||
* is done modulo FRLISTEN_64_SIZE. This accounts for the rollover of the
|
||||
|
|
|
@ -1617,8 +1617,9 @@ static void dwc2_hc_ahberr_intr(struct dwc2_hsotg *hsotg,
|
|||
|
||||
dev_err(hsotg->dev, " Speed: %s\n", speed);
|
||||
|
||||
dev_err(hsotg->dev, " Max packet size: %d\n",
|
||||
dwc2_hcd_get_mps(&urb->pipe_info));
|
||||
dev_err(hsotg->dev, " Max packet size: %d (mult %d)\n",
|
||||
dwc2_hcd_get_maxp(&urb->pipe_info),
|
||||
dwc2_hcd_get_maxp_mult(&urb->pipe_info));
|
||||
dev_err(hsotg->dev, " Data buffer length: %d\n", urb->length);
|
||||
dev_err(hsotg->dev, " Transfer buffer: %p, Transfer DMA: %08lx\n",
|
||||
urb->buf, (unsigned long)urb->dma);
|
||||
|
|
|
@ -708,7 +708,7 @@ static void dwc2_hs_pmap_unschedule(struct dwc2_hsotg *hsotg,
|
|||
static int dwc2_uframe_schedule_split(struct dwc2_hsotg *hsotg,
|
||||
struct dwc2_qh *qh)
|
||||
{
|
||||
int bytecount = dwc2_hb_mult(qh->maxp) * dwc2_max_packet(qh->maxp);
|
||||
int bytecount = qh->maxp_mult * qh->maxp;
|
||||
int ls_search_slice;
|
||||
int err = 0;
|
||||
int host_interval_in_sched;
|
||||
|
@ -1332,7 +1332,7 @@ static int dwc2_check_max_xfer_size(struct dwc2_hsotg *hsotg,
|
|||
u32 max_channel_xfer_size;
|
||||
int status = 0;
|
||||
|
||||
max_xfer_size = dwc2_max_packet(qh->maxp) * dwc2_hb_mult(qh->maxp);
|
||||
max_xfer_size = qh->maxp * qh->maxp_mult;
|
||||
max_channel_xfer_size = hsotg->params.max_transfer_size;
|
||||
|
||||
if (max_xfer_size > max_channel_xfer_size) {
|
||||
|
@ -1517,8 +1517,9 @@ static void dwc2_qh_init(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh,
|
|||
u32 prtspd = (hprt & HPRT0_SPD_MASK) >> HPRT0_SPD_SHIFT;
|
||||
bool do_split = (prtspd == HPRT0_SPD_HIGH_SPEED &&
|
||||
dev_speed != USB_SPEED_HIGH);
|
||||
int maxp = dwc2_hcd_get_mps(&urb->pipe_info);
|
||||
int bytecount = dwc2_hb_mult(maxp) * dwc2_max_packet(maxp);
|
||||
int maxp = dwc2_hcd_get_maxp(&urb->pipe_info);
|
||||
int maxp_mult = dwc2_hcd_get_maxp_mult(&urb->pipe_info);
|
||||
int bytecount = maxp_mult * maxp;
|
||||
char *speed, *type;
|
||||
|
||||
/* Initialize QH */
|
||||
|
@ -1531,6 +1532,7 @@ static void dwc2_qh_init(struct dwc2_hsotg *hsotg, struct dwc2_qh *qh,
|
|||
|
||||
qh->data_toggle = DWC2_HC_PID_DATA0;
|
||||
qh->maxp = maxp;
|
||||
qh->maxp_mult = maxp_mult;
|
||||
INIT_LIST_HEAD(&qh->qtd_list);
|
||||
INIT_LIST_HEAD(&qh->qh_list_entry);
|
||||
|
||||
|
|
|
@ -1342,12 +1342,15 @@ static const struct usb_gadget_ops fusb300_gadget_ops = {
|
|||
static int fusb300_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct fusb300 *fusb300 = platform_get_drvdata(pdev);
|
||||
int i;
|
||||
|
||||
usb_del_gadget_udc(&fusb300->gadget);
|
||||
iounmap(fusb300->reg);
|
||||
free_irq(platform_get_irq(pdev, 0), fusb300);
|
||||
|
||||
fusb300_free_request(&fusb300->ep[0]->ep, fusb300->ep0_req);
|
||||
for (i = 0; i < FUSB300_MAX_NUM_EP; i++)
|
||||
kfree(fusb300->ep[i]);
|
||||
kfree(fusb300);
|
||||
|
||||
return 0;
|
||||
|
@ -1491,6 +1494,8 @@ clean_up:
|
|||
if (fusb300->ep0_req)
|
||||
fusb300_free_request(&fusb300->ep[0]->ep,
|
||||
fusb300->ep0_req);
|
||||
for (i = 0; i < FUSB300_MAX_NUM_EP; i++)
|
||||
kfree(fusb300->ep[i]);
|
||||
kfree(fusb300);
|
||||
}
|
||||
if (reg)
|
||||
|
|
|
@ -937,8 +937,7 @@ static struct lpc32xx_usbd_dd_gad *udc_dd_alloc(struct lpc32xx_udc *udc)
|
|||
dma_addr_t dma;
|
||||
struct lpc32xx_usbd_dd_gad *dd;
|
||||
|
||||
dd = (struct lpc32xx_usbd_dd_gad *) dma_pool_alloc(
|
||||
udc->dd_cache, (GFP_KERNEL | GFP_DMA), &dma);
|
||||
dd = dma_pool_alloc(udc->dd_cache, GFP_ATOMIC | GFP_DMA, &dma);
|
||||
if (dd)
|
||||
dd->this_dma = dma;
|
||||
|
||||
|
@ -3070,9 +3069,9 @@ static int lpc32xx_udc_probe(struct platform_device *pdev)
|
|||
}
|
||||
|
||||
udc->udp_baseaddr = devm_ioremap_resource(dev, res);
|
||||
if (!udc->udp_baseaddr) {
|
||||
if (IS_ERR(udc->udp_baseaddr)) {
|
||||
dev_err(udc->dev, "IO map failure\n");
|
||||
return -ENOMEM;
|
||||
return PTR_ERR(udc->udp_baseaddr);
|
||||
}
|
||||
|
||||
/* Get USB device clock */
|
||||
|
|
|
@ -63,6 +63,7 @@
|
|||
|
||||
#define ANADIG_USB1_CHRG_DETECT_SET 0x1b4
|
||||
#define ANADIG_USB1_CHRG_DETECT_CLR 0x1b8
|
||||
#define ANADIG_USB2_CHRG_DETECT_SET 0x214
|
||||
#define ANADIG_USB1_CHRG_DETECT_EN_B BIT(20)
|
||||
#define ANADIG_USB1_CHRG_DETECT_CHK_CHRG_B BIT(19)
|
||||
#define ANADIG_USB1_CHRG_DETECT_CHK_CONTACT BIT(18)
|
||||
|
@ -250,6 +251,19 @@ static int mxs_phy_hw_init(struct mxs_phy *mxs_phy)
|
|||
if (mxs_phy->data->flags & MXS_PHY_NEED_IP_FIX)
|
||||
writel(BM_USBPHY_IP_FIX, base + HW_USBPHY_IP_SET);
|
||||
|
||||
if (mxs_phy->regmap_anatop) {
|
||||
unsigned int reg = mxs_phy->port_id ?
|
||||
ANADIG_USB1_CHRG_DETECT_SET :
|
||||
ANADIG_USB2_CHRG_DETECT_SET;
|
||||
/*
|
||||
* The external charger detector needs to be disabled,
|
||||
* or the signal at DP will be poor
|
||||
*/
|
||||
regmap_write(mxs_phy->regmap_anatop, reg,
|
||||
ANADIG_USB1_CHRG_DETECT_EN_B |
|
||||
ANADIG_USB1_CHRG_DETECT_CHK_CHRG_B);
|
||||
}
|
||||
|
||||
mxs_phy_tx_init(mxs_phy);
|
||||
|
||||
return 0;
|
||||
|
|
Загрузка…
Ссылка в новой задаче