tg3: Cleanup IPV6 LSO
This patch attempts to make the relationship between IPV6 checksum offload and IPV6 LSO more obvious. The patch also toggles a bit needed for IPV6 LSO on 5785 and 57780 devices. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Signed-off-by: Benjamin Li <benli@broadcom.com> Signed-off-by: Michael Chan <mchan@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Родитель
2023276ebf
Коммит
027455adac
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@ -7518,7 +7518,11 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
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rdmac_mode |= RDMAC_MODE_FIFO_LONG_BURST;
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if (tp->tg3_flags2 & TG3_FLG2_HW_TSO)
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rdmac_mode |= (1 << 27);
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rdmac_mode |= RDMAC_MODE_IPV4_LSO_EN;
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5785 ||
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GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_57780)
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rdmac_mode |= RDMAC_MODE_IPV6_LSO_EN;
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/* Receive/send statistics. */
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if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS) {
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@ -9274,8 +9278,8 @@ static int tg3_set_tso(struct net_device *dev, u32 value)
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return -EINVAL;
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return 0;
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}
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if ((tp->tg3_flags2 & TG3_FLG2_HW_TSO_2) &&
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(GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5906)) {
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if ((dev->features & NETIF_F_IPV6_CSUM) &&
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(tp->tg3_flags2 & TG3_FLG2_HW_TSO_2)) {
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if (value) {
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dev->features |= NETIF_F_TSO6;
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5761 ||
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@ -12358,6 +12362,18 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
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(tp->tg3_flags2 & TG3_FLG2_5750_PLUS))
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tp->tg3_flags2 |= TG3_FLG2_5705_PLUS;
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/* 5700 B0 chips do not support checksumming correctly due
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* to hardware bugs.
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*/
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if (tp->pci_chip_rev_id == CHIPREV_ID_5700_B0)
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tp->tg3_flags |= TG3_FLAG_BROKEN_CHECKSUMS;
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else {
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tp->tg3_flags |= TG3_FLAG_RX_CHECKSUMS;
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tp->dev->features |= NETIF_F_IP_CSUM | NETIF_F_SG;
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if (tp->tg3_flags3 & TG3_FLG3_5755_PLUS)
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tp->dev->features |= NETIF_F_IPV6_CSUM;
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}
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if (tp->tg3_flags2 & TG3_FLG2_5750_PLUS) {
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tp->tg3_flags |= TG3_FLAG_SUPPORT_MSI;
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if (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5750_AX ||
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@ -12614,12 +12630,6 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
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return err;
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}
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/* 5700 B0 chips do not support checksumming correctly due
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* to hardware bugs.
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*/
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if (tp->pci_chip_rev_id == CHIPREV_ID_5700_B0)
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tp->tg3_flags |= TG3_FLAG_BROKEN_CHECKSUMS;
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/* Derive initial jumbo mode from MTU assigned in
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* ether_setup() via the alloc_etherdev() call
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*/
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@ -13756,9 +13766,10 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
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* is off by default, but can be enabled using ethtool.
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*/
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if (tp->tg3_flags2 & TG3_FLG2_HW_TSO) {
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dev->features |= NETIF_F_TSO;
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if ((tp->tg3_flags2 & TG3_FLG2_HW_TSO_2) &&
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(GET_ASIC_REV(tp->pci_chip_rev_id) != ASIC_REV_5906))
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if (dev->features & NETIF_F_IP_CSUM)
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dev->features |= NETIF_F_TSO;
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if ((dev->features & NETIF_F_IPV6_CSUM) &&
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(tp->tg3_flags2 & TG3_FLG2_HW_TSO_2))
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dev->features |= NETIF_F_TSO6;
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if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5761 ||
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(GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5784 &&
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@ -13812,18 +13823,6 @@ static int __devinit tg3_init_one(struct pci_dev *pdev,
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goto err_out_apeunmap;
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}
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/* Tigon3 can do ipv4 only... and some chips have buggy
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* checksumming.
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*/
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if ((tp->tg3_flags & TG3_FLAG_BROKEN_CHECKSUMS) == 0) {
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dev->features |= NETIF_F_IP_CSUM | NETIF_F_SG;
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if (tp->tg3_flags3 & TG3_FLG3_5755_PLUS)
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dev->features |= NETIF_F_IPV6_CSUM;
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tp->tg3_flags |= TG3_FLAG_RX_CHECKSUMS;
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} else
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tp->tg3_flags &= ~TG3_FLAG_RX_CHECKSUMS;
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/* flow control autonegotiation is default behavior */
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tp->tg3_flags |= TG3_FLAG_PAUSE_AUTONEG;
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tp->link_config.flowctrl = FLOW_CTRL_TX | FLOW_CTRL_RX;
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@ -1207,6 +1207,8 @@
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#define RDMAC_MODE_MBUF_SBD_CRPT_ENAB 0x00002000
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#define RDMAC_MODE_FIFO_SIZE_128 0x00020000
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#define RDMAC_MODE_FIFO_LONG_BURST 0x00030000
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#define RDMAC_MODE_IPV4_LSO_EN 0x08000000
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#define RDMAC_MODE_IPV6_LSO_EN 0x10000000
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#define RDMAC_STATUS 0x00004804
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#define RDMAC_STATUS_TGTABORT 0x00000004
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#define RDMAC_STATUS_MSTABORT 0x00000008
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