spi/bfin_spi: push all size checks into the transfer function
This reduces duplication between the setup/transfer functions and keeps values cached during setup from overriding values changed on a transfer basis (like bits_per_word). Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This commit is contained in:
Родитель
7370ed6b91
Коммит
033f44bd0e
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@ -114,10 +114,7 @@ struct slave_data {
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u16 flag;
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u8 chip_select_num;
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u8 n_bytes;
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u8 width; /* 0 or 1 */
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u8 enable_dma;
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u8 bits_per_word; /* 8 or 16 */
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u16 cs_chg_udelay; /* Some devices require > 255usec delay */
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u32 cs_gpio;
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u16 idle_tx_val;
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@ -562,6 +559,7 @@ static void bfin_spi_pump_transfers(unsigned long data)
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struct spi_transfer *transfer = NULL;
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struct spi_transfer *previous = NULL;
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struct slave_data *chip = NULL;
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unsigned int bits_per_word;
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u8 width;
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u16 cr, dma_width, dma_config;
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u32 tranf_success = 1;
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@ -641,26 +639,15 @@ static void bfin_spi_pump_transfers(unsigned long data)
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drv_data->cs_change = transfer->cs_change;
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/* Bits per word setup */
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switch (transfer->bits_per_word) {
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case 8:
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bits_per_word = transfer->bits_per_word ? : message->spi->bits_per_word;
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if (bits_per_word == 8) {
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drv_data->n_bytes = 1;
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width = CFG_SPI_WORDSIZE8;
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drv_data->ops = &bfin_transfer_ops_u8;
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break;
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case 16:
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} else {
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drv_data->n_bytes = 2;
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width = CFG_SPI_WORDSIZE16;
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drv_data->ops = &bfin_transfer_ops_u16;
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break;
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default:
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/* No change, the same as default setting */
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transfer->bits_per_word = chip->bits_per_word;
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drv_data->n_bytes = chip->n_bytes;
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width = chip->width;
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drv_data->ops = chip->ops;
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break;
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}
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cr = (read_CTRL(drv_data) & (~BIT_CTL_TIMOD));
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cr |= (width << 8);
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@ -811,9 +798,9 @@ static void bfin_spi_pump_transfers(unsigned long data)
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if (drv_data->tx == NULL)
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write_TDBR(drv_data, chip->idle_tx_val);
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else {
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if (transfer->bits_per_word == 8)
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if (bits_per_word == 8)
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write_TDBR(drv_data, (*(u8 *) (drv_data->tx)));
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else if (transfer->bits_per_word == 16)
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else
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write_TDBR(drv_data, (*(u16 *) (drv_data->tx)));
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drv_data->tx += drv_data->n_bytes;
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}
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@ -987,9 +974,6 @@ static int bfin_spi_setup(struct spi_device *spi)
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struct master_data *drv_data = spi_master_get_devdata(spi->master);
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int ret = -EINVAL;
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if (spi->bits_per_word != 8 && spi->bits_per_word != 16)
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goto error;
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/* Only alloc (or use chip_info) on first setup */
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chip_info = NULL;
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chip = spi_get_ctldata(spi);
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@ -1023,10 +1007,16 @@ static int bfin_spi_setup(struct spi_device *spi)
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chip->enable_dma = chip_info->enable_dma != 0
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&& drv_data->master_info->enable_dma;
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chip->ctl_reg = chip_info->ctl_reg;
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chip->bits_per_word = chip_info->bits_per_word;
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chip->cs_chg_udelay = chip_info->cs_chg_udelay;
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chip->idle_tx_val = chip_info->idle_tx_val;
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chip->pio_interrupt = chip_info->pio_interrupt;
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spi->bits_per_word = chip_info->bits_per_word;
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}
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if (spi->bits_per_word != 8 && spi->bits_per_word != 16) {
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dev_err(&spi->dev, "%d bits_per_word is not supported\n",
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spi->bits_per_word);
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goto error;
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}
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/* translate common spi framework into our register */
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@ -1050,25 +1040,6 @@ static int bfin_spi_setup(struct spi_device *spi)
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else
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chip->cs_gpio = chip->chip_select_num - MAX_CTRL_CS;
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switch (chip->bits_per_word) {
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case 8:
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chip->n_bytes = 1;
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chip->width = CFG_SPI_WORDSIZE8;
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chip->ops = &bfin_transfer_ops_u8;
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break;
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case 16:
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chip->n_bytes = 2;
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chip->width = CFG_SPI_WORDSIZE16;
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chip->ops = &bfin_transfer_ops_u16;
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break;
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default:
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dev_err(&spi->dev, "%d bits_per_word is not supported\n",
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chip->bits_per_word);
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goto error;
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}
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if (chip->enable_dma && chip->pio_interrupt) {
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dev_err(&spi->dev, "enable_dma is set, "
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"do not set pio_interrupt\n");
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@ -1119,7 +1090,7 @@ static int bfin_spi_setup(struct spi_device *spi)
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}
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dev_dbg(&spi->dev, "setup spi chip %s, width is %d, dma is %d\n",
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spi->modalias, chip->width, chip->enable_dma);
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spi->modalias, spi->bits_per_word, chip->enable_dma);
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dev_dbg(&spi->dev, "ctl_reg is 0x%x, flag_reg is 0x%x\n",
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chip->ctl_reg, chip->flag);
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