Merge branch 'janitor'
This commit is contained in:
Коммит
03a49eebca
|
@ -105,6 +105,7 @@
|
|||
#include <linux/mca-legacy.h>
|
||||
#include <linux/ethtool.h>
|
||||
#include <linux/bitops.h>
|
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#include <linux/jiffies.h>
|
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|
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#include <asm/uaccess.h>
|
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#include <asm/processor.h>
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||||
|
@ -658,7 +659,7 @@ static int init586(struct net_device *dev)
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|||
|
||||
s = jiffies; /* warning: only active with interrupts on !! */
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while (!(cfg_cmd->cmd_status & STAT_COMPL)) {
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if (jiffies - s > 30*HZ/100)
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if (time_after(jiffies, s + 30*HZ/100))
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break;
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}
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|
@ -684,7 +685,7 @@ static int init586(struct net_device *dev)
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s = jiffies;
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while (!(ias_cmd->cmd_status & STAT_COMPL)) {
|
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if (jiffies - s > 30*HZ/100)
|
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if (time_after(jiffies, s + 30*HZ/100))
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break;
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}
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|
@ -709,7 +710,7 @@ static int init586(struct net_device *dev)
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|
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s = jiffies;
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while (!(tdr_cmd->cmd_status & STAT_COMPL)) {
|
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if (jiffies - s > 30*HZ/100) {
|
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if (time_after(jiffies, s + 30*HZ/100)) {
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printk(KERN_WARNING "%s: %d Problems while running the TDR.\n", dev->name, __LINE__);
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result = 1;
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break;
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|
@ -798,7 +799,7 @@ static int init586(struct net_device *dev)
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|||
elmc_id_attn586();
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s = jiffies;
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while (!(mc_cmd->cmd_status & STAT_COMPL)) {
|
||||
if (jiffies - s > 30*HZ/100)
|
||||
if (time_after(jiffies, s + 30*HZ/100))
|
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break;
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}
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if (!(mc_cmd->cmd_status & STAT_COMPL)) {
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|
|
|
@ -258,6 +258,7 @@ static int vortex_debug = 1;
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|||
#include <linux/highmem.h>
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#include <linux/eisa.h>
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#include <linux/bitops.h>
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#include <linux/jiffies.h>
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#include <asm/irq.h> /* For NR_IRQS only. */
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#include <asm/io.h>
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#include <asm/uaccess.h>
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|
@ -2717,7 +2718,7 @@ boomerang_rx(struct net_device *dev)
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skb = dev_alloc_skb(PKT_BUF_SZ);
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if (skb == NULL) {
|
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static unsigned long last_jif;
|
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if ((jiffies - last_jif) > 10 * HZ) {
|
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if (time_after(jiffies, last_jif + 10 * HZ)) {
|
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printk(KERN_WARNING "%s: memory shortage\n", dev->name);
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last_jif = jiffies;
|
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}
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|
|
|
@ -36,6 +36,7 @@
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|||
#include <linux/delay.h>
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#include <linux/netdevice.h>
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#include <linux/etherdevice.h>
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#include <linux/jiffies.h>
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|
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#include <asm/system.h>
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#include <asm/io.h>
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|
@ -216,7 +217,7 @@ static int __init apne_probe1(struct net_device *dev, int ioaddr)
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outb(inb(ioaddr + NE_RESET), ioaddr + NE_RESET);
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|
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while ((inb(ioaddr + NE_EN0_ISR) & ENISR_RESET) == 0)
|
||||
if (jiffies - reset_start_time > 2*HZ/100) {
|
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if (time_after(jiffies, reset_start_time + 2*HZ/100)) {
|
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printk(" not found (no reset ack).\n");
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return -ENODEV;
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}
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|
@ -382,7 +383,7 @@ apne_reset_8390(struct net_device *dev)
|
|||
|
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/* This check _should_not_ be necessary, omit eventually. */
|
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while ((inb(NE_BASE+NE_EN0_ISR) & ENISR_RESET) == 0)
|
||||
if (jiffies - reset_start_time > 2*HZ/100) {
|
||||
if (time_after(jiffies, reset_start_time + 2*HZ/100)) {
|
||||
printk("%s: ne_reset_8390() did not complete.\n", dev->name);
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break;
|
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}
|
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|
@ -530,7 +531,7 @@ apne_block_output(struct net_device *dev, int count,
|
|||
dma_start = jiffies;
|
||||
|
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while ((inb(NE_BASE + NE_EN0_ISR) & ENISR_RDC) == 0)
|
||||
if (jiffies - dma_start > 2*HZ/100) { /* 20ms */
|
||||
if (time_after(jiffies, dma_start + 2*HZ/100)) { /* 20ms */
|
||||
printk("%s: timeout waiting for Tx RDC.\n", dev->name);
|
||||
apne_reset_8390(dev);
|
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NS8390_init(dev,1);
|
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|
|
|
@ -42,7 +42,7 @@ static int build_header(struct sk_buff *skb, struct net_device *dev,
|
|||
static int prepare_tx(struct net_device *dev, struct archdr *pkt, int length,
|
||||
int bufnum);
|
||||
|
||||
struct ArcProto rawmode_proto =
|
||||
static struct ArcProto rawmode_proto =
|
||||
{
|
||||
.suffix = 'r',
|
||||
.mtu = XMTU,
|
||||
|
|
|
@ -52,6 +52,7 @@
|
|||
#include <net/arp.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/arcdevice.h>
|
||||
#include <linux/jiffies.h>
|
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|
||||
/* "do nothing" functions for protocol drivers */
|
||||
static void null_rx(struct net_device *dev, int bufnum,
|
||||
|
@ -61,6 +62,7 @@ static int null_build_header(struct sk_buff *skb, struct net_device *dev,
|
|||
static int null_prepare_tx(struct net_device *dev, struct archdr *pkt,
|
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int length, int bufnum);
|
||||
|
||||
static void arcnet_rx(struct net_device *dev, int bufnum);
|
||||
|
||||
/*
|
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* one ArcProto per possible proto ID. None of the elements of
|
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|
@ -71,7 +73,7 @@ static int null_prepare_tx(struct net_device *dev, struct archdr *pkt,
|
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struct ArcProto *arc_proto_map[256], *arc_proto_default,
|
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*arc_bcast_proto, *arc_raw_proto;
|
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|
||||
struct ArcProto arc_proto_null =
|
||||
static struct ArcProto arc_proto_null =
|
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{
|
||||
.suffix = '?',
|
||||
.mtu = XMTU,
|
||||
|
@ -90,7 +92,6 @@ EXPORT_SYMBOL(arc_proto_map);
|
|||
EXPORT_SYMBOL(arc_proto_default);
|
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EXPORT_SYMBOL(arc_bcast_proto);
|
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EXPORT_SYMBOL(arc_raw_proto);
|
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EXPORT_SYMBOL(arc_proto_null);
|
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EXPORT_SYMBOL(arcnet_unregister_proto);
|
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EXPORT_SYMBOL(arcnet_debug);
|
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EXPORT_SYMBOL(alloc_arcdev);
|
||||
|
@ -118,7 +119,7 @@ static int __init arcnet_init(void)
|
|||
|
||||
arcnet_debug = debug;
|
||||
|
||||
printk(VERSION);
|
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printk("arcnet loaded.\n");
|
||||
|
||||
#ifdef ALPHA_WARNING
|
||||
BUGLVL(D_EXTRA) {
|
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|
@ -178,8 +179,8 @@ EXPORT_SYMBOL(arcnet_dump_skb);
|
|||
* Dump the contents of an ARCnet buffer
|
||||
*/
|
||||
#if (ARCNET_DEBUG_MAX & (D_RX | D_TX))
|
||||
void arcnet_dump_packet(struct net_device *dev, int bufnum, char *desc,
|
||||
int take_arcnet_lock)
|
||||
static void arcnet_dump_packet(struct net_device *dev, int bufnum,
|
||||
char *desc, int take_arcnet_lock)
|
||||
{
|
||||
struct arcnet_local *lp = dev->priv;
|
||||
int i, length;
|
||||
|
@ -208,7 +209,10 @@ void arcnet_dump_packet(struct net_device *dev, int bufnum, char *desc,
|
|||
|
||||
}
|
||||
|
||||
EXPORT_SYMBOL(arcnet_dump_packet);
|
||||
#else
|
||||
|
||||
#define arcnet_dump_packet(dev, bufnum, desc,take_arcnet_lock) do { } while (0)
|
||||
|
||||
#endif
|
||||
|
||||
|
||||
|
@ -733,7 +737,7 @@ static void arcnet_timeout(struct net_device *dev)
|
|||
|
||||
spin_unlock_irqrestore(&lp->lock, flags);
|
||||
|
||||
if (jiffies - lp->last_timeout > 10*HZ) {
|
||||
if (time_after(jiffies, lp->last_timeout + 10*HZ)) {
|
||||
BUGMSG(D_EXTRA, "tx timed out%s (status=%Xh, intmask=%Xh, dest=%02Xh)\n",
|
||||
msg, status, lp->intmask, lp->lasttrans_dest);
|
||||
lp->last_timeout = jiffies;
|
||||
|
@ -996,7 +1000,7 @@ irqreturn_t arcnet_interrupt(int irq, void *dev_id, struct pt_regs *regs)
|
|||
* This is a generic packet receiver that calls arcnet??_rx depending on the
|
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* protocol ID found.
|
||||
*/
|
||||
void arcnet_rx(struct net_device *dev, int bufnum)
|
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static void arcnet_rx(struct net_device *dev, int bufnum)
|
||||
{
|
||||
struct arcnet_local *lp = dev->priv;
|
||||
struct archdr pkt;
|
||||
|
|
|
@ -43,7 +43,7 @@ static int prepare_tx(struct net_device *dev, struct archdr *pkt, int length,
|
|||
int bufnum);
|
||||
|
||||
|
||||
struct ArcProto rfc1051_proto =
|
||||
static struct ArcProto rfc1051_proto =
|
||||
{
|
||||
.suffix = 's',
|
||||
.mtu = XMTU - RFC1051_HDR_SIZE,
|
||||
|
|
|
@ -43,7 +43,7 @@ static int prepare_tx(struct net_device *dev, struct archdr *pkt, int length,
|
|||
int bufnum);
|
||||
static int continue_tx(struct net_device *dev, int bufnum);
|
||||
|
||||
struct ArcProto rfc1201_proto =
|
||||
static struct ArcProto rfc1201_proto =
|
||||
{
|
||||
.suffix = 'a',
|
||||
.mtu = 1500, /* could be more, but some receivers can't handle it... */
|
||||
|
|
|
@ -46,6 +46,7 @@
|
|||
#include <linux/device.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/bitops.h>
|
||||
#include <linux/jiffies.h>
|
||||
|
||||
#include <asm/system.h>
|
||||
#include <asm/ecard.h>
|
||||
|
@ -355,7 +356,7 @@ etherh_block_output (struct net_device *dev, int count, const unsigned char *buf
|
|||
dma_start = jiffies;
|
||||
|
||||
while ((readb (addr + EN0_ISR) & ENISR_RDC) == 0)
|
||||
if (jiffies - dma_start > 2*HZ/100) { /* 20ms */
|
||||
if (time_after(jiffies, dma_start + 2*HZ/100)) { /* 20ms */
|
||||
printk(KERN_ERR "%s: timeout waiting for TX RDC\n",
|
||||
dev->name);
|
||||
etherh_reset (dev);
|
||||
|
|
|
@ -161,6 +161,7 @@ static char *version =
|
|||
#include <linux/etherdevice.h>
|
||||
#include <linux/skbuff.h>
|
||||
#include <linux/bitops.h>
|
||||
#include <linux/jiffies.h>
|
||||
|
||||
#include <asm/system.h>
|
||||
#include <asm/io.h>
|
||||
|
@ -754,7 +755,7 @@ static void eth16i_set_port(int ioaddr, int porttype)
|
|||
|
||||
static int eth16i_send_probe_packet(int ioaddr, unsigned char *b, int l)
|
||||
{
|
||||
int starttime;
|
||||
unsigned long starttime;
|
||||
|
||||
outb(0xff, ioaddr + TX_STATUS_REG);
|
||||
|
||||
|
@ -765,7 +766,7 @@ static int eth16i_send_probe_packet(int ioaddr, unsigned char *b, int l)
|
|||
outb(TX_START | 1, ioaddr + TRANSMIT_START_REG);
|
||||
|
||||
while( (inb(ioaddr + TX_STATUS_REG) & 0x80) == 0) {
|
||||
if( (jiffies - starttime) > TX_TIMEOUT) {
|
||||
if( time_after(jiffies, starttime + TX_TIMEOUT)) {
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
|
@ -775,18 +776,18 @@ static int eth16i_send_probe_packet(int ioaddr, unsigned char *b, int l)
|
|||
|
||||
static int eth16i_receive_probe_packet(int ioaddr)
|
||||
{
|
||||
int starttime;
|
||||
unsigned long starttime;
|
||||
|
||||
starttime = jiffies;
|
||||
|
||||
while((inb(ioaddr + TX_STATUS_REG) & 0x20) == 0) {
|
||||
if( (jiffies - starttime) > TX_TIMEOUT) {
|
||||
if( time_after(jiffies, starttime + TX_TIMEOUT)) {
|
||||
|
||||
if(eth16i_debug > 1)
|
||||
printk(KERN_DEBUG "Timeout occurred waiting transmit packet received\n");
|
||||
starttime = jiffies;
|
||||
while((inb(ioaddr + RX_STATUS_REG) & 0x80) == 0) {
|
||||
if( (jiffies - starttime) > TX_TIMEOUT) {
|
||||
if( time_after(jiffies, starttime + TX_TIMEOUT)) {
|
||||
if(eth16i_debug > 1)
|
||||
printk(KERN_DEBUG "Timeout occurred waiting receive packet\n");
|
||||
return -1;
|
||||
|
|
|
@ -905,7 +905,7 @@ static int epp_open(struct net_device *dev)
|
|||
/* autoprobe baud rate */
|
||||
tstart = jiffies;
|
||||
i = 0;
|
||||
while ((signed)(jiffies-tstart-HZ/3) < 0) {
|
||||
while (time_before(jiffies, tstart + HZ/3)) {
|
||||
if (pp->ops->epp_read_addr(pp, &stat, 1, 0) != 1)
|
||||
goto epptimeout;
|
||||
if ((stat & (EPP_NRAEF|EPP_NRHF)) == EPP_NRHF) {
|
||||
|
|
|
@ -115,6 +115,7 @@
|
|||
#include <linux/delay.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/bitops.h>
|
||||
#include <linux/jiffies.h>
|
||||
|
||||
#include <asm/io.h>
|
||||
|
||||
|
@ -1499,7 +1500,7 @@ static int hp100_start_xmit_bm(struct sk_buff *skb, struct net_device *dev)
|
|||
printk("hp100: %s: start_xmit_bm: No TX PDL available.\n", dev->name);
|
||||
#endif
|
||||
/* not waited long enough since last tx? */
|
||||
if (jiffies - dev->trans_start < HZ)
|
||||
if (time_before(jiffies, dev->trans_start + HZ))
|
||||
return -EAGAIN;
|
||||
|
||||
if (hp100_check_lan(dev))
|
||||
|
@ -1652,7 +1653,7 @@ static int hp100_start_xmit(struct sk_buff *skb, struct net_device *dev)
|
|||
printk("hp100: %s: start_xmit: tx free mem = 0x%x\n", dev->name, i);
|
||||
#endif
|
||||
/* not waited long enough since last failed tx try? */
|
||||
if (jiffies - dev->trans_start < HZ) {
|
||||
if (time_before(jiffies, dev->trans_start + HZ)) {
|
||||
#ifdef HP100_DEBUG
|
||||
printk("hp100: %s: trans_start timing problem\n",
|
||||
dev->name);
|
||||
|
|
|
@ -27,6 +27,7 @@ static const char version1[] =
|
|||
#include <linux/delay.h>
|
||||
#include <linux/netdevice.h>
|
||||
#include <linux/etherdevice.h>
|
||||
#include <linux/jiffies.h>
|
||||
|
||||
#include <asm/system.h>
|
||||
#include <asm/io.h>
|
||||
|
@ -365,7 +366,7 @@ static void ne_reset_8390(struct net_device *dev)
|
|||
|
||||
/* This check _should_not_ be necessary, omit eventually. */
|
||||
while ((inb_p(NE_BASE+EN0_ISR) & ENISR_RESET) == 0)
|
||||
if (jiffies - reset_start_time > 2*HZ/100) {
|
||||
if (time_after(jiffies, reset_start_time + 2*HZ/100)) {
|
||||
printk(KERN_WARNING "%s: ne_reset_8390() did not complete.\n", dev->name);
|
||||
break;
|
||||
}
|
||||
|
@ -580,7 +581,7 @@ retry:
|
|||
#endif
|
||||
|
||||
while ((inb_p(NE_BASE + EN0_ISR) & ENISR_RDC) == 0)
|
||||
if (jiffies - dma_start > 2*HZ/100) { /* 20ms */
|
||||
if (time_after(jiffies, dma_start + 2*HZ/100)) { /* 20ms */
|
||||
printk(KERN_WARNING "%s: timeout waiting for Tx RDC.\n", dev->name);
|
||||
ne_reset_8390(dev);
|
||||
NS8390_init(dev,1);
|
||||
|
|
|
@ -50,6 +50,7 @@ static const char version2[] =
|
|||
#include <linux/delay.h>
|
||||
#include <linux/netdevice.h>
|
||||
#include <linux/etherdevice.h>
|
||||
#include <linux/jiffies.h>
|
||||
|
||||
#include <asm/system.h>
|
||||
#include <asm/io.h>
|
||||
|
@ -341,7 +342,7 @@ static int __init ne_probe1(struct net_device *dev, int ioaddr)
|
|||
outb(inb(ioaddr + NE_RESET), ioaddr + NE_RESET);
|
||||
|
||||
while ((inb_p(ioaddr + EN0_ISR) & ENISR_RESET) == 0)
|
||||
if (jiffies - reset_start_time > 2*HZ/100) {
|
||||
if (time_after(jiffies, reset_start_time + 2*HZ/100)) {
|
||||
if (bad_card) {
|
||||
printk(" (warning: no reset ack)");
|
||||
break;
|
||||
|
@ -580,7 +581,7 @@ static void ne_reset_8390(struct net_device *dev)
|
|||
|
||||
/* This check _should_not_ be necessary, omit eventually. */
|
||||
while ((inb_p(NE_BASE+EN0_ISR) & ENISR_RESET) == 0)
|
||||
if (jiffies - reset_start_time > 2*HZ/100) {
|
||||
if (time_after(jiffies, reset_start_time + 2*HZ/100)) {
|
||||
printk(KERN_WARNING "%s: ne_reset_8390() did not complete.\n", dev->name);
|
||||
break;
|
||||
}
|
||||
|
@ -787,7 +788,7 @@ retry:
|
|||
#endif
|
||||
|
||||
while ((inb_p(nic_base + EN0_ISR) & ENISR_RDC) == 0)
|
||||
if (jiffies - dma_start > 2*HZ/100) { /* 20ms */
|
||||
if (time_after(jiffies, dma_start + 2*HZ/100)) { /* 20ms */
|
||||
printk(KERN_WARNING "%s: timeout waiting for Tx RDC.\n", dev->name);
|
||||
ne_reset_8390(dev);
|
||||
NS8390_init(dev,1);
|
||||
|
|
|
@ -75,6 +75,7 @@ static const char *version = "ne2.c:v0.91 Nov 16 1998 Wim Dumon <wimpie@kotnet.o
|
|||
#include <linux/etherdevice.h>
|
||||
#include <linux/skbuff.h>
|
||||
#include <linux/bitops.h>
|
||||
#include <linux/jiffies.h>
|
||||
|
||||
#include <asm/system.h>
|
||||
#include <asm/io.h>
|
||||
|
@ -395,7 +396,7 @@ static int __init ne2_probe1(struct net_device *dev, int slot)
|
|||
outb(inb(base_addr + NE_RESET), base_addr + NE_RESET);
|
||||
|
||||
while ((inb_p(base_addr + EN0_ISR) & ENISR_RESET) == 0)
|
||||
if (jiffies - reset_start_time > 2*HZ/100) {
|
||||
if (time_after(jiffies, reset_start_time + 2*HZ/100)) {
|
||||
printk(" not found (no reset ack).\n");
|
||||
retval = -ENODEV;
|
||||
goto out;
|
||||
|
@ -548,7 +549,7 @@ static void ne_reset_8390(struct net_device *dev)
|
|||
|
||||
/* This check _should_not_ be necessary, omit eventually. */
|
||||
while ((inb_p(NE_BASE+EN0_ISR) & ENISR_RESET) == 0)
|
||||
if (jiffies - reset_start_time > 2*HZ/100) {
|
||||
if (time_after(jiffies, reset_start_time + 2*HZ/100)) {
|
||||
printk("%s: ne_reset_8390() did not complete.\n",
|
||||
dev->name);
|
||||
break;
|
||||
|
@ -749,7 +750,7 @@ retry:
|
|||
#endif
|
||||
|
||||
while ((inb_p(nic_base + EN0_ISR) & ENISR_RDC) == 0)
|
||||
if (jiffies - dma_start > 2*HZ/100) { /* 20ms */
|
||||
if (time_after(jiffies, dma_start + 2*HZ/100)) { /* 20ms */
|
||||
printk("%s: timeout waiting for Tx RDC.\n", dev->name);
|
||||
ne_reset_8390(dev);
|
||||
NS8390_init(dev,1);
|
||||
|
|
|
@ -116,6 +116,7 @@
|
|||
#include <linux/timer.h>
|
||||
#include <linux/if_vlan.h>
|
||||
#include <linux/rtnetlink.h>
|
||||
#include <linux/jiffies.h>
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <asm/uaccess.h>
|
||||
|
@ -1607,7 +1608,7 @@ static void ns83820_run_bist(struct net_device *ndev, const char *name, u32 enab
|
|||
{
|
||||
struct ns83820 *dev = PRIV(ndev);
|
||||
int timed_out = 0;
|
||||
long start;
|
||||
unsigned long start;
|
||||
u32 status;
|
||||
int loops = 0;
|
||||
|
||||
|
@ -1625,7 +1626,7 @@ static void ns83820_run_bist(struct net_device *ndev, const char *name, u32 enab
|
|||
break;
|
||||
if (status & fail)
|
||||
break;
|
||||
if ((jiffies - start) >= HZ) {
|
||||
if (time_after_eq(jiffies, start + HZ)) {
|
||||
timed_out = 1;
|
||||
break;
|
||||
}
|
||||
|
|
|
@ -20,6 +20,7 @@
|
|||
#include <linux/netdevice.h>
|
||||
#include <linux/etherdevice.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/jiffies.h>
|
||||
|
||||
#include <asm/board.h>
|
||||
#include <asm/io.h>
|
||||
|
@ -606,7 +607,7 @@ retry:
|
|||
#endif
|
||||
|
||||
while ((ei_ibp(base + EN0_ISR) & ENISR_RDC) == 0) {
|
||||
if (jiffies - start > OAKNET_WAIT) {
|
||||
if (time_after(jiffies, start + OAKNET_WAIT)) {
|
||||
printk("%s: timeout waiting for Tx RDC.\n", dev->name);
|
||||
oaknet_reset_8390(dev);
|
||||
NS8390_init(dev, TRUE);
|
||||
|
|
|
@ -39,6 +39,7 @@
|
|||
#include <linux/if_arp.h>
|
||||
#include <linux/ioport.h>
|
||||
#include <linux/bitops.h>
|
||||
#include <linux/jiffies.h>
|
||||
|
||||
#include <pcmcia/cs_types.h>
|
||||
#include <pcmcia/cs.h>
|
||||
|
@ -796,7 +797,7 @@ static void media_check(unsigned long arg)
|
|||
media = inw(ioaddr+WN4_MEDIA) & 0xc810;
|
||||
|
||||
/* Ignore collisions unless we've had no irq's recently */
|
||||
if (jiffies - lp->last_irq < HZ) {
|
||||
if (time_before(jiffies, lp->last_irq + HZ)) {
|
||||
media &= ~0x0010;
|
||||
} else {
|
||||
/* Try harder to detect carrier errors */
|
||||
|
|
|
@ -30,6 +30,7 @@
|
|||
#include <linux/ppp_channel.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/jiffies.h>
|
||||
#include <asm/uaccess.h>
|
||||
#include <asm/string.h>
|
||||
|
||||
|
@ -570,7 +571,7 @@ ppp_async_encode(struct asyncppp *ap)
|
|||
* character if necessary.
|
||||
*/
|
||||
if (islcp || flag_time == 0
|
||||
|| jiffies - ap->last_xmit >= flag_time)
|
||||
|| time_after_eq(jiffies, ap->last_xmit + flag_time))
|
||||
*buf++ = PPP_FLAG;
|
||||
ap->last_xmit = jiffies;
|
||||
fcs = PPP_INITFCS;
|
||||
|
|
|
@ -72,8 +72,8 @@
|
|||
static char s2io_driver_name[] = "Neterion";
|
||||
static char s2io_driver_version[] = DRV_VERSION;
|
||||
|
||||
int rxd_size[4] = {32,48,48,64};
|
||||
int rxd_count[4] = {127,85,85,63};
|
||||
static int rxd_size[4] = {32,48,48,64};
|
||||
static int rxd_count[4] = {127,85,85,63};
|
||||
|
||||
static inline int RXD_IS_UP2DT(RxD_t *rxdp)
|
||||
{
|
||||
|
@ -2127,7 +2127,7 @@ static void stop_nic(struct s2io_nic *nic)
|
|||
}
|
||||
}
|
||||
|
||||
int fill_rxd_3buf(nic_t *nic, RxD_t *rxdp, struct sk_buff *skb)
|
||||
static int fill_rxd_3buf(nic_t *nic, RxD_t *rxdp, struct sk_buff *skb)
|
||||
{
|
||||
struct net_device *dev = nic->dev;
|
||||
struct sk_buff *frag_list;
|
||||
|
@ -2852,7 +2852,7 @@ static int wait_for_cmd_complete(nic_t * sp)
|
|||
* void.
|
||||
*/
|
||||
|
||||
void s2io_reset(nic_t * sp)
|
||||
static void s2io_reset(nic_t * sp)
|
||||
{
|
||||
XENA_dev_config_t __iomem *bar0 = sp->bar0;
|
||||
u64 val64;
|
||||
|
@ -2940,7 +2940,7 @@ void s2io_reset(nic_t * sp)
|
|||
* SUCCESS on success and FAILURE on failure.
|
||||
*/
|
||||
|
||||
int s2io_set_swapper(nic_t * sp)
|
||||
static int s2io_set_swapper(nic_t * sp)
|
||||
{
|
||||
struct net_device *dev = sp->dev;
|
||||
XENA_dev_config_t __iomem *bar0 = sp->bar0;
|
||||
|
@ -3089,7 +3089,7 @@ static int wait_for_msix_trans(nic_t *nic, int i)
|
|||
return ret;
|
||||
}
|
||||
|
||||
void restore_xmsi_data(nic_t *nic)
|
||||
static void restore_xmsi_data(nic_t *nic)
|
||||
{
|
||||
XENA_dev_config_t __iomem *bar0 = nic->bar0;
|
||||
u64 val64;
|
||||
|
@ -3180,7 +3180,7 @@ int s2io_enable_msi(nic_t *nic)
|
|||
return 0;
|
||||
}
|
||||
|
||||
int s2io_enable_msi_x(nic_t *nic)
|
||||
static int s2io_enable_msi_x(nic_t *nic)
|
||||
{
|
||||
XENA_dev_config_t __iomem *bar0 = nic->bar0;
|
||||
u64 tx_mat, rx_mat;
|
||||
|
@ -4128,7 +4128,7 @@ static void s2io_set_multicast(struct net_device *dev)
|
|||
* as defined in errno.h file on failure.
|
||||
*/
|
||||
|
||||
int s2io_set_mac_addr(struct net_device *dev, u8 * addr)
|
||||
static int s2io_set_mac_addr(struct net_device *dev, u8 * addr)
|
||||
{
|
||||
nic_t *sp = dev->priv;
|
||||
XENA_dev_config_t __iomem *bar0 = sp->bar0;
|
||||
|
@ -5713,7 +5713,7 @@ static int rx_osm_handler(ring_info_t *ring_data, RxD_t * rxdp)
|
|||
* void.
|
||||
*/
|
||||
|
||||
void s2io_link(nic_t * sp, int link)
|
||||
static void s2io_link(nic_t * sp, int link)
|
||||
{
|
||||
struct net_device *dev = (struct net_device *) sp->dev;
|
||||
|
||||
|
@ -5738,7 +5738,7 @@ void s2io_link(nic_t * sp, int link)
|
|||
* returns the revision ID of the device.
|
||||
*/
|
||||
|
||||
int get_xena_rev_id(struct pci_dev *pdev)
|
||||
static int get_xena_rev_id(struct pci_dev *pdev)
|
||||
{
|
||||
u8 id = 0;
|
||||
int ret;
|
||||
|
@ -6343,7 +6343,7 @@ int __init s2io_starter(void)
|
|||
* Description: This function is the cleanup routine for the driver. It unregist * ers the driver.
|
||||
*/
|
||||
|
||||
void s2io_closer(void)
|
||||
static void s2io_closer(void)
|
||||
{
|
||||
pci_unregister_driver(&s2io_driver);
|
||||
DBG_PRINT(INIT_DBG, "cleanup done\n");
|
||||
|
|
|
@ -64,7 +64,7 @@ typedef enum xena_max_outstanding_splits {
|
|||
#define INTR_DBG 4
|
||||
|
||||
/* Global variable that defines the present debug level of the driver. */
|
||||
int debug_level = ERR_DBG; /* Default level. */
|
||||
static int debug_level = ERR_DBG;
|
||||
|
||||
/* DEBUG message print. */
|
||||
#define DBG_PRINT(dbg_level, args...) if(!(debug_level<dbg_level)) printk(args)
|
||||
|
@ -268,7 +268,7 @@ typedef struct stat_block {
|
|||
#define MAX_RX_RINGS 8
|
||||
|
||||
/* FIFO mappings for all possible number of fifos configured */
|
||||
int fifo_map[][MAX_TX_FIFOS] = {
|
||||
static int fifo_map[][MAX_TX_FIFOS] = {
|
||||
{0, 0, 0, 0, 0, 0, 0, 0},
|
||||
{0, 0, 0, 0, 1, 1, 1, 1},
|
||||
{0, 0, 0, 1, 1, 1, 2, 2},
|
||||
|
@ -911,18 +911,16 @@ static void tx_intr_handler(fifo_info_t *fifo_data);
|
|||
static void alarm_intr_handler(struct s2io_nic *sp);
|
||||
|
||||
static int s2io_starter(void);
|
||||
void s2io_closer(void);
|
||||
static void s2io_tx_watchdog(struct net_device *dev);
|
||||
static void s2io_tasklet(unsigned long dev_addr);
|
||||
static void s2io_set_multicast(struct net_device *dev);
|
||||
static int rx_osm_handler(ring_info_t *ring_data, RxD_t * rxdp);
|
||||
void s2io_link(nic_t * sp, int link);
|
||||
void s2io_reset(nic_t * sp);
|
||||
static void s2io_link(nic_t * sp, int link);
|
||||
#if defined(CONFIG_S2IO_NAPI)
|
||||
static int s2io_poll(struct net_device *dev, int *budget);
|
||||
#endif
|
||||
static void s2io_init_pci(nic_t * sp);
|
||||
int s2io_set_mac_addr(struct net_device *dev, u8 * addr);
|
||||
static int s2io_set_mac_addr(struct net_device *dev, u8 * addr);
|
||||
static void s2io_alarm_handle(unsigned long data);
|
||||
static int s2io_enable_msi(nic_t *nic);
|
||||
static irqreturn_t s2io_msi_handle(int irq, void *dev_id, struct pt_regs *regs);
|
||||
|
@ -930,14 +928,13 @@ static irqreturn_t
|
|||
s2io_msix_ring_handle(int irq, void *dev_id, struct pt_regs *regs);
|
||||
static irqreturn_t
|
||||
s2io_msix_fifo_handle(int irq, void *dev_id, struct pt_regs *regs);
|
||||
int s2io_enable_msi_x(nic_t *nic);
|
||||
static irqreturn_t s2io_isr(int irq, void *dev_id, struct pt_regs *regs);
|
||||
static int verify_xena_quiescence(nic_t *sp, u64 val64, int flag);
|
||||
static struct ethtool_ops netdev_ethtool_ops;
|
||||
static void s2io_set_link(unsigned long data);
|
||||
int s2io_set_swapper(nic_t * sp);
|
||||
static int s2io_set_swapper(nic_t * sp);
|
||||
static void s2io_card_down(nic_t *nic);
|
||||
static int s2io_card_up(nic_t *nic);
|
||||
int get_xena_rev_id(struct pci_dev *pdev);
|
||||
void restore_xmsi_data(nic_t *nic);
|
||||
static int get_xena_rev_id(struct pci_dev *pdev);
|
||||
static void restore_xmsi_data(nic_t *nic);
|
||||
#endif /* _S2IO_H */
|
||||
|
|
|
@ -46,6 +46,7 @@ static const char version[] =
|
|||
#include <linux/etherdevice.h>
|
||||
#include <linux/skbuff.h>
|
||||
#include <linux/bitops.h>
|
||||
#include <linux/jiffies.h>
|
||||
|
||||
#include <asm/system.h>
|
||||
#include <asm/io.h>
|
||||
|
@ -699,7 +700,7 @@ static void hardware_send_packet(struct net_device * dev, char *buf, int length)
|
|||
int ioaddr = dev->base_addr;
|
||||
int status = inw(SEEQ_STATUS);
|
||||
int transmit_ptr = 0;
|
||||
int tmp;
|
||||
unsigned long tmp;
|
||||
|
||||
if (net_debug>4) {
|
||||
printk("%s: send 0x%04x\n",dev->name,length);
|
||||
|
@ -724,7 +725,7 @@ static void hardware_send_packet(struct net_device * dev, char *buf, int length)
|
|||
|
||||
/* drain FIFO */
|
||||
tmp = jiffies;
|
||||
while ( (((status=inw(SEEQ_STATUS)) & SEEQSTAT_FIFO_EMPTY) == 0) && (jiffies - tmp < HZ))
|
||||
while ( (((status=inw(SEEQ_STATUS)) & SEEQSTAT_FIFO_EMPTY) == 0) && time_before(jiffies, tmp + HZ))
|
||||
mb();
|
||||
|
||||
/* doit ! */
|
||||
|
|
|
@ -83,6 +83,7 @@
|
|||
#include <linux/if_arp.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/if_shaper.h>
|
||||
#include <linux/jiffies.h>
|
||||
|
||||
#include <net/dst.h>
|
||||
#include <net/arp.h>
|
||||
|
@ -168,7 +169,7 @@ static int shaper_start_xmit(struct sk_buff *skb, struct net_device *dev)
|
|||
/*
|
||||
* Queue over time. Spill packet.
|
||||
*/
|
||||
if(SHAPERCB(skb)->shapeclock-jiffies > SHAPER_LATENCY) {
|
||||
if(time_after(SHAPERCB(skb)->shapeclock,jiffies + SHAPER_LATENCY)) {
|
||||
dev_kfree_skb(skb);
|
||||
shaper->stats.tx_dropped++;
|
||||
} else
|
||||
|
|
|
@ -236,18 +236,6 @@ extern int SkAddrMcClear(
|
|||
SK_U32 PortNumber,
|
||||
int Flags);
|
||||
|
||||
extern int SkAddrXmacMcClear(
|
||||
SK_AC *pAC,
|
||||
SK_IOC IoC,
|
||||
SK_U32 PortNumber,
|
||||
int Flags);
|
||||
|
||||
extern int SkAddrGmacMcClear(
|
||||
SK_AC *pAC,
|
||||
SK_IOC IoC,
|
||||
SK_U32 PortNumber,
|
||||
int Flags);
|
||||
|
||||
extern int SkAddrMcAdd(
|
||||
SK_AC *pAC,
|
||||
SK_IOC IoC,
|
||||
|
@ -255,35 +243,11 @@ extern int SkAddrMcAdd(
|
|||
SK_MAC_ADDR *pMc,
|
||||
int Flags);
|
||||
|
||||
extern int SkAddrXmacMcAdd(
|
||||
SK_AC *pAC,
|
||||
SK_IOC IoC,
|
||||
SK_U32 PortNumber,
|
||||
SK_MAC_ADDR *pMc,
|
||||
int Flags);
|
||||
|
||||
extern int SkAddrGmacMcAdd(
|
||||
SK_AC *pAC,
|
||||
SK_IOC IoC,
|
||||
SK_U32 PortNumber,
|
||||
SK_MAC_ADDR *pMc,
|
||||
int Flags);
|
||||
|
||||
extern int SkAddrMcUpdate(
|
||||
SK_AC *pAC,
|
||||
SK_IOC IoC,
|
||||
SK_U32 PortNumber);
|
||||
|
||||
extern int SkAddrXmacMcUpdate(
|
||||
SK_AC *pAC,
|
||||
SK_IOC IoC,
|
||||
SK_U32 PortNumber);
|
||||
|
||||
extern int SkAddrGmacMcUpdate(
|
||||
SK_AC *pAC,
|
||||
SK_IOC IoC,
|
||||
SK_U32 PortNumber);
|
||||
|
||||
extern int SkAddrOverride(
|
||||
SK_AC *pAC,
|
||||
SK_IOC IoC,
|
||||
|
@ -297,18 +261,6 @@ extern int SkAddrPromiscuousChange(
|
|||
SK_U32 PortNumber,
|
||||
int NewPromMode);
|
||||
|
||||
extern int SkAddrXmacPromiscuousChange(
|
||||
SK_AC *pAC,
|
||||
SK_IOC IoC,
|
||||
SK_U32 PortNumber,
|
||||
int NewPromMode);
|
||||
|
||||
extern int SkAddrGmacPromiscuousChange(
|
||||
SK_AC *pAC,
|
||||
SK_IOC IoC,
|
||||
SK_U32 PortNumber,
|
||||
int NewPromMode);
|
||||
|
||||
#ifndef SK_SLIM
|
||||
extern int SkAddrSwap(
|
||||
SK_AC *pAC,
|
||||
|
|
|
@ -203,12 +203,6 @@ extern SKCS_STATUS SkCsGetReceiveInfo(
|
|||
unsigned Checksum2,
|
||||
int NetNumber);
|
||||
|
||||
extern void SkCsGetSendInfo(
|
||||
SK_AC *pAc,
|
||||
void *pIpHeader,
|
||||
SKCS_PACKET_INFO *pPacketInfo,
|
||||
int NetNumber);
|
||||
|
||||
extern void SkCsSetReceiveFlags(
|
||||
SK_AC *pAc,
|
||||
unsigned ReceiveFlags,
|
||||
|
|
|
@ -464,12 +464,6 @@ typedef struct s_GeInit {
|
|||
/*
|
||||
* public functions in skgeinit.c
|
||||
*/
|
||||
extern void SkGePollRxD(
|
||||
SK_AC *pAC,
|
||||
SK_IOC IoC,
|
||||
int Port,
|
||||
SK_BOOL PollRxD);
|
||||
|
||||
extern void SkGePollTxD(
|
||||
SK_AC *pAC,
|
||||
SK_IOC IoC,
|
||||
|
@ -522,10 +516,6 @@ extern void SkGeXmitLED(
|
|||
int Led,
|
||||
int Mode);
|
||||
|
||||
extern void SkGeInitRamIface(
|
||||
SK_AC *pAC,
|
||||
SK_IOC IoC);
|
||||
|
||||
extern int SkGeInitAssignRamToQueues(
|
||||
SK_AC *pAC,
|
||||
int ActivePort,
|
||||
|
@ -549,11 +539,6 @@ extern void SkMacHardRst(
|
|||
SK_IOC IoC,
|
||||
int Port);
|
||||
|
||||
extern void SkMacClearRst(
|
||||
SK_AC *pAC,
|
||||
SK_IOC IoC,
|
||||
int Port);
|
||||
|
||||
extern void SkXmInitMac(
|
||||
SK_AC *pAC,
|
||||
SK_IOC IoC,
|
||||
|
@ -580,11 +565,6 @@ extern void SkMacFlushTxFifo(
|
|||
SK_IOC IoC,
|
||||
int Port);
|
||||
|
||||
extern void SkMacFlushRxFifo(
|
||||
SK_AC *pAC,
|
||||
SK_IOC IoC,
|
||||
int Port);
|
||||
|
||||
extern void SkMacIrq(
|
||||
SK_AC *pAC,
|
||||
SK_IOC IoC,
|
||||
|
@ -601,12 +581,6 @@ extern void SkMacAutoNegLipaPhy(
|
|||
int Port,
|
||||
SK_U16 IStatus);
|
||||
|
||||
extern void SkMacSetRxTxEn(
|
||||
SK_AC *pAC,
|
||||
SK_IOC IoC,
|
||||
int Port,
|
||||
int Para);
|
||||
|
||||
extern int SkMacRxTxEnable(
|
||||
SK_AC *pAC,
|
||||
SK_IOC IoC,
|
||||
|
@ -659,16 +633,6 @@ extern void SkXmClrExactAddr(
|
|||
int StartNum,
|
||||
int StopNum);
|
||||
|
||||
extern void SkXmInitDupMd(
|
||||
SK_AC *pAC,
|
||||
SK_IOC IoC,
|
||||
int Port);
|
||||
|
||||
extern void SkXmInitPauseMd(
|
||||
SK_AC *pAC,
|
||||
SK_IOC IoC,
|
||||
int Port);
|
||||
|
||||
extern void SkXmAutoNegLipaXmac(
|
||||
SK_AC *pAC,
|
||||
SK_IOC IoC,
|
||||
|
@ -729,17 +693,6 @@ extern int SkGmCableDiagStatus(
|
|||
int Port,
|
||||
SK_BOOL StartTest);
|
||||
|
||||
extern int SkGmEnterLowPowerMode(
|
||||
SK_AC *pAC,
|
||||
SK_IOC IoC,
|
||||
int Port,
|
||||
SK_U8 Mode);
|
||||
|
||||
extern int SkGmLeaveLowPowerMode(
|
||||
SK_AC *pAC,
|
||||
SK_IOC IoC,
|
||||
int Port);
|
||||
|
||||
#ifdef SK_DIAG
|
||||
extern void SkGePhyRead(
|
||||
SK_AC *pAC,
|
||||
|
@ -782,7 +735,6 @@ extern void SkXmSendCont(
|
|||
/*
|
||||
* public functions in skgeinit.c
|
||||
*/
|
||||
extern void SkGePollRxD();
|
||||
extern void SkGePollTxD();
|
||||
extern void SkGeYellowLED();
|
||||
extern int SkGeCfgSync();
|
||||
|
@ -792,7 +744,6 @@ extern int SkGeInit();
|
|||
extern void SkGeDeInit();
|
||||
extern int SkGeInitPort();
|
||||
extern void SkGeXmitLED();
|
||||
extern void SkGeInitRamIface();
|
||||
extern int SkGeInitAssignRamToQueues();
|
||||
|
||||
/*
|
||||
|
@ -801,18 +752,15 @@ extern int SkGeInitAssignRamToQueues();
|
|||
extern void SkMacRxTxDisable();
|
||||
extern void SkMacSoftRst();
|
||||
extern void SkMacHardRst();
|
||||
extern void SkMacClearRst();
|
||||
extern void SkMacInitPhy();
|
||||
extern int SkMacRxTxEnable();
|
||||
extern void SkMacPromiscMode();
|
||||
extern void SkMacHashing();
|
||||
extern void SkMacIrqDisable();
|
||||
extern void SkMacFlushTxFifo();
|
||||
extern void SkMacFlushRxFifo();
|
||||
extern void SkMacIrq();
|
||||
extern int SkMacAutoNegDone();
|
||||
extern void SkMacAutoNegLipaPhy();
|
||||
extern void SkMacSetRxTxEn();
|
||||
extern void SkXmInitMac();
|
||||
extern void SkXmPhyRead();
|
||||
extern void SkXmPhyWrite();
|
||||
|
@ -820,8 +768,6 @@ extern void SkGmInitMac();
|
|||
extern void SkGmPhyRead();
|
||||
extern void SkGmPhyWrite();
|
||||
extern void SkXmClrExactAddr();
|
||||
extern void SkXmInitDupMd();
|
||||
extern void SkXmInitPauseMd();
|
||||
extern void SkXmAutoNegLipaXmac();
|
||||
extern int SkXmUpdateStats();
|
||||
extern int SkGmUpdateStats();
|
||||
|
@ -832,8 +778,6 @@ extern int SkGmResetCounter();
|
|||
extern int SkXmOverflowStatus();
|
||||
extern int SkGmOverflowStatus();
|
||||
extern int SkGmCableDiagStatus();
|
||||
extern int SkGmEnterLowPowerMode();
|
||||
extern int SkGmLeaveLowPowerMode();
|
||||
|
||||
#ifdef SK_DIAG
|
||||
extern void SkGePhyRead();
|
||||
|
|
|
@ -946,10 +946,6 @@ typedef struct s_PnmiData {
|
|||
* Function prototypes
|
||||
*/
|
||||
extern int SkPnmiInit(SK_AC *pAC, SK_IOC IoC, int Level);
|
||||
extern int SkPnmiGetVar(SK_AC *pAC, SK_IOC IoC, SK_U32 Id, void* pBuf,
|
||||
unsigned int* pLen, SK_U32 Instance, SK_U32 NetIndex);
|
||||
extern int SkPnmiPreSetVar(SK_AC *pAC, SK_IOC IoC, SK_U32 Id,
|
||||
void* pBuf, unsigned int *pLen, SK_U32 Instance, SK_U32 NetIndex);
|
||||
extern int SkPnmiSetVar(SK_AC *pAC, SK_IOC IoC, SK_U32 Id, void* pBuf,
|
||||
unsigned int *pLen, SK_U32 Instance, SK_U32 NetIndex);
|
||||
extern int SkPnmiGetStruct(SK_AC *pAC, SK_IOC IoC, void* pBuf,
|
||||
|
|
|
@ -105,7 +105,6 @@
|
|||
|
||||
extern void SkGeSirqIsr(SK_AC *pAC, SK_IOC IoC, SK_U32 Istatus);
|
||||
extern int SkGeSirqEvent(SK_AC *pAC, SK_IOC IoC, SK_U32 Event, SK_EVPARA Para);
|
||||
extern void SkHWLinkUp(SK_AC *pAC, SK_IOC IoC, int Port);
|
||||
extern void SkHWLinkDown(SK_AC *pAC, SK_IOC IoC, int Port);
|
||||
|
||||
#endif /* _INC_SKGESIRQ_H_ */
|
||||
|
|
|
@ -162,9 +162,6 @@ typedef struct s_I2c {
|
|||
} SK_I2C;
|
||||
|
||||
extern int SkI2cInit(SK_AC *pAC, SK_IOC IoC, int Level);
|
||||
extern int SkI2cWrite(SK_AC *pAC, SK_IOC IoC, SK_U32 Data, int Dev, int Size,
|
||||
int Reg, int Burst);
|
||||
extern int SkI2cReadSensor(SK_AC *pAC, SK_IOC IoC, SK_SENSOR *pSen);
|
||||
#ifdef SK_DIAG
|
||||
extern SK_U32 SkI2cRead(SK_AC *pAC, SK_IOC IoC, int Dev, int Size, int Reg,
|
||||
int Burst);
|
||||
|
|
|
@ -183,14 +183,6 @@ extern SK_U32 VpdReadDWord(
|
|||
int addr);
|
||||
#endif /* SKDIAG */
|
||||
|
||||
extern int VpdSetupPara(
|
||||
SK_AC *pAC,
|
||||
const char *key,
|
||||
const char *buf,
|
||||
int len,
|
||||
int type,
|
||||
int op);
|
||||
|
||||
extern SK_VPD_STATUS *VpdStat(
|
||||
SK_AC *pAC,
|
||||
SK_IOC IoC);
|
||||
|
@ -227,11 +219,6 @@ extern int VpdUpdate(
|
|||
SK_AC *pAC,
|
||||
SK_IOC IoC);
|
||||
|
||||
extern void VpdErrLog(
|
||||
SK_AC *pAC,
|
||||
SK_IOC IoC,
|
||||
char *msg);
|
||||
|
||||
#ifdef SKDIAG
|
||||
extern int VpdReadBlock(
|
||||
SK_AC *pAC,
|
||||
|
@ -249,7 +236,6 @@ extern int VpdWriteBlock(
|
|||
#endif /* SKDIAG */
|
||||
#else /* SK_KR_PROTO */
|
||||
extern SK_U32 VpdReadDWord();
|
||||
extern int VpdSetupPara();
|
||||
extern SK_VPD_STATUS *VpdStat();
|
||||
extern int VpdKeys();
|
||||
extern int VpdRead();
|
||||
|
@ -257,7 +243,6 @@ extern SK_BOOL VpdMayWrite();
|
|||
extern int VpdWrite();
|
||||
extern int VpdDelete();
|
||||
extern int VpdUpdate();
|
||||
extern void VpdErrLog();
|
||||
#endif /* SK_KR_PROTO */
|
||||
|
||||
#endif /* __INC_SKVPD_H_ */
|
||||
|
|
|
@ -87,6 +87,21 @@ static const SK_U16 OnesHash[4] = {0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF};
|
|||
static int Next0[SK_MAX_MACS] = {0};
|
||||
#endif /* DEBUG */
|
||||
|
||||
static int SkAddrGmacMcAdd(SK_AC *pAC, SK_IOC IoC, SK_U32 PortNumber,
|
||||
SK_MAC_ADDR *pMc, int Flags);
|
||||
static int SkAddrGmacMcClear(SK_AC *pAC, SK_IOC IoC, SK_U32 PortNumber,
|
||||
int Flags);
|
||||
static int SkAddrGmacMcUpdate(SK_AC *pAC, SK_IOC IoC, SK_U32 PortNumber);
|
||||
static int SkAddrGmacPromiscuousChange(SK_AC *pAC, SK_IOC IoC,
|
||||
SK_U32 PortNumber, int NewPromMode);
|
||||
static int SkAddrXmacMcAdd(SK_AC *pAC, SK_IOC IoC, SK_U32 PortNumber,
|
||||
SK_MAC_ADDR *pMc, int Flags);
|
||||
static int SkAddrXmacMcClear(SK_AC *pAC, SK_IOC IoC, SK_U32 PortNumber,
|
||||
int Flags);
|
||||
static int SkAddrXmacMcUpdate(SK_AC *pAC, SK_IOC IoC, SK_U32 PortNumber);
|
||||
static int SkAddrXmacPromiscuousChange(SK_AC *pAC, SK_IOC IoC,
|
||||
SK_U32 PortNumber, int NewPromMode);
|
||||
|
||||
/* functions ******************************************************************/
|
||||
|
||||
/******************************************************************************
|
||||
|
@ -372,7 +387,7 @@ int Flags) /* permanent/non-perm, sw-only */
|
|||
* SK_ADDR_SUCCESS
|
||||
* SK_ADDR_ILLEGAL_PORT
|
||||
*/
|
||||
int SkAddrXmacMcClear(
|
||||
static int SkAddrXmacMcClear(
|
||||
SK_AC *pAC, /* adapter context */
|
||||
SK_IOC IoC, /* I/O context */
|
||||
SK_U32 PortNumber, /* Index of affected port */
|
||||
|
@ -429,7 +444,7 @@ int Flags) /* permanent/non-perm, sw-only */
|
|||
* SK_ADDR_SUCCESS
|
||||
* SK_ADDR_ILLEGAL_PORT
|
||||
*/
|
||||
int SkAddrGmacMcClear(
|
||||
static int SkAddrGmacMcClear(
|
||||
SK_AC *pAC, /* adapter context */
|
||||
SK_IOC IoC, /* I/O context */
|
||||
SK_U32 PortNumber, /* Index of affected port */
|
||||
|
@ -519,7 +534,7 @@ int Flags) /* permanent/non-perm, sw-only */
|
|||
* Returns:
|
||||
* Hash value of multicast address.
|
||||
*/
|
||||
SK_U32 SkXmacMcHash(
|
||||
static SK_U32 SkXmacMcHash(
|
||||
unsigned char *pMc) /* Multicast address */
|
||||
{
|
||||
SK_U32 Idx;
|
||||
|
@ -557,7 +572,7 @@ unsigned char *pMc) /* Multicast address */
|
|||
* Returns:
|
||||
* Hash value of multicast address.
|
||||
*/
|
||||
SK_U32 SkGmacMcHash(
|
||||
static SK_U32 SkGmacMcHash(
|
||||
unsigned char *pMc) /* Multicast address */
|
||||
{
|
||||
SK_U32 Data;
|
||||
|
@ -672,7 +687,7 @@ int Flags) /* permanent/non-permanent */
|
|||
* SK_MC_ILLEGAL_ADDRESS
|
||||
* SK_MC_RLMT_OVERFLOW
|
||||
*/
|
||||
int SkAddrXmacMcAdd(
|
||||
static int SkAddrXmacMcAdd(
|
||||
SK_AC *pAC, /* adapter context */
|
||||
SK_IOC IoC, /* I/O context */
|
||||
SK_U32 PortNumber, /* Port Number */
|
||||
|
@ -778,7 +793,7 @@ int Flags) /* permanent/non-permanent */
|
|||
* SK_MC_FILTERING_INEXACT
|
||||
* SK_MC_ILLEGAL_ADDRESS
|
||||
*/
|
||||
int SkAddrGmacMcAdd(
|
||||
static int SkAddrGmacMcAdd(
|
||||
SK_AC *pAC, /* adapter context */
|
||||
SK_IOC IoC, /* I/O context */
|
||||
SK_U32 PortNumber, /* Port Number */
|
||||
|
@ -937,7 +952,7 @@ SK_U32 PortNumber) /* Port Number */
|
|||
* SK_MC_FILTERING_INEXACT
|
||||
* SK_ADDR_ILLEGAL_PORT
|
||||
*/
|
||||
int SkAddrXmacMcUpdate(
|
||||
static int SkAddrXmacMcUpdate(
|
||||
SK_AC *pAC, /* adapter context */
|
||||
SK_IOC IoC, /* I/O context */
|
||||
SK_U32 PortNumber) /* Port Number */
|
||||
|
@ -1082,7 +1097,7 @@ SK_U32 PortNumber) /* Port Number */
|
|||
* SK_MC_FILTERING_INEXACT
|
||||
* SK_ADDR_ILLEGAL_PORT
|
||||
*/
|
||||
int SkAddrGmacMcUpdate(
|
||||
static int SkAddrGmacMcUpdate(
|
||||
SK_AC *pAC, /* adapter context */
|
||||
SK_IOC IoC, /* I/O context */
|
||||
SK_U32 PortNumber) /* Port Number */
|
||||
|
@ -1468,7 +1483,7 @@ int NewPromMode) /* new promiscuous mode */
|
|||
* SK_ADDR_SUCCESS
|
||||
* SK_ADDR_ILLEGAL_PORT
|
||||
*/
|
||||
int SkAddrXmacPromiscuousChange(
|
||||
static int SkAddrXmacPromiscuousChange(
|
||||
SK_AC *pAC, /* adapter context */
|
||||
SK_IOC IoC, /* I/O context */
|
||||
SK_U32 PortNumber, /* port whose promiscuous mode changes */
|
||||
|
@ -1585,7 +1600,7 @@ int NewPromMode) /* new promiscuous mode */
|
|||
* SK_ADDR_SUCCESS
|
||||
* SK_ADDR_ILLEGAL_PORT
|
||||
*/
|
||||
int SkAddrGmacPromiscuousChange(
|
||||
static int SkAddrGmacPromiscuousChange(
|
||||
SK_AC *pAC, /* adapter context */
|
||||
SK_IOC IoC, /* I/O context */
|
||||
SK_U32 PortNumber, /* port whose promiscuous mode changes */
|
||||
|
|
|
@ -57,34 +57,6 @@ static struct s_Config OemConfig = {
|
|||
#endif
|
||||
};
|
||||
|
||||
/******************************************************************************
|
||||
*
|
||||
* SkGePollRxD() - Enable / Disable Descriptor Polling of RxD Ring
|
||||
*
|
||||
* Description:
|
||||
* Enable or disable the descriptor polling of the receive descriptor
|
||||
* ring (RxD) for port 'Port'.
|
||||
* The new configuration is *not* saved over any SkGeStopPort() and
|
||||
* SkGeInitPort() calls.
|
||||
*
|
||||
* Returns:
|
||||
* nothing
|
||||
*/
|
||||
void SkGePollRxD(
|
||||
SK_AC *pAC, /* adapter context */
|
||||
SK_IOC IoC, /* IO context */
|
||||
int Port, /* Port Index (MAC_1 + n) */
|
||||
SK_BOOL PollRxD) /* SK_TRUE (enable pol.), SK_FALSE (disable pol.) */
|
||||
{
|
||||
SK_GEPORT *pPrt;
|
||||
|
||||
pPrt = &pAC->GIni.GP[Port];
|
||||
|
||||
SK_OUT32(IoC, Q_ADDR(pPrt->PRxQOff, Q_CSR), (PollRxD) ?
|
||||
CSR_ENA_POL : CSR_DIS_POL);
|
||||
} /* SkGePollRxD */
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
*
|
||||
* SkGePollTxD() - Enable / Disable Descriptor Polling of TxD Rings
|
||||
|
@ -952,7 +924,7 @@ int Port) /* Port Index (MAC_1 + n) */
|
|||
* Returns:
|
||||
* nothing
|
||||
*/
|
||||
void SkGeInitRamIface(
|
||||
static void SkGeInitRamIface(
|
||||
SK_AC *pAC, /* adapter context */
|
||||
SK_IOC IoC) /* IO context */
|
||||
{
|
||||
|
@ -1409,83 +1381,6 @@ SK_IOC IoC) /* IO context */
|
|||
|
||||
} /* SkGeInit0*/
|
||||
|
||||
#ifdef SK_PCI_RESET
|
||||
|
||||
/******************************************************************************
|
||||
*
|
||||
* SkGePciReset() - Reset PCI interface
|
||||
*
|
||||
* Description:
|
||||
* o Read PCI configuration.
|
||||
* o Change power state to 3.
|
||||
* o Change power state to 0.
|
||||
* o Restore PCI configuration.
|
||||
*
|
||||
* Returns:
|
||||
* 0: Success.
|
||||
* 1: Power state could not be changed to 3.
|
||||
*/
|
||||
static int SkGePciReset(
|
||||
SK_AC *pAC, /* adapter context */
|
||||
SK_IOC IoC) /* IO context */
|
||||
{
|
||||
int i;
|
||||
SK_U16 PmCtlSts;
|
||||
SK_U32 Bp1;
|
||||
SK_U32 Bp2;
|
||||
SK_U16 PciCmd;
|
||||
SK_U8 Cls;
|
||||
SK_U8 Lat;
|
||||
SK_U8 ConfigSpace[PCI_CFG_SIZE];
|
||||
|
||||
/*
|
||||
* Note: Switching to D3 state is like a software reset.
|
||||
* Switching from D3 to D0 is a hardware reset.
|
||||
* We have to save and restore the configuration space.
|
||||
*/
|
||||
for (i = 0; i < PCI_CFG_SIZE; i++) {
|
||||
SkPciReadCfgDWord(pAC, i*4, &ConfigSpace[i]);
|
||||
}
|
||||
|
||||
/* We know the RAM Interface Arbiter is enabled. */
|
||||
SkPciWriteCfgWord(pAC, PCI_PM_CTL_STS, PCI_PM_STATE_D3);
|
||||
SkPciReadCfgWord(pAC, PCI_PM_CTL_STS, &PmCtlSts);
|
||||
|
||||
if ((PmCtlSts & PCI_PM_STATE_MSK) != PCI_PM_STATE_D3) {
|
||||
return(1);
|
||||
}
|
||||
|
||||
/* Return to D0 state. */
|
||||
SkPciWriteCfgWord(pAC, PCI_PM_CTL_STS, PCI_PM_STATE_D0);
|
||||
|
||||
/* Check for D0 state. */
|
||||
SkPciReadCfgWord(pAC, PCI_PM_CTL_STS, &PmCtlSts);
|
||||
|
||||
if ((PmCtlSts & PCI_PM_STATE_MSK) != PCI_PM_STATE_D0) {
|
||||
return(1);
|
||||
}
|
||||
|
||||
/* Check PCI Config Registers. */
|
||||
SkPciReadCfgWord(pAC, PCI_COMMAND, &PciCmd);
|
||||
SkPciReadCfgByte(pAC, PCI_CACHE_LSZ, &Cls);
|
||||
SkPciReadCfgDWord(pAC, PCI_BASE_1ST, &Bp1);
|
||||
SkPciReadCfgDWord(pAC, PCI_BASE_2ND, &Bp2);
|
||||
SkPciReadCfgByte(pAC, PCI_LAT_TIM, &Lat);
|
||||
|
||||
if (PciCmd != 0 || Cls != (SK_U8)0 || Lat != (SK_U8)0 ||
|
||||
(Bp1 & 0xfffffff0L) != 0 || Bp2 != 1) {
|
||||
return(1);
|
||||
}
|
||||
|
||||
/* Restore PCI Config Space. */
|
||||
for (i = 0; i < PCI_CFG_SIZE; i++) {
|
||||
SkPciWriteCfgDWord(pAC, i*4, ConfigSpace[i]);
|
||||
}
|
||||
|
||||
return(0);
|
||||
} /* SkGePciReset */
|
||||
|
||||
#endif /* SK_PCI_RESET */
|
||||
|
||||
/******************************************************************************
|
||||
*
|
||||
|
@ -1524,10 +1419,6 @@ SK_IOC IoC) /* IO context */
|
|||
/* save CLK_RUN bits (YUKON-Lite) */
|
||||
SK_IN16(IoC, B0_CTST, &CtrlStat);
|
||||
|
||||
#ifdef SK_PCI_RESET
|
||||
(void)SkGePciReset(pAC, IoC);
|
||||
#endif /* SK_PCI_RESET */
|
||||
|
||||
/* do the SW-reset */
|
||||
SK_OUT8(IoC, B0_CTST, CS_RST_SET);
|
||||
|
||||
|
@ -1991,11 +1882,6 @@ SK_IOC IoC) /* IO context */
|
|||
int i;
|
||||
SK_U16 Word;
|
||||
|
||||
#ifdef SK_PHY_LP_MODE
|
||||
SK_U8 Byte;
|
||||
SK_U16 PmCtlSts;
|
||||
#endif /* SK_PHY_LP_MODE */
|
||||
|
||||
#if (!defined(SK_SLIM) && !defined(VCPU))
|
||||
/* ensure I2C is ready */
|
||||
SkI2cWaitIrq(pAC, IoC);
|
||||
|
@ -2010,38 +1896,6 @@ SK_IOC IoC) /* IO context */
|
|||
}
|
||||
}
|
||||
|
||||
#ifdef SK_PHY_LP_MODE
|
||||
/*
|
||||
* for power saving purposes within mobile environments
|
||||
* we set the PHY to coma mode and switch to D3 power state.
|
||||
*/
|
||||
if (pAC->GIni.GIYukonLite &&
|
||||
pAC->GIni.GIChipRev >= CHIP_REV_YU_LITE_A3) {
|
||||
|
||||
/* for all ports switch PHY to coma mode */
|
||||
for (i = 0; i < pAC->GIni.GIMacsFound; i++) {
|
||||
|
||||
SkGmEnterLowPowerMode(pAC, IoC, i, PHY_PM_DEEP_SLEEP);
|
||||
}
|
||||
|
||||
if (pAC->GIni.GIVauxAvail) {
|
||||
/* switch power to VAUX */
|
||||
Byte = PC_VAUX_ENA | PC_VCC_ENA | PC_VAUX_ON | PC_VCC_OFF;
|
||||
|
||||
SK_OUT8(IoC, B0_POWER_CTRL, Byte);
|
||||
}
|
||||
|
||||
/* switch to D3 state */
|
||||
SK_IN16(IoC, PCI_C(PCI_PM_CTL_STS), &PmCtlSts);
|
||||
|
||||
PmCtlSts |= PCI_PM_STATE_D3;
|
||||
|
||||
SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_ON);
|
||||
|
||||
SK_OUT16(IoC, PCI_C(PCI_PM_CTL_STS), PmCtlSts);
|
||||
}
|
||||
#endif /* SK_PHY_LP_MODE */
|
||||
|
||||
/* Reset all bits in the PCI STATUS register */
|
||||
/*
|
||||
* Note: PCI Cfg cycles cannot be used, because they are not
|
||||
|
|
|
@ -871,13 +871,6 @@ PNMI_STATIC const SK_PNMI_TAB_ENTRY IdTable[] = {
|
|||
sizeof(SK_PNMI_CONF),
|
||||
SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfPhyType),
|
||||
SK_PNMI_RO, MacPrivateConf, 0},
|
||||
#ifdef SK_PHY_LP_MODE
|
||||
{OID_SKGE_PHY_LP_MODE,
|
||||
SK_PNMI_MAC_ENTRIES,
|
||||
sizeof(SK_PNMI_CONF),
|
||||
SK_PNMI_OFF(Conf) + SK_PNMI_CNF_OFF(ConfPhyMode),
|
||||
SK_PNMI_RW, MacPrivateConf, 0},
|
||||
#endif
|
||||
{OID_SKGE_LINK_CAP,
|
||||
SK_PNMI_MAC_ENTRIES,
|
||||
sizeof(SK_PNMI_CONF),
|
||||
|
|
|
@ -56,10 +56,6 @@ static const char SysKonnectFileId[] =
|
|||
* Public Function prototypes
|
||||
*/
|
||||
int SkPnmiInit(SK_AC *pAC, SK_IOC IoC, int level);
|
||||
int SkPnmiGetVar(SK_AC *pAC, SK_IOC IoC, SK_U32 Id, void *pBuf,
|
||||
unsigned int *pLen, SK_U32 Instance, SK_U32 NetIndex);
|
||||
int SkPnmiPreSetVar(SK_AC *pAC, SK_IOC IoC, SK_U32 Id, void *pBuf,
|
||||
unsigned int *pLen, SK_U32 Instance, SK_U32 NetIndex);
|
||||
int SkPnmiSetVar(SK_AC *pAC, SK_IOC IoC, SK_U32 Id, void *pBuf,
|
||||
unsigned int *pLen, SK_U32 Instance, SK_U32 NetIndex);
|
||||
int SkPnmiGetStruct(SK_AC *pAC, SK_IOC IoC, void *pBuf,
|
||||
|
@ -587,7 +583,7 @@ int Level) /* Initialization level */
|
|||
* exist (e.g. port instance 3 on a two port
|
||||
* adapter.
|
||||
*/
|
||||
int SkPnmiGetVar(
|
||||
static int SkPnmiGetVar(
|
||||
SK_AC *pAC, /* Pointer to adapter context */
|
||||
SK_IOC IoC, /* IO context handle */
|
||||
SK_U32 Id, /* Object ID that is to be processed */
|
||||
|
@ -629,7 +625,7 @@ SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
|
|||
* exist (e.g. port instance 3 on a two port
|
||||
* adapter.
|
||||
*/
|
||||
int SkPnmiPreSetVar(
|
||||
static int SkPnmiPreSetVar(
|
||||
SK_AC *pAC, /* Pointer to adapter context */
|
||||
SK_IOC IoC, /* IO context handle */
|
||||
SK_U32 Id, /* Object ID that is to be processed */
|
||||
|
@ -5062,9 +5058,6 @@ SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
|
|||
case OID_SKGE_SPEED_CAP:
|
||||
case OID_SKGE_SPEED_MODE:
|
||||
case OID_SKGE_SPEED_STATUS:
|
||||
#ifdef SK_PHY_LP_MODE
|
||||
case OID_SKGE_PHY_LP_MODE:
|
||||
#endif
|
||||
if (*pLen < (Limit - LogPortIndex) * sizeof(SK_U8)) {
|
||||
|
||||
*pLen = (Limit - LogPortIndex) * sizeof(SK_U8);
|
||||
|
@ -5140,28 +5133,6 @@ SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
|
|||
Offset += sizeof(SK_U32);
|
||||
break;
|
||||
|
||||
#ifdef SK_PHY_LP_MODE
|
||||
case OID_SKGE_PHY_LP_MODE:
|
||||
if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
|
||||
if (LogPortIndex == 0) {
|
||||
continue;
|
||||
}
|
||||
else {
|
||||
/* Get value for physical ports */
|
||||
PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(pAC, LogPortIndex);
|
||||
Val8 = (SK_U8) pAC->GIni.GP[PhysPortIndex].PPhyPowerState;
|
||||
*pBufPtr = Val8;
|
||||
}
|
||||
}
|
||||
else { /* DualNetMode */
|
||||
|
||||
Val8 = (SK_U8) pAC->GIni.GP[PhysPortIndex].PPhyPowerState;
|
||||
*pBufPtr = Val8;
|
||||
}
|
||||
Offset += sizeof(SK_U8);
|
||||
break;
|
||||
#endif
|
||||
|
||||
case OID_SKGE_LINK_CAP:
|
||||
if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
|
||||
if (LogPortIndex == 0) {
|
||||
|
@ -5478,16 +5449,6 @@ SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
|
|||
}
|
||||
break;
|
||||
|
||||
#ifdef SK_PHY_LP_MODE
|
||||
case OID_SKGE_PHY_LP_MODE:
|
||||
if (*pLen < Limit - LogPortIndex) {
|
||||
|
||||
*pLen = Limit - LogPortIndex;
|
||||
return (SK_PNMI_ERR_TOO_SHORT);
|
||||
}
|
||||
break;
|
||||
#endif
|
||||
|
||||
case OID_SKGE_MTU:
|
||||
if (*pLen < sizeof(SK_U32)) {
|
||||
|
||||
|
@ -5845,116 +5806,6 @@ SK_U32 NetIndex) /* NetIndex (0..n), in single net mode always zero */
|
|||
Offset += sizeof(SK_U32);
|
||||
break;
|
||||
|
||||
#ifdef SK_PHY_LP_MODE
|
||||
case OID_SKGE_PHY_LP_MODE:
|
||||
/* The preset ends here */
|
||||
if (Action == SK_PNMI_PRESET) {
|
||||
|
||||
return (SK_PNMI_ERR_OK);
|
||||
}
|
||||
|
||||
if (!pAC->Pnmi.DualNetActiveFlag) { /* SingleNetMode */
|
||||
if (LogPortIndex == 0) {
|
||||
Offset = 0;
|
||||
continue;
|
||||
}
|
||||
else {
|
||||
/* Set value for physical ports */
|
||||
PhysPortIndex = SK_PNMI_PORT_LOG2PHYS(pAC, LogPortIndex);
|
||||
|
||||
switch (*(pBuf + Offset)) {
|
||||
case 0:
|
||||
/* If LowPowerMode is active, we can leave it. */
|
||||
if (pAC->GIni.GP[PhysPortIndex].PPhyPowerState) {
|
||||
|
||||
Val32 = SkGmLeaveLowPowerMode(pAC, IoC, PhysPortIndex);
|
||||
|
||||
if (pAC->GIni.GP[PhysPortIndex].PPhyPowerState < 3) {
|
||||
|
||||
SkDrvInitAdapter(pAC);
|
||||
}
|
||||
break;
|
||||
}
|
||||
else {
|
||||
*pLen = 0;
|
||||
return (SK_PNMI_ERR_GENERAL);
|
||||
}
|
||||
case 1:
|
||||
case 2:
|
||||
case 3:
|
||||
case 4:
|
||||
/* If no LowPowerMode is active, we can enter it. */
|
||||
if (!pAC->GIni.GP[PhysPortIndex].PPhyPowerState) {
|
||||
|
||||
if ((*(pBuf + Offset)) < 3) {
|
||||
|
||||
SkDrvDeInitAdapter(pAC);
|
||||
}
|
||||
|
||||
Val32 = SkGmEnterLowPowerMode(pAC, IoC, PhysPortIndex, *pBuf);
|
||||
break;
|
||||
}
|
||||
else {
|
||||
*pLen = 0;
|
||||
return (SK_PNMI_ERR_GENERAL);
|
||||
}
|
||||
default:
|
||||
*pLen = 0;
|
||||
return (SK_PNMI_ERR_BAD_VALUE);
|
||||
}
|
||||
}
|
||||
}
|
||||
else { /* DualNetMode */
|
||||
|
||||
switch (*(pBuf + Offset)) {
|
||||
case 0:
|
||||
/* If we are in a LowPowerMode, we can leave it. */
|
||||
if (pAC->GIni.GP[PhysPortIndex].PPhyPowerState) {
|
||||
|
||||
Val32 = SkGmLeaveLowPowerMode(pAC, IoC, PhysPortIndex);
|
||||
|
||||
if (pAC->GIni.GP[PhysPortIndex].PPhyPowerState < 3) {
|
||||
|
||||
SkDrvInitAdapter(pAC);
|
||||
}
|
||||
break;
|
||||
}
|
||||
else {
|
||||
*pLen = 0;
|
||||
return (SK_PNMI_ERR_GENERAL);
|
||||
}
|
||||
|
||||
case 1:
|
||||
case 2:
|
||||
case 3:
|
||||
case 4:
|
||||
/* If we are not already in LowPowerMode, we can enter it. */
|
||||
if (!pAC->GIni.GP[PhysPortIndex].PPhyPowerState) {
|
||||
|
||||
if ((*(pBuf + Offset)) < 3) {
|
||||
|
||||
SkDrvDeInitAdapter(pAC);
|
||||
}
|
||||
else {
|
||||
|
||||
Val32 = SkGmEnterLowPowerMode(pAC, IoC, PhysPortIndex, *pBuf);
|
||||
}
|
||||
break;
|
||||
}
|
||||
else {
|
||||
*pLen = 0;
|
||||
return (SK_PNMI_ERR_GENERAL);
|
||||
}
|
||||
|
||||
default:
|
||||
*pLen = 0;
|
||||
return (SK_PNMI_ERR_BAD_VALUE);
|
||||
}
|
||||
}
|
||||
Offset += sizeof(SK_U8);
|
||||
break;
|
||||
#endif
|
||||
|
||||
default:
|
||||
SK_DBG_MSG(pAC, SK_DBGMOD_PNMI, SK_DBGCAT_ERR,
|
||||
("MacPrivateConf: Unknown OID should be handled before set"));
|
||||
|
|
|
@ -265,7 +265,7 @@ int Port) /* Port Index (MAC_1 + n) */
|
|||
*
|
||||
* Returns: N/A
|
||||
*/
|
||||
void SkHWLinkUp(
|
||||
static void SkHWLinkUp(
|
||||
SK_AC *pAC, /* adapter context */
|
||||
SK_IOC IoC, /* IO context */
|
||||
int Port) /* Port Index (MAC_1 + n) */
|
||||
|
@ -612,14 +612,6 @@ SK_U32 Istatus) /* Interrupt status word */
|
|||
* we ignore those
|
||||
*/
|
||||
pPrt->HalfDupTimerActive = SK_TRUE;
|
||||
#ifdef XXX
|
||||
Len = sizeof(SK_U64);
|
||||
SkPnmiGetVar(pAC, IoC, OID_SKGE_STAT_TX_OCTETS, (char *)&Octets,
|
||||
&Len, (SK_U32)SK_PNMI_PORT_PHYS2INST(pAC, 0),
|
||||
pAC->Rlmt.Port[0].Net->NetNumber);
|
||||
|
||||
pPrt->LastOctets = Octets;
|
||||
#endif /* XXX */
|
||||
/* Snap statistic counters */
|
||||
(void)SkXmUpdateStats(pAC, IoC, 0);
|
||||
|
||||
|
@ -653,14 +645,6 @@ SK_U32 Istatus) /* Interrupt status word */
|
|||
pPrt->PLinkModeStatus == SK_LMODE_STAT_AUTOHALF) &&
|
||||
!pPrt->HalfDupTimerActive) {
|
||||
pPrt->HalfDupTimerActive = SK_TRUE;
|
||||
#ifdef XXX
|
||||
Len = sizeof(SK_U64);
|
||||
SkPnmiGetVar(pAC, IoC, OID_SKGE_STAT_TX_OCTETS, (char *)&Octets,
|
||||
&Len, (SK_U32)SK_PNMI_PORT_PHYS2INST(pAC, 1),
|
||||
pAC->Rlmt.Port[1].Net->NetNumber);
|
||||
|
||||
pPrt->LastOctets = Octets;
|
||||
#endif /* XXX */
|
||||
/* Snap statistic counters */
|
||||
(void)SkXmUpdateStats(pAC, IoC, 1);
|
||||
|
||||
|
@ -2085,12 +2069,6 @@ SK_EVPARA Para) /* Event specific Parameter */
|
|||
pPrt->HalfDupTimerActive = SK_FALSE;
|
||||
if (pPrt->PLinkModeStatus == SK_LMODE_STAT_HALF ||
|
||||
pPrt->PLinkModeStatus == SK_LMODE_STAT_AUTOHALF) {
|
||||
#ifdef XXX
|
||||
Len = sizeof(SK_U64);
|
||||
SkPnmiGetVar(pAC, IoC, OID_SKGE_STAT_TX_OCTETS, (char *)&Octets,
|
||||
&Len, (SK_U32)SK_PNMI_PORT_PHYS2INST(pAC, Port),
|
||||
pAC->Rlmt.Port[Port].Net->NetNumber);
|
||||
#endif /* XXX */
|
||||
/* Snap statistic counters */
|
||||
(void)SkXmUpdateStats(pAC, IoC, Port);
|
||||
|
||||
|
|
|
@ -396,7 +396,7 @@ int Rw) /* Read / Write Flag */
|
|||
* 1: error, transfer does not complete, I2C transfer
|
||||
* killed, wait loop terminated.
|
||||
*/
|
||||
int SkI2cWait(
|
||||
static int SkI2cWait(
|
||||
SK_AC *pAC, /* Adapter Context */
|
||||
SK_IOC IoC, /* I/O Context */
|
||||
int Event) /* complete event to wait for (I2C_READ or I2C_WRITE) */
|
||||
|
@ -481,7 +481,7 @@ SK_IOC IoC) /* I/O Context */
|
|||
* returns 0: success
|
||||
* 1: error
|
||||
*/
|
||||
int SkI2cWrite(
|
||||
static int SkI2cWrite(
|
||||
SK_AC *pAC, /* Adapter Context */
|
||||
SK_IOC IoC, /* I/O Context */
|
||||
SK_U32 I2cData, /* I2C Data to write */
|
||||
|
@ -538,7 +538,7 @@ int I2cBurst) /* I2C Burst Flag */
|
|||
* 1 if the read is completed
|
||||
* 0 if the read must be continued (I2C Bus still allocated)
|
||||
*/
|
||||
int SkI2cReadSensor(
|
||||
static int SkI2cReadSensor(
|
||||
SK_AC *pAC, /* Adapter Context */
|
||||
SK_IOC IoC, /* I/O Context */
|
||||
SK_SENSOR *pSen) /* Sensor to be read */
|
||||
|
|
|
@ -34,79 +34,7 @@ static const char SysKonnectFileId[] =
|
|||
#include "h/lm80.h"
|
||||
#include "h/skdrv2nd.h" /* Adapter Control- and Driver specific Def. */
|
||||
|
||||
#ifdef SK_DIAG
|
||||
#define BREAK_OR_WAIT(pAC,IoC,Event) SkI2cWait(pAC,IoC,Event)
|
||||
#else /* nSK_DIAG */
|
||||
#define BREAK_OR_WAIT(pAC,IoC,Event) break
|
||||
#endif /* nSK_DIAG */
|
||||
|
||||
#ifdef SK_DIAG
|
||||
/*
|
||||
* read the register 'Reg' from the device 'Dev'
|
||||
*
|
||||
* return read error -1
|
||||
* success the read value
|
||||
*/
|
||||
int SkLm80RcvReg(
|
||||
SK_IOC IoC, /* Adapter Context */
|
||||
int Dev, /* I2C device address */
|
||||
int Reg) /* register to read */
|
||||
{
|
||||
int Val = 0;
|
||||
int TempExt;
|
||||
|
||||
/* Signal device number */
|
||||
if (SkI2cSndDev(IoC, Dev, I2C_WRITE)) {
|
||||
return(-1);
|
||||
}
|
||||
|
||||
if (SkI2cSndByte(IoC, Reg)) {
|
||||
return(-1);
|
||||
}
|
||||
|
||||
/* repeat start */
|
||||
if (SkI2cSndDev(IoC, Dev, I2C_READ)) {
|
||||
return(-1);
|
||||
}
|
||||
|
||||
switch (Reg) {
|
||||
case LM80_TEMP_IN:
|
||||
Val = (int)SkI2cRcvByte(IoC, 1);
|
||||
|
||||
/* First: correct the value: it might be negative */
|
||||
if ((Val & 0x80) != 0) {
|
||||
/* Value is negative */
|
||||
Val = Val - 256;
|
||||
}
|
||||
Val = Val * SK_LM80_TEMP_LSB;
|
||||
SkI2cStop(IoC);
|
||||
|
||||
TempExt = (int)SkLm80RcvReg(IoC, LM80_ADDR, LM80_TEMP_CTRL);
|
||||
|
||||
if (Val > 0) {
|
||||
Val += ((TempExt >> 7) * SK_LM80_TEMPEXT_LSB);
|
||||
}
|
||||
else {
|
||||
Val -= ((TempExt >> 7) * SK_LM80_TEMPEXT_LSB);
|
||||
}
|
||||
return(Val);
|
||||
break;
|
||||
case LM80_VT0_IN:
|
||||
case LM80_VT1_IN:
|
||||
case LM80_VT2_IN:
|
||||
case LM80_VT3_IN:
|
||||
Val = (int)SkI2cRcvByte(IoC, 1) * SK_LM80_VT_LSB;
|
||||
break;
|
||||
|
||||
default:
|
||||
Val = (int)SkI2cRcvByte(IoC, 1);
|
||||
break;
|
||||
}
|
||||
|
||||
SkI2cStop(IoC);
|
||||
return(Val);
|
||||
}
|
||||
#endif /* SK_DIAG */
|
||||
|
||||
/*
|
||||
* read a sensors value (LM80 specific)
|
||||
|
|
|
@ -282,7 +282,6 @@ typedef struct s_SpTreeRlmtPacket {
|
|||
|
||||
SK_MAC_ADDR SkRlmtMcAddr = {{0x01, 0x00, 0x5A, 0x52, 0x4C, 0x4D}};
|
||||
SK_MAC_ADDR BridgeMcAddr = {{0x01, 0x80, 0xC2, 0x00, 0x00, 0x00}};
|
||||
SK_MAC_ADDR BcAddr = {{0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF}};
|
||||
|
||||
/* local variables ************************************************************/
|
||||
|
||||
|
|
|
@ -132,65 +132,6 @@ int addr) /* VPD address */
|
|||
|
||||
#endif /* SKDIAG */
|
||||
|
||||
#if 0
|
||||
|
||||
/*
|
||||
Write the dword 'data' at address 'addr' into the VPD EEPROM, and
|
||||
verify that the data is written.
|
||||
|
||||
Needed Time:
|
||||
|
||||
. MIN MAX
|
||||
. -------------------------------------------------------------------
|
||||
. write 1.8 ms 3.6 ms
|
||||
. internal write cyles 0.7 ms 7.0 ms
|
||||
. -------------------------------------------------------------------
|
||||
. over all program time 2.5 ms 10.6 ms
|
||||
. read 1.3 ms 2.6 ms
|
||||
. -------------------------------------------------------------------
|
||||
. over all 3.8 ms 13.2 ms
|
||||
.
|
||||
|
||||
|
||||
Returns 0: success
|
||||
1: error, I2C transfer does not terminate
|
||||
2: error, data verify error
|
||||
|
||||
*/
|
||||
static int VpdWriteDWord(
|
||||
SK_AC *pAC, /* pAC pointer */
|
||||
SK_IOC IoC, /* IO Context */
|
||||
int addr, /* VPD address */
|
||||
SK_U32 data) /* VPD data to write */
|
||||
{
|
||||
/* start VPD write */
|
||||
/* Don't swap here, it's a data stream of bytes */
|
||||
SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_CTRL,
|
||||
("VPD write dword at addr 0x%x, data = 0x%x\n",addr,data));
|
||||
VPD_OUT32(pAC, IoC, PCI_VPD_DAT_REG, (SK_U32)data);
|
||||
/* But do it here */
|
||||
addr |= VPD_WRITE;
|
||||
|
||||
VPD_OUT16(pAC, IoC, PCI_VPD_ADR_REG, (SK_U16)(addr | VPD_WRITE));
|
||||
|
||||
/* this may take up to 10,6 ms */
|
||||
if (VpdWait(pAC, IoC, VPD_WRITE)) {
|
||||
SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
|
||||
("Write Timed Out\n"));
|
||||
return(1);
|
||||
};
|
||||
|
||||
/* verify data */
|
||||
if (VpdReadDWord(pAC, IoC, addr) != data) {
|
||||
SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR | SK_DBGCAT_FATAL,
|
||||
("Data Verify Error\n"));
|
||||
return(2);
|
||||
}
|
||||
return(0);
|
||||
} /* VpdWriteDWord */
|
||||
|
||||
#endif /* 0 */
|
||||
|
||||
/*
|
||||
* Read one Stream of 'len' bytes of VPD data, starting at 'addr' from
|
||||
* or to the I2C EEPROM.
|
||||
|
@ -728,7 +669,7 @@ char *etp) /* end pointer input position */
|
|||
* 6: fatal VPD error
|
||||
*
|
||||
*/
|
||||
int VpdSetupPara(
|
||||
static int VpdSetupPara(
|
||||
SK_AC *pAC, /* common data base */
|
||||
const char *key, /* keyword to insert */
|
||||
const char *buf, /* buffer with the keyword value */
|
||||
|
@ -1148,50 +1089,3 @@ SK_IOC IoC) /* IO Context */
|
|||
return(0);
|
||||
}
|
||||
|
||||
|
||||
|
||||
/*
|
||||
* Read the contents of the VPD EEPROM and copy it to the VPD buffer
|
||||
* if not already done. If the keyword "VF" is not present it will be
|
||||
* created and the error log message will be stored to this keyword.
|
||||
* If "VF" is not present the error log message will be stored to the
|
||||
* keyword "VL". "VL" will created or overwritten if "VF" is present.
|
||||
* The VPD read/write area is saved to the VPD EEPROM.
|
||||
*
|
||||
* returns nothing, errors will be ignored.
|
||||
*/
|
||||
void VpdErrLog(
|
||||
SK_AC *pAC, /* common data base */
|
||||
SK_IOC IoC, /* IO Context */
|
||||
char *msg) /* error log message */
|
||||
{
|
||||
SK_VPD_PARA *v, vf; /* VF */
|
||||
int len;
|
||||
|
||||
SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_TX,
|
||||
("VPD error log msg %s\n", msg));
|
||||
if ((pAC->vpd.v.vpd_status & VPD_VALID) == 0) {
|
||||
if (VpdInit(pAC, IoC) != 0) {
|
||||
SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_ERR,
|
||||
("VPD init error\n"));
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
len = strlen(msg);
|
||||
if (len > VPD_MAX_LEN) {
|
||||
/* cut it */
|
||||
len = VPD_MAX_LEN;
|
||||
}
|
||||
if ((v = vpd_find_para(pAC, VPD_VF, &vf)) != NULL) {
|
||||
SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_TX, ("overwrite VL\n"));
|
||||
(void)VpdSetupPara(pAC, VPD_VL, msg, len, VPD_RW_KEY, OWR_KEY);
|
||||
}
|
||||
else {
|
||||
SK_DBG_MSG(pAC, SK_DBGMOD_VPD, SK_DBGCAT_TX, ("write VF\n"));
|
||||
(void)VpdSetupPara(pAC, VPD_VF, msg, len, VPD_RW_KEY, ADD_KEY);
|
||||
}
|
||||
|
||||
(void)VpdUpdate(pAC, IoC);
|
||||
}
|
||||
|
||||
|
|
|
@ -41,13 +41,13 @@ static const char SysKonnectFileId[] =
|
|||
#endif
|
||||
|
||||
#ifdef GENESIS
|
||||
BCOM_HACK BcomRegA1Hack[] = {
|
||||
static BCOM_HACK BcomRegA1Hack[] = {
|
||||
{ 0x18, 0x0c20 }, { 0x17, 0x0012 }, { 0x15, 0x1104 }, { 0x17, 0x0013 },
|
||||
{ 0x15, 0x0404 }, { 0x17, 0x8006 }, { 0x15, 0x0132 }, { 0x17, 0x8006 },
|
||||
{ 0x15, 0x0232 }, { 0x17, 0x800D }, { 0x15, 0x000F }, { 0x18, 0x0420 },
|
||||
{ 0, 0 }
|
||||
};
|
||||
BCOM_HACK BcomRegC0Hack[] = {
|
||||
static BCOM_HACK BcomRegC0Hack[] = {
|
||||
{ 0x18, 0x0c20 }, { 0x17, 0x0012 }, { 0x15, 0x1204 }, { 0x17, 0x0013 },
|
||||
{ 0x15, 0x0A04 }, { 0x18, 0x0420 },
|
||||
{ 0, 0 }
|
||||
|
@ -790,7 +790,7 @@ int Port) /* Port Index (MAC_1 + n) */
|
|||
* Returns:
|
||||
* nothing
|
||||
*/
|
||||
void SkMacFlushRxFifo(
|
||||
static void SkMacFlushRxFifo(
|
||||
SK_AC *pAC, /* adapter context */
|
||||
SK_IOC IoC, /* IO context */
|
||||
int Port) /* Port Index (MAC_1 + n) */
|
||||
|
@ -1231,38 +1231,6 @@ int Port) /* Port Index (MAC_1 + n) */
|
|||
} /* SkMacHardRst */
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
*
|
||||
* SkMacClearRst() - Clear the MAC reset
|
||||
*
|
||||
* Description: calls a clear MAC reset routine dep. on board type
|
||||
*
|
||||
* Returns:
|
||||
* nothing
|
||||
*/
|
||||
void SkMacClearRst(
|
||||
SK_AC *pAC, /* adapter context */
|
||||
SK_IOC IoC, /* IO context */
|
||||
int Port) /* Port Index (MAC_1 + n) */
|
||||
{
|
||||
|
||||
#ifdef GENESIS
|
||||
if (pAC->GIni.GIGenesis) {
|
||||
|
||||
SkXmClearRst(pAC, IoC, Port);
|
||||
}
|
||||
#endif /* GENESIS */
|
||||
|
||||
#ifdef YUKON
|
||||
if (pAC->GIni.GIYukon) {
|
||||
|
||||
SkGmClearRst(pAC, IoC, Port);
|
||||
}
|
||||
#endif /* YUKON */
|
||||
|
||||
} /* SkMacClearRst */
|
||||
|
||||
|
||||
#ifdef GENESIS
|
||||
/******************************************************************************
|
||||
*
|
||||
|
@ -1713,7 +1681,7 @@ int Port) /* Port Index (MAC_1 + n) */
|
|||
* Returns:
|
||||
* nothing
|
||||
*/
|
||||
void SkXmInitDupMd(
|
||||
static void SkXmInitDupMd(
|
||||
SK_AC *pAC, /* adapter context */
|
||||
SK_IOC IoC, /* IO context */
|
||||
int Port) /* Port Index (MAC_1 + n) */
|
||||
|
@ -1761,7 +1729,7 @@ int Port) /* Port Index (MAC_1 + n) */
|
|||
* Returns:
|
||||
* nothing
|
||||
*/
|
||||
void SkXmInitPauseMd(
|
||||
static void SkXmInitPauseMd(
|
||||
SK_AC *pAC, /* adapter context */
|
||||
SK_IOC IoC, /* IO context */
|
||||
int Port) /* Port Index (MAC_1 + n) */
|
||||
|
@ -2076,283 +2044,7 @@ SK_BOOL DoLoop) /* Should a Phy LoopBack be set-up? */
|
|||
} /* SkXmInitPhyBcom */
|
||||
#endif /* GENESIS */
|
||||
|
||||
|
||||
#ifdef YUKON
|
||||
#ifndef SK_SLIM
|
||||
/******************************************************************************
|
||||
*
|
||||
* SkGmEnterLowPowerMode()
|
||||
*
|
||||
* Description:
|
||||
* This function sets the Marvell Alaska PHY to the low power mode
|
||||
* given by parameter mode.
|
||||
* The following low power modes are available:
|
||||
*
|
||||
* - Coma Mode (Deep Sleep):
|
||||
* Power consumption: ~15 - 30 mW
|
||||
* The PHY cannot wake up on its own.
|
||||
*
|
||||
* - IEEE 22.2.4.1.5 compatible power down mode
|
||||
* Power consumption: ~240 mW
|
||||
* The PHY cannot wake up on its own.
|
||||
*
|
||||
* - energy detect mode
|
||||
* Power consumption: ~160 mW
|
||||
* The PHY can wake up on its own by detecting activity
|
||||
* on the CAT 5 cable.
|
||||
*
|
||||
* - energy detect plus mode
|
||||
* Power consumption: ~150 mW
|
||||
* The PHY can wake up on its own by detecting activity
|
||||
* on the CAT 5 cable.
|
||||
* Connected devices can be woken up by sending normal link
|
||||
* pulses every one second.
|
||||
*
|
||||
* Note:
|
||||
*
|
||||
* Returns:
|
||||
* 0: ok
|
||||
* 1: error
|
||||
*/
|
||||
int SkGmEnterLowPowerMode(
|
||||
SK_AC *pAC, /* adapter context */
|
||||
SK_IOC IoC, /* IO context */
|
||||
int Port, /* Port Index (e.g. MAC_1) */
|
||||
SK_U8 Mode) /* low power mode */
|
||||
{
|
||||
SK_U16 Word;
|
||||
SK_U32 DWord;
|
||||
SK_U8 LastMode;
|
||||
int Ret = 0;
|
||||
|
||||
if (pAC->GIni.GIYukonLite &&
|
||||
pAC->GIni.GIChipRev >= CHIP_REV_YU_LITE_A3) {
|
||||
|
||||
/* save current power mode */
|
||||
LastMode = pAC->GIni.GP[Port].PPhyPowerState;
|
||||
pAC->GIni.GP[Port].PPhyPowerState = Mode;
|
||||
|
||||
switch (Mode) {
|
||||
/* coma mode (deep sleep) */
|
||||
case PHY_PM_DEEP_SLEEP:
|
||||
/* setup General Purpose Control Register */
|
||||
GM_OUT16(IoC, 0, GM_GP_CTRL, GM_GPCR_FL_PASS |
|
||||
GM_GPCR_SPEED_100 | GM_GPCR_AU_ALL_DIS);
|
||||
|
||||
/* apply COMA mode workaround */
|
||||
SkGmPhyWrite(pAC, IoC, Port, 29, 0x001f);
|
||||
SkGmPhyWrite(pAC, IoC, Port, 30, 0xfff3);
|
||||
|
||||
SK_IN32(IoC, PCI_C(PCI_OUR_REG_1), &DWord);
|
||||
|
||||
SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_ON);
|
||||
|
||||
/* Set PHY to Coma Mode */
|
||||
SK_OUT32(IoC, PCI_C(PCI_OUR_REG_1), DWord | PCI_PHY_COMA);
|
||||
|
||||
SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
|
||||
|
||||
break;
|
||||
|
||||
/* IEEE 22.2.4.1.5 compatible power down mode */
|
||||
case PHY_PM_IEEE_POWER_DOWN:
|
||||
/*
|
||||
* - disable MAC 125 MHz clock
|
||||
* - allow MAC power down
|
||||
*/
|
||||
SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Word);
|
||||
Word |= PHY_M_PC_DIS_125CLK;
|
||||
Word &= ~PHY_M_PC_MAC_POW_UP;
|
||||
SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Word);
|
||||
|
||||
/*
|
||||
* register changes must be followed by a software
|
||||
* reset to take effect
|
||||
*/
|
||||
SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CTRL, &Word);
|
||||
Word |= PHY_CT_RESET;
|
||||
SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL, Word);
|
||||
|
||||
/* switch IEEE compatible power down mode on */
|
||||
SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CTRL, &Word);
|
||||
Word |= PHY_CT_PDOWN;
|
||||
SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL, Word);
|
||||
break;
|
||||
|
||||
/* energy detect and energy detect plus mode */
|
||||
case PHY_PM_ENERGY_DETECT:
|
||||
case PHY_PM_ENERGY_DETECT_PLUS:
|
||||
/*
|
||||
* - disable MAC 125 MHz clock
|
||||
*/
|
||||
SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Word);
|
||||
Word |= PHY_M_PC_DIS_125CLK;
|
||||
SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Word);
|
||||
|
||||
/* activate energy detect mode 1 */
|
||||
SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Word);
|
||||
|
||||
/* energy detect mode */
|
||||
if (Mode == PHY_PM_ENERGY_DETECT) {
|
||||
Word |= PHY_M_PC_EN_DET;
|
||||
}
|
||||
/* energy detect plus mode */
|
||||
else {
|
||||
Word |= PHY_M_PC_EN_DET_PLUS;
|
||||
}
|
||||
|
||||
SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Word);
|
||||
|
||||
/*
|
||||
* reinitialize the PHY to force a software reset
|
||||
* which is necessary after the register settings
|
||||
* for the energy detect modes.
|
||||
* Furthermore reinitialisation prevents that the
|
||||
* PHY is running out of a stable state.
|
||||
*/
|
||||
SkGmInitPhyMarv(pAC, IoC, Port, SK_FALSE);
|
||||
break;
|
||||
|
||||
/* don't change current power mode */
|
||||
default:
|
||||
pAC->GIni.GP[Port].PPhyPowerState = LastMode;
|
||||
Ret = 1;
|
||||
break;
|
||||
}
|
||||
}
|
||||
/* low power modes are not supported by this chip */
|
||||
else {
|
||||
Ret = 1;
|
||||
}
|
||||
|
||||
return(Ret);
|
||||
|
||||
} /* SkGmEnterLowPowerMode */
|
||||
|
||||
/******************************************************************************
|
||||
*
|
||||
* SkGmLeaveLowPowerMode()
|
||||
*
|
||||
* Description:
|
||||
* Leave the current low power mode and switch to normal mode
|
||||
*
|
||||
* Note:
|
||||
*
|
||||
* Returns:
|
||||
* 0: ok
|
||||
* 1: error
|
||||
*/
|
||||
int SkGmLeaveLowPowerMode(
|
||||
SK_AC *pAC, /* adapter context */
|
||||
SK_IOC IoC, /* IO context */
|
||||
int Port) /* Port Index (e.g. MAC_1) */
|
||||
{
|
||||
SK_U32 DWord;
|
||||
SK_U16 Word;
|
||||
SK_U8 LastMode;
|
||||
int Ret = 0;
|
||||
|
||||
if (pAC->GIni.GIYukonLite &&
|
||||
pAC->GIni.GIChipRev >= CHIP_REV_YU_LITE_A3) {
|
||||
|
||||
/* save current power mode */
|
||||
LastMode = pAC->GIni.GP[Port].PPhyPowerState;
|
||||
pAC->GIni.GP[Port].PPhyPowerState = PHY_PM_OPERATIONAL_MODE;
|
||||
|
||||
switch (LastMode) {
|
||||
/* coma mode (deep sleep) */
|
||||
case PHY_PM_DEEP_SLEEP:
|
||||
SK_IN32(IoC, PCI_C(PCI_OUR_REG_1), &DWord);
|
||||
|
||||
SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_ON);
|
||||
|
||||
/* Release PHY from Coma Mode */
|
||||
SK_OUT32(IoC, PCI_C(PCI_OUR_REG_1), DWord & ~PCI_PHY_COMA);
|
||||
|
||||
SK_OUT8(IoC, B2_TST_CTRL1, TST_CFG_WRITE_OFF);
|
||||
|
||||
SK_IN32(IoC, B2_GP_IO, &DWord);
|
||||
|
||||
/* set to output */
|
||||
DWord |= (GP_DIR_9 | GP_IO_9);
|
||||
|
||||
/* set PHY reset */
|
||||
SK_OUT32(IoC, B2_GP_IO, DWord);
|
||||
|
||||
DWord &= ~GP_IO_9; /* clear PHY reset (active high) */
|
||||
|
||||
/* clear PHY reset */
|
||||
SK_OUT32(IoC, B2_GP_IO, DWord);
|
||||
break;
|
||||
|
||||
/* IEEE 22.2.4.1.5 compatible power down mode */
|
||||
case PHY_PM_IEEE_POWER_DOWN:
|
||||
/*
|
||||
* - enable MAC 125 MHz clock
|
||||
* - set MAC power up
|
||||
*/
|
||||
SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Word);
|
||||
Word &= ~PHY_M_PC_DIS_125CLK;
|
||||
Word |= PHY_M_PC_MAC_POW_UP;
|
||||
SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Word);
|
||||
|
||||
/*
|
||||
* register changes must be followed by a software
|
||||
* reset to take effect
|
||||
*/
|
||||
SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CTRL, &Word);
|
||||
Word |= PHY_CT_RESET;
|
||||
SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL, Word);
|
||||
|
||||
/* switch IEEE compatible power down mode off */
|
||||
SkGmPhyRead(pAC, IoC, Port, PHY_MARV_CTRL, &Word);
|
||||
Word &= ~PHY_CT_PDOWN;
|
||||
SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_CTRL, Word);
|
||||
break;
|
||||
|
||||
/* energy detect and energy detect plus mode */
|
||||
case PHY_PM_ENERGY_DETECT:
|
||||
case PHY_PM_ENERGY_DETECT_PLUS:
|
||||
/*
|
||||
* - enable MAC 125 MHz clock
|
||||
*/
|
||||
SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Word);
|
||||
Word &= ~PHY_M_PC_DIS_125CLK;
|
||||
SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Word);
|
||||
|
||||
/* disable energy detect mode */
|
||||
SkGmPhyRead(pAC, IoC, Port, PHY_MARV_PHY_CTRL, &Word);
|
||||
Word &= ~PHY_M_PC_EN_DET_MSK;
|
||||
SkGmPhyWrite(pAC, IoC, Port, PHY_MARV_PHY_CTRL, Word);
|
||||
|
||||
/*
|
||||
* reinitialize the PHY to force a software reset
|
||||
* which is necessary after the register settings
|
||||
* for the energy detect modes.
|
||||
* Furthermore reinitialisation prevents that the
|
||||
* PHY is running out of a stable state.
|
||||
*/
|
||||
SkGmInitPhyMarv(pAC, IoC, Port, SK_FALSE);
|
||||
break;
|
||||
|
||||
/* don't change current power mode */
|
||||
default:
|
||||
pAC->GIni.GP[Port].PPhyPowerState = LastMode;
|
||||
Ret = 1;
|
||||
break;
|
||||
}
|
||||
}
|
||||
/* low power modes are not supported by this chip */
|
||||
else {
|
||||
Ret = 1;
|
||||
}
|
||||
|
||||
return(Ret);
|
||||
|
||||
} /* SkGmLeaveLowPowerMode */
|
||||
#endif /* !SK_SLIM */
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
*
|
||||
* SkGmInitPhyMarv() - Initialize the Marvell Phy registers
|
||||
|
@ -3420,145 +3112,6 @@ int Port) /* Port Index (MAC_1 + n) */
|
|||
} /* SkMacAutoNegDone */
|
||||
|
||||
|
||||
#ifdef GENESIS
|
||||
/******************************************************************************
|
||||
*
|
||||
* SkXmSetRxTxEn() - Special Set Rx/Tx Enable and some features in XMAC
|
||||
*
|
||||
* Description:
|
||||
* sets MAC or PHY LoopBack and Duplex Mode in the MMU Command Reg.
|
||||
* enables Rx/Tx
|
||||
*
|
||||
* Returns: N/A
|
||||
*/
|
||||
static void SkXmSetRxTxEn(
|
||||
SK_AC *pAC, /* Adapter Context */
|
||||
SK_IOC IoC, /* IO context */
|
||||
int Port, /* Port Index (MAC_1 + n) */
|
||||
int Para) /* Parameter to set: MAC or PHY LoopBack, Duplex Mode */
|
||||
{
|
||||
SK_U16 Word;
|
||||
|
||||
XM_IN16(IoC, Port, XM_MMU_CMD, &Word);
|
||||
|
||||
switch (Para & (SK_MAC_LOOPB_ON | SK_MAC_LOOPB_OFF)) {
|
||||
case SK_MAC_LOOPB_ON:
|
||||
Word |= XM_MMU_MAC_LB;
|
||||
break;
|
||||
case SK_MAC_LOOPB_OFF:
|
||||
Word &= ~XM_MMU_MAC_LB;
|
||||
break;
|
||||
}
|
||||
|
||||
switch (Para & (SK_PHY_LOOPB_ON | SK_PHY_LOOPB_OFF)) {
|
||||
case SK_PHY_LOOPB_ON:
|
||||
Word |= XM_MMU_GMII_LOOP;
|
||||
break;
|
||||
case SK_PHY_LOOPB_OFF:
|
||||
Word &= ~XM_MMU_GMII_LOOP;
|
||||
break;
|
||||
}
|
||||
|
||||
switch (Para & (SK_PHY_FULLD_ON | SK_PHY_FULLD_OFF)) {
|
||||
case SK_PHY_FULLD_ON:
|
||||
Word |= XM_MMU_GMII_FD;
|
||||
break;
|
||||
case SK_PHY_FULLD_OFF:
|
||||
Word &= ~XM_MMU_GMII_FD;
|
||||
break;
|
||||
}
|
||||
|
||||
XM_OUT16(IoC, Port, XM_MMU_CMD, Word | XM_MMU_ENA_RX | XM_MMU_ENA_TX);
|
||||
|
||||
/* dummy read to ensure writing */
|
||||
XM_IN16(IoC, Port, XM_MMU_CMD, &Word);
|
||||
|
||||
} /* SkXmSetRxTxEn */
|
||||
#endif /* GENESIS */
|
||||
|
||||
|
||||
#ifdef YUKON
|
||||
/******************************************************************************
|
||||
*
|
||||
* SkGmSetRxTxEn() - Special Set Rx/Tx Enable and some features in GMAC
|
||||
*
|
||||
* Description:
|
||||
* sets MAC LoopBack and Duplex Mode in the General Purpose Control Reg.
|
||||
* enables Rx/Tx
|
||||
*
|
||||
* Returns: N/A
|
||||
*/
|
||||
static void SkGmSetRxTxEn(
|
||||
SK_AC *pAC, /* Adapter Context */
|
||||
SK_IOC IoC, /* IO context */
|
||||
int Port, /* Port Index (MAC_1 + n) */
|
||||
int Para) /* Parameter to set: MAC LoopBack, Duplex Mode */
|
||||
{
|
||||
SK_U16 Ctrl;
|
||||
|
||||
GM_IN16(IoC, Port, GM_GP_CTRL, &Ctrl);
|
||||
|
||||
switch (Para & (SK_MAC_LOOPB_ON | SK_MAC_LOOPB_OFF)) {
|
||||
case SK_MAC_LOOPB_ON:
|
||||
Ctrl |= GM_GPCR_LOOP_ENA;
|
||||
break;
|
||||
case SK_MAC_LOOPB_OFF:
|
||||
Ctrl &= ~GM_GPCR_LOOP_ENA;
|
||||
break;
|
||||
}
|
||||
|
||||
switch (Para & (SK_PHY_FULLD_ON | SK_PHY_FULLD_OFF)) {
|
||||
case SK_PHY_FULLD_ON:
|
||||
Ctrl |= GM_GPCR_DUP_FULL;
|
||||
break;
|
||||
case SK_PHY_FULLD_OFF:
|
||||
Ctrl &= ~GM_GPCR_DUP_FULL;
|
||||
break;
|
||||
}
|
||||
|
||||
GM_OUT16(IoC, Port, GM_GP_CTRL, (SK_U16)(Ctrl | GM_GPCR_RX_ENA |
|
||||
GM_GPCR_TX_ENA));
|
||||
|
||||
/* dummy read to ensure writing */
|
||||
GM_IN16(IoC, Port, GM_GP_CTRL, &Ctrl);
|
||||
|
||||
} /* SkGmSetRxTxEn */
|
||||
#endif /* YUKON */
|
||||
|
||||
|
||||
#ifndef SK_SLIM
|
||||
/******************************************************************************
|
||||
*
|
||||
* SkMacSetRxTxEn() - Special Set Rx/Tx Enable and parameters
|
||||
*
|
||||
* Description: calls the Special Set Rx/Tx Enable routines dep. on board type
|
||||
*
|
||||
* Returns: N/A
|
||||
*/
|
||||
void SkMacSetRxTxEn(
|
||||
SK_AC *pAC, /* Adapter Context */
|
||||
SK_IOC IoC, /* IO context */
|
||||
int Port, /* Port Index (MAC_1 + n) */
|
||||
int Para)
|
||||
{
|
||||
#ifdef GENESIS
|
||||
if (pAC->GIni.GIGenesis) {
|
||||
|
||||
SkXmSetRxTxEn(pAC, IoC, Port, Para);
|
||||
}
|
||||
#endif /* GENESIS */
|
||||
|
||||
#ifdef YUKON
|
||||
if (pAC->GIni.GIYukon) {
|
||||
|
||||
SkGmSetRxTxEn(pAC, IoC, Port, Para);
|
||||
}
|
||||
#endif /* YUKON */
|
||||
|
||||
} /* SkMacSetRxTxEn */
|
||||
#endif /* !SK_SLIM */
|
||||
|
||||
|
||||
/******************************************************************************
|
||||
*
|
||||
* SkMacRxTxEnable() - Enable Rx/Tx activity if port is up
|
||||
|
@ -3976,7 +3529,7 @@ SK_U16 PhyStat) /* PHY Status word to analyse */
|
|||
* Returns:
|
||||
* nothing
|
||||
*/
|
||||
void SkXmIrq(
|
||||
static void SkXmIrq(
|
||||
SK_AC *pAC, /* adapter context */
|
||||
SK_IOC IoC, /* IO context */
|
||||
int Port) /* Port Index (MAC_1 + n) */
|
||||
|
@ -4112,7 +3665,7 @@ int Port) /* Port Index (MAC_1 + n) */
|
|||
* Returns:
|
||||
* nothing
|
||||
*/
|
||||
void SkGmIrq(
|
||||
static void SkGmIrq(
|
||||
SK_AC *pAC, /* adapter context */
|
||||
SK_IOC IoC, /* IO context */
|
||||
int Port) /* Port Index (MAC_1 + n) */
|
||||
|
|
|
@ -122,6 +122,7 @@
|
|||
#include <linux/spinlock.h>
|
||||
#include <linux/version.h>
|
||||
#include <linux/bitops.h>
|
||||
#include <linux/jiffies.h>
|
||||
|
||||
#include <net/checksum.h>
|
||||
|
||||
|
@ -512,7 +513,7 @@ static int streamer_reset(struct net_device *dev)
|
|||
|
||||
while (!((readw(streamer_mmio + SISR)) & SISR_SRB_REPLY)) {
|
||||
msleep_interruptible(100);
|
||||
if (jiffies - t > 40 * HZ) {
|
||||
if (time_after(jiffies, t + 40 * HZ)) {
|
||||
printk(KERN_ERR
|
||||
"IBM PCI tokenring card not responding\n");
|
||||
release_region(dev->base_addr, STREAMER_IO_SPACE);
|
||||
|
|
|
@ -100,6 +100,7 @@
|
|||
#include <linux/pci.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/bitops.h>
|
||||
#include <linux/jiffies.h>
|
||||
|
||||
#include <net/checksum.h>
|
||||
|
||||
|
@ -307,7 +308,7 @@ static int __devinit olympic_init(struct net_device *dev)
|
|||
t=jiffies;
|
||||
while((readl(olympic_mmio+BCTL)) & BCTL_SOFTRESET) {
|
||||
schedule();
|
||||
if(jiffies-t > 40*HZ) {
|
||||
if(time_after(jiffies, t + 40*HZ)) {
|
||||
printk(KERN_ERR "IBM PCI tokenring card not responding.\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
@ -359,7 +360,7 @@ static int __devinit olympic_init(struct net_device *dev)
|
|||
t=jiffies;
|
||||
while (!readl(olympic_mmio+CLKCTL) & CLKCTL_PAUSE) {
|
||||
schedule() ;
|
||||
if(jiffies-t > 2*HZ) {
|
||||
if(time_after(jiffies, t + 2*HZ)) {
|
||||
printk(KERN_ERR "IBM Cardbus tokenring adapter not responsing.\n") ;
|
||||
return -ENODEV;
|
||||
}
|
||||
|
@ -373,7 +374,7 @@ static int __devinit olympic_init(struct net_device *dev)
|
|||
t=jiffies;
|
||||
while(!((readl(olympic_mmio+SISR_RR)) & SISR_SRB_REPLY)) {
|
||||
schedule();
|
||||
if(jiffies-t > 15*HZ) {
|
||||
if(time_after(jiffies, t + 15*HZ)) {
|
||||
printk(KERN_ERR "IBM PCI tokenring card not responding.\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
@ -519,7 +520,7 @@ static int olympic_open(struct net_device *dev)
|
|||
olympic_priv->srb_queued=0;
|
||||
break;
|
||||
}
|
||||
if ((jiffies-t) > 10*HZ) {
|
||||
if (time_after(jiffies, t + 10*HZ)) {
|
||||
printk(KERN_WARNING "%s: SRB timed out. \n",dev->name) ;
|
||||
olympic_priv->srb_queued=0;
|
||||
break ;
|
||||
|
|
|
@ -16,6 +16,7 @@
|
|||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/jiffies.h>
|
||||
#include "tulip.h"
|
||||
|
||||
|
||||
|
@ -68,7 +69,7 @@ void pnic_lnk_change(struct net_device *dev, int csr5)
|
|||
*/
|
||||
if (tulip_media_cap[dev->if_port] & MediaIsMII)
|
||||
return;
|
||||
if (! tp->nwayset || jiffies - dev->trans_start > 1*HZ) {
|
||||
if (! tp->nwayset || time_after(jiffies, dev->trans_start + 1*HZ)) {
|
||||
tp->csr6 = 0x00420000 | (tp->csr6 & 0x0000fdff);
|
||||
iowrite32(tp->csr6, ioaddr + CSR6);
|
||||
iowrite32(0x30, ioaddr + CSR12);
|
||||
|
|
|
@ -112,7 +112,7 @@ static const char StripVersion[] = "1.3A-STUART.CHESHIRE";
|
|||
#include <linux/ip.h>
|
||||
#include <linux/tcp.h>
|
||||
#include <linux/time.h>
|
||||
|
||||
#include <linux/jiffies.h>
|
||||
|
||||
/************************************************************************/
|
||||
/* Useful structures and definitions */
|
||||
|
@ -1569,7 +1569,7 @@ static int strip_xmit(struct sk_buff *skb, struct net_device *dev)
|
|||
del_timer(&strip_info->idle_timer);
|
||||
|
||||
|
||||
if (jiffies - strip_info->pps_timer > HZ) {
|
||||
if (time_after(jiffies, strip_info->pps_timer + HZ)) {
|
||||
unsigned long t = jiffies - strip_info->pps_timer;
|
||||
unsigned long rx_pps_count = (strip_info->rx_pps_count * HZ * 8 + t / 2) / t;
|
||||
unsigned long tx_pps_count = (strip_info->tx_pps_count * HZ * 8 + t / 2) / t;
|
||||
|
|
|
@ -27,6 +27,7 @@
|
|||
#include <linux/netdevice.h>
|
||||
#include <linux/etherdevice.h>
|
||||
#include <linux/zorro.h>
|
||||
#include <linux/jiffies.h>
|
||||
|
||||
#include <asm/system.h>
|
||||
#include <asm/irq.h>
|
||||
|
@ -151,7 +152,7 @@ static int __devinit zorro8390_init(struct net_device *dev,
|
|||
z_writeb(z_readb(ioaddr + NE_RESET), ioaddr + NE_RESET);
|
||||
|
||||
while ((z_readb(ioaddr + NE_EN0_ISR) & ENISR_RESET) == 0)
|
||||
if (jiffies - reset_start_time > 2*HZ/100) {
|
||||
if (time_after(jiffies, reset_start_time + 2*HZ/100)) {
|
||||
printk(KERN_WARNING " not found (no reset ack).\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
|
@ -273,7 +274,7 @@ static void zorro8390_reset_8390(struct net_device *dev)
|
|||
|
||||
/* This check _should_not_ be necessary, omit eventually. */
|
||||
while ((z_readb(NE_BASE+NE_EN0_ISR) & ENISR_RESET) == 0)
|
||||
if (jiffies - reset_start_time > 2*HZ/100) {
|
||||
if (time_after(jiffies, reset_start_time + 2*HZ/100)) {
|
||||
printk(KERN_WARNING "%s: ne_reset_8390() did not complete.\n",
|
||||
dev->name);
|
||||
break;
|
||||
|
@ -400,7 +401,7 @@ static void zorro8390_block_output(struct net_device *dev, int count,
|
|||
dma_start = jiffies;
|
||||
|
||||
while ((z_readb(NE_BASE + NE_EN0_ISR) & ENISR_RDC) == 0)
|
||||
if (jiffies - dma_start > 2*HZ/100) { /* 20ms */
|
||||
if (time_after(jiffies, dma_start + 2*HZ/100)) { /* 20ms */
|
||||
printk(KERN_ERR "%s: timeout waiting for Tx RDC.\n",
|
||||
dev->name);
|
||||
zorro8390_reset_8390(dev);
|
||||
|
|
|
@ -206,7 +206,6 @@ struct ArcProto {
|
|||
|
||||
extern struct ArcProto *arc_proto_map[256], *arc_proto_default,
|
||||
*arc_bcast_proto, *arc_raw_proto;
|
||||
extern struct ArcProto arc_proto_null;
|
||||
|
||||
|
||||
/*
|
||||
|
@ -334,17 +333,9 @@ void arcnet_dump_skb(struct net_device *dev, struct sk_buff *skb, char *desc);
|
|||
#define arcnet_dump_skb(dev,skb,desc) ;
|
||||
#endif
|
||||
|
||||
#if (ARCNET_DEBUG_MAX & D_RX) || (ARCNET_DEBUG_MAX & D_TX)
|
||||
void arcnet_dump_packet(struct net_device *dev, int bufnum, char *desc,
|
||||
int take_arcnet_lock);
|
||||
#else
|
||||
#define arcnet_dump_packet(dev, bufnum, desc,take_arcnet_lock) ;
|
||||
#endif
|
||||
|
||||
void arcnet_unregister_proto(struct ArcProto *proto);
|
||||
irqreturn_t arcnet_interrupt(int irq, void *dev_id, struct pt_regs *regs);
|
||||
struct net_device *alloc_arcdev(char *name);
|
||||
void arcnet_rx(struct net_device *dev, int bufnum);
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
#endif /* _LINUX_ARCDEVICE_H */
|
||||
|
|
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