[media] ths8200/ad9389b: use new dv_timings helpers
Simplify the code by using the new dv_timings helpers. Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
This commit is contained in:
Hans Verkuil
Mauro Carvalho Chehab
Родитель
e36552684e
Коммит
0416490481
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@ -635,95 +635,34 @@ static int ad9389b_s_stream(struct v4l2_subdev *sd, int enable)
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return 0;
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}
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static const struct v4l2_dv_timings ad9389b_timings[] = {
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V4L2_DV_BT_CEA_720X480P59_94,
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V4L2_DV_BT_CEA_720X576P50,
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V4L2_DV_BT_CEA_1280X720P24,
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V4L2_DV_BT_CEA_1280X720P25,
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V4L2_DV_BT_CEA_1280X720P30,
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V4L2_DV_BT_CEA_1280X720P50,
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V4L2_DV_BT_CEA_1280X720P60,
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V4L2_DV_BT_CEA_1920X1080P24,
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V4L2_DV_BT_CEA_1920X1080P25,
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V4L2_DV_BT_CEA_1920X1080P30,
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V4L2_DV_BT_CEA_1920X1080P50,
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V4L2_DV_BT_CEA_1920X1080P60,
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V4L2_DV_BT_DMT_640X350P85,
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V4L2_DV_BT_DMT_640X400P85,
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V4L2_DV_BT_DMT_720X400P85,
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V4L2_DV_BT_DMT_640X480P60,
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V4L2_DV_BT_DMT_640X480P72,
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V4L2_DV_BT_DMT_640X480P75,
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V4L2_DV_BT_DMT_640X480P85,
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V4L2_DV_BT_DMT_800X600P56,
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V4L2_DV_BT_DMT_800X600P60,
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V4L2_DV_BT_DMT_800X600P72,
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V4L2_DV_BT_DMT_800X600P75,
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V4L2_DV_BT_DMT_800X600P85,
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V4L2_DV_BT_DMT_848X480P60,
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V4L2_DV_BT_DMT_1024X768P60,
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V4L2_DV_BT_DMT_1024X768P70,
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V4L2_DV_BT_DMT_1024X768P75,
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V4L2_DV_BT_DMT_1024X768P85,
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V4L2_DV_BT_DMT_1152X864P75,
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V4L2_DV_BT_DMT_1280X768P60_RB,
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V4L2_DV_BT_DMT_1280X768P60,
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V4L2_DV_BT_DMT_1280X768P75,
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V4L2_DV_BT_DMT_1280X768P85,
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V4L2_DV_BT_DMT_1280X800P60_RB,
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V4L2_DV_BT_DMT_1280X800P60,
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V4L2_DV_BT_DMT_1280X800P75,
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V4L2_DV_BT_DMT_1280X800P85,
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V4L2_DV_BT_DMT_1280X960P60,
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V4L2_DV_BT_DMT_1280X960P85,
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V4L2_DV_BT_DMT_1280X1024P60,
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V4L2_DV_BT_DMT_1280X1024P75,
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V4L2_DV_BT_DMT_1280X1024P85,
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V4L2_DV_BT_DMT_1360X768P60,
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V4L2_DV_BT_DMT_1400X1050P60_RB,
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V4L2_DV_BT_DMT_1400X1050P60,
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V4L2_DV_BT_DMT_1400X1050P75,
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V4L2_DV_BT_DMT_1400X1050P85,
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V4L2_DV_BT_DMT_1440X900P60_RB,
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V4L2_DV_BT_DMT_1440X900P60,
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V4L2_DV_BT_DMT_1600X1200P60,
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V4L2_DV_BT_DMT_1680X1050P60_RB,
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V4L2_DV_BT_DMT_1680X1050P60,
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V4L2_DV_BT_DMT_1792X1344P60,
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V4L2_DV_BT_DMT_1856X1392P60,
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V4L2_DV_BT_DMT_1920X1200P60_RB,
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V4L2_DV_BT_DMT_1366X768P60,
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V4L2_DV_BT_DMT_1920X1080P60,
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{},
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static const struct v4l2_dv_timings_cap ad9389b_timings_cap = {
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.type = V4L2_DV_BT_656_1120,
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.bt = {
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.max_width = 1920,
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.max_height = 1200,
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.min_pixelclock = 27000000,
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.max_pixelclock = 170000000,
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.standards = V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT |
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V4L2_DV_BT_STD_GTF | V4L2_DV_BT_STD_CVT,
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.capabilities = V4L2_DV_BT_CAP_PROGRESSIVE |
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V4L2_DV_BT_CAP_REDUCED_BLANKING | V4L2_DV_BT_CAP_CUSTOM,
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},
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};
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static int ad9389b_s_dv_timings(struct v4l2_subdev *sd,
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struct v4l2_dv_timings *timings)
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{
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struct ad9389b_state *state = get_ad9389b_state(sd);
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int i;
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v4l2_dbg(1, debug, sd, "%s:\n", __func__);
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/* quick sanity check */
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if (timings->type != V4L2_DV_BT_656_1120)
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return -EINVAL;
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if (timings->bt.interlaced)
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return -EINVAL;
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if (timings->bt.pixelclock < 27000000 ||
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timings->bt.pixelclock > 170000000)
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if (!v4l2_dv_valid_timings(timings, &ad9389b_timings_cap))
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return -EINVAL;
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/* Fill the optional fields .standards and .flags in struct v4l2_dv_timings
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if the format is listed in ad9389b_timings[] */
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for (i = 0; ad9389b_timings[i].bt.width; i++) {
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if (v4l_match_dv_timings(timings, &ad9389b_timings[i], 0)) {
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*timings = ad9389b_timings[i];
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break;
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}
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}
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if the format is one of the CEA or DMT timings. */
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v4l2_find_dv_timings_cap(timings, &ad9389b_timings_cap, 0);
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timings->bt.flags &= ~V4L2_DV_FL_REDUCED_FPS;
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@ -761,26 +700,13 @@ static int ad9389b_g_dv_timings(struct v4l2_subdev *sd,
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static int ad9389b_enum_dv_timings(struct v4l2_subdev *sd,
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struct v4l2_enum_dv_timings *timings)
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{
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if (timings->index >= ARRAY_SIZE(ad9389b_timings))
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return -EINVAL;
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memset(timings->reserved, 0, sizeof(timings->reserved));
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timings->timings = ad9389b_timings[timings->index];
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return 0;
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return v4l2_enum_dv_timings_cap(timings, &ad9389b_timings_cap);
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}
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static int ad9389b_dv_timings_cap(struct v4l2_subdev *sd,
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struct v4l2_dv_timings_cap *cap)
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{
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cap->type = V4L2_DV_BT_656_1120;
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cap->bt.max_width = 1920;
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cap->bt.max_height = 1200;
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cap->bt.min_pixelclock = 27000000;
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cap->bt.max_pixelclock = 170000000;
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cap->bt.standards = V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT |
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V4L2_DV_BT_STD_GTF | V4L2_DV_BT_STD_CVT;
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cap->bt.capabilities = V4L2_DV_BT_CAP_PROGRESSIVE |
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V4L2_DV_BT_CAP_REDUCED_BLANKING | V4L2_DV_BT_CAP_CUSTOM;
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*cap = ad9389b_timings_cap;
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return 0;
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}
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@ -44,18 +44,16 @@ struct ths8200_state {
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struct v4l2_dv_timings dv_timings;
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};
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static const struct v4l2_dv_timings ths8200_timings[] = {
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V4L2_DV_BT_CEA_720X480P59_94,
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V4L2_DV_BT_CEA_1280X720P24,
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V4L2_DV_BT_CEA_1280X720P25,
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V4L2_DV_BT_CEA_1280X720P30,
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V4L2_DV_BT_CEA_1280X720P50,
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V4L2_DV_BT_CEA_1280X720P60,
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V4L2_DV_BT_CEA_1920X1080P24,
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V4L2_DV_BT_CEA_1920X1080P25,
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V4L2_DV_BT_CEA_1920X1080P30,
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V4L2_DV_BT_CEA_1920X1080P50,
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V4L2_DV_BT_CEA_1920X1080P60,
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static const struct v4l2_dv_timings_cap ths8200_timings_cap = {
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.type = V4L2_DV_BT_656_1120,
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.bt = {
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.max_width = 1920,
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.max_height = 1080,
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.min_pixelclock = 27000000,
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.max_pixelclock = 148500000,
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.standards = V4L2_DV_BT_STD_CEA861,
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.capabilities = V4L2_DV_BT_CAP_PROGRESSIVE,
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},
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};
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static inline struct ths8200_state *to_state(struct v4l2_subdev *sd)
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@ -411,25 +409,13 @@ static int ths8200_s_dv_timings(struct v4l2_subdev *sd,
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struct v4l2_dv_timings *timings)
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{
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struct ths8200_state *state = to_state(sd);
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int i;
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v4l2_dbg(1, debug, sd, "%s:\n", __func__);
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if (timings->type != V4L2_DV_BT_656_1120)
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if (!v4l2_dv_valid_timings(timings, &ths8200_timings_cap))
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return -EINVAL;
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/* TODO Support interlaced formats */
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if (timings->bt.interlaced) {
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v4l2_dbg(1, debug, sd, "TODO Support interlaced formats\n");
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return -EINVAL;
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}
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for (i = 0; i < ARRAY_SIZE(ths8200_timings); i++) {
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if (v4l_match_dv_timings(&ths8200_timings[i], timings, 10))
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break;
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}
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if (i == ARRAY_SIZE(ths8200_timings)) {
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if (!v4l2_find_dv_timings_cap(timings, &ths8200_timings_cap, 10)) {
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v4l2_dbg(1, debug, sd, "Unsupported format\n");
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return -EINVAL;
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}
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@ -459,26 +445,13 @@ static int ths8200_g_dv_timings(struct v4l2_subdev *sd,
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static int ths8200_enum_dv_timings(struct v4l2_subdev *sd,
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struct v4l2_enum_dv_timings *timings)
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{
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/* Check requested format index is within range */
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if (timings->index >= ARRAY_SIZE(ths8200_timings))
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return -EINVAL;
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timings->timings = ths8200_timings[timings->index];
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return 0;
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return v4l2_enum_dv_timings_cap(timings, &ths8200_timings_cap);
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}
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static int ths8200_dv_timings_cap(struct v4l2_subdev *sd,
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struct v4l2_dv_timings_cap *cap)
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{
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cap->type = V4L2_DV_BT_656_1120;
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cap->bt.max_width = 1920;
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cap->bt.max_height = 1080;
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cap->bt.min_pixelclock = 27000000;
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cap->bt.max_pixelclock = 148500000;
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cap->bt.standards = V4L2_DV_BT_STD_CEA861;
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cap->bt.capabilities = V4L2_DV_BT_CAP_PROGRESSIVE;
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*cap = ths8200_timings_cap;
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return 0;
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}
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