drm/nouveau/gr/gf100-: virtualise init_400054
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Родитель
6df6d2b95e
Коммит
04547482ae
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@ -1914,6 +1914,12 @@ gf100_gr_new_(const struct gf100_gr_func *func, struct nvkm_device *device,
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return 0;
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}
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void
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gf100_gr_init_400054(struct gf100_gr *gr)
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{
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nvkm_wr32(gr->base.engine.subdev.device, 0x400054, 0x34ce3464);
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}
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void
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gf100_gr_init_shader_exceptions(struct gf100_gr *gr, int gpc, int tpc)
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{
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@ -2122,7 +2128,8 @@ gf100_gr_init(struct gf100_gr *gr)
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nvkm_wr32(device, 0x40011c, 0xffffffff);
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nvkm_wr32(device, 0x400134, 0xffffffff);
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nvkm_wr32(device, 0x400054, 0x34ce3464);
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if (gr->func->init_400054)
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gr->func->init_400054(gr);
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gf100_gr_zbc_init(gr);
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@ -2162,6 +2169,7 @@ gf100_gr = {
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.init_419eb4 = gf100_gr_init_419eb4,
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.init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
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.init_shader_exceptions = gf100_gr_init_shader_exceptions,
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.init_400054 = gf100_gr_init_400054,
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.mmio = gf100_gr_pack_mmio,
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.fecs.ucode = &gf100_gr_fecs_ucode,
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.gpccs.ucode = &gf100_gr_gpccs_ucode,
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@ -141,6 +141,7 @@ struct gf100_gr_func {
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void (*init_tex_hww_esr)(struct gf100_gr *, int gpc, int tpc);
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void (*init_504430)(struct gf100_gr *, int gpc, int tpc);
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void (*init_shader_exceptions)(struct gf100_gr *, int gpc, int tpc);
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void (*init_400054)(struct gf100_gr *);
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void (*set_hww_esr_report_mask)(struct gf100_gr *);
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const struct gf100_gr_pack *mmio;
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struct {
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@ -167,6 +168,7 @@ void gf100_gr_init_419cc0(struct gf100_gr *);
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void gf100_gr_init_419eb4(struct gf100_gr *);
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void gf100_gr_init_tex_hww_esr(struct gf100_gr *, int, int);
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void gf100_gr_init_shader_exceptions(struct gf100_gr *, int, int);
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void gf100_gr_init_400054(struct gf100_gr *);
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void gf117_gr_init_zcull(struct gf100_gr *);
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@ -180,6 +182,7 @@ void gk110_gr_init_419eb4(struct gf100_gr *);
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void gm107_gr_init_504430(struct gf100_gr *, int, int);
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void gm107_gr_init_shader_exceptions(struct gf100_gr *, int, int);
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void gm107_gr_init_400054(struct gf100_gr *);
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int gk20a_gr_init(struct gf100_gr *);
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@ -125,6 +125,7 @@ gf104_gr = {
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.init_419eb4 = gf100_gr_init_419eb4,
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.init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
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.init_shader_exceptions = gf100_gr_init_shader_exceptions,
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.init_400054 = gf100_gr_init_400054,
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.mmio = gf104_gr_pack_mmio,
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.fecs.ucode = &gf100_gr_fecs_ucode,
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.gpccs.ucode = &gf100_gr_gpccs_ucode,
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@ -123,6 +123,7 @@ gf108_gr = {
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.init_419eb4 = gf100_gr_init_419eb4,
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.init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
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.init_shader_exceptions = gf100_gr_init_shader_exceptions,
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.init_400054 = gf100_gr_init_400054,
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.mmio = gf108_gr_pack_mmio,
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.fecs.ucode = &gf100_gr_fecs_ucode,
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.gpccs.ucode = &gf100_gr_gpccs_ucode,
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@ -97,6 +97,7 @@ gf110_gr = {
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.init_419eb4 = gf100_gr_init_419eb4,
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.init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
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.init_shader_exceptions = gf100_gr_init_shader_exceptions,
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.init_400054 = gf100_gr_init_400054,
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.mmio = gf110_gr_pack_mmio,
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.fecs.ucode = &gf100_gr_fecs_ucode,
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.gpccs.ucode = &gf100_gr_gpccs_ucode,
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@ -161,6 +161,7 @@ gf117_gr = {
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.init_419eb4 = gf100_gr_init_419eb4,
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.init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
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.init_shader_exceptions = gf100_gr_init_shader_exceptions,
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.init_400054 = gf100_gr_init_400054,
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.mmio = gf117_gr_pack_mmio,
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.fecs.ucode = &gf117_gr_fecs_ucode,
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.gpccs.ucode = &gf117_gr_gpccs_ucode,
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@ -188,6 +188,7 @@ gf119_gr = {
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.init_419eb4 = gf100_gr_init_419eb4,
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.init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
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.init_shader_exceptions = gf100_gr_init_shader_exceptions,
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.init_400054 = gf100_gr_init_400054,
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.mmio = gf119_gr_pack_mmio,
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.fecs.ucode = &gf100_gr_fecs_ucode,
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.gpccs.ucode = &gf100_gr_gpccs_ucode,
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@ -495,7 +495,7 @@ gk104_gr_init(struct gf100_gr *gr)
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nvkm_wr32(device, 0x40011c, 0xffffffff);
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nvkm_wr32(device, 0x400134, 0xffffffff);
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nvkm_wr32(device, 0x400054, 0x34ce3464);
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gr->func->init_400054(gr);
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gf100_gr_zbc_init(gr);
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@ -537,6 +537,7 @@ gk104_gr = {
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.init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
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.init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
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.init_shader_exceptions = gf100_gr_init_shader_exceptions,
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.init_400054 = gf100_gr_init_400054,
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.mmio = gk104_gr_pack_mmio,
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.fecs.ucode = &gk104_gr_fecs_ucode,
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.gpccs.ucode = &gk104_gr_gpccs_ucode,
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@ -363,6 +363,7 @@ gk110_gr = {
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.init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
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.init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
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.init_shader_exceptions = gf100_gr_init_shader_exceptions,
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.init_400054 = gf100_gr_init_400054,
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.mmio = gk110_gr_pack_mmio,
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.fecs.ucode = &gk110_gr_fecs_ucode,
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.gpccs.ucode = &gk110_gr_gpccs_ucode,
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@ -115,6 +115,7 @@ gk110b_gr = {
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.init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
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.init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
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.init_shader_exceptions = gf100_gr_init_shader_exceptions,
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.init_400054 = gf100_gr_init_400054,
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.mmio = gk110b_gr_pack_mmio,
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.fecs.ucode = &gk110_gr_fecs_ucode,
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.gpccs.ucode = &gk110_gr_gpccs_ucode,
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@ -173,6 +173,7 @@ gk208_gr = {
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.init_ppc_exceptions = gk104_gr_init_ppc_exceptions,
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.init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
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.init_shader_exceptions = gf100_gr_init_shader_exceptions,
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.init_400054 = gf100_gr_init_400054,
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.mmio = gk208_gr_pack_mmio,
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.fecs.ucode = &gk208_gr_fecs_ucode,
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.gpccs.ucode = &gk208_gr_gpccs_ucode,
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@ -281,6 +281,12 @@ gm107_gr_pack_mmio[] = {
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* PGRAPH engine/subdev functions
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******************************************************************************/
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void
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gm107_gr_init_400054(struct gf100_gr *gr)
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{
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nvkm_wr32(gr->base.engine.subdev.device, 0x400054, 0x2c350f63);
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}
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void
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gm107_gr_init_shader_exceptions(struct gf100_gr *gr, int gpc, int tpc)
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{
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@ -431,7 +437,7 @@ gm107_gr_init(struct gf100_gr *gr)
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nvkm_wr32(device, 0x40011c, 0xffffffff);
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nvkm_wr32(device, 0x400134, 0xffffffff);
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nvkm_wr32(device, 0x400054, 0x2c350f63);
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gr->func->init_400054(gr);
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gf100_gr_zbc_init(gr);
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@ -475,6 +481,7 @@ gm107_gr = {
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.init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
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.init_504430 = gm107_gr_init_504430,
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.init_shader_exceptions = gm107_gr_init_shader_exceptions,
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.init_400054 = gm107_gr_init_400054,
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.mmio = gm107_gr_pack_mmio,
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.fecs.ucode = &gm107_gr_fecs_ucode,
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.gpccs.ucode = &gm107_gr_gpccs_ucode,
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@ -144,7 +144,7 @@ gm200_gr_init(struct gf100_gr *gr)
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nvkm_wr32(device, 0x40011c, 0xffffffff);
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nvkm_wr32(device, 0x400134, 0xffffffff);
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nvkm_wr32(device, 0x400054, 0x2c350f63);
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gr->func->init_400054(gr);
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gf100_gr_zbc_init(gr);
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@ -206,6 +206,7 @@ gm200_gr = {
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.init_tex_hww_esr = gf100_gr_init_tex_hww_esr,
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.init_504430 = gm107_gr_init_504430,
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.init_shader_exceptions = gm107_gr_init_shader_exceptions,
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.init_400054 = gm107_gr_init_400054,
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.rops = gm200_gr_rops,
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.ppc_nr = 2,
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.grctx = &gm200_grctx,
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