Merge branch 'for-tony' of git://gitorious.org/usb/usb into omap-for-linus
Conflicts: arch/arm/mach-omap2/omap_hwmod_2430_data.c arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
This commit is contained in:
Коммит
04aa67dec6
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@ -218,7 +218,8 @@ obj-$(CONFIG_MACH_OMAP4_PANDA) += board-omap4panda.o \
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hsmmc.o \
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omap_phy_internal.o
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obj-$(CONFIG_MACH_OMAP3517EVM) += board-am3517evm.o
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obj-$(CONFIG_MACH_OMAP3517EVM) += board-am3517evm.o \
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omap_phy_internal.o \
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obj-$(CONFIG_MACH_CRANEBOARD) += board-am3517crane.o
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@ -44,7 +44,6 @@
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#define ETH_KS8851_IRQ 34
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#define ETH_KS8851_POWER_ON 48
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#define ETH_KS8851_QUART 138
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#define OMAP4SDP_MDM_PWR_EN_GPIO 157
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#define OMAP4_SFH7741_SENSOR_OUTPUT_GPIO 184
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#define OMAP4_SFH7741_ENABLE_GPIO 188
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@ -250,16 +249,6 @@ static void __init omap_4430sdp_init_early(void)
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#endif
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}
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static const struct ehci_hcd_omap_platform_data ehci_pdata __initconst = {
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.port_mode[0] = EHCI_HCD_OMAP_MODE_PHY,
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.port_mode[1] = EHCI_HCD_OMAP_MODE_UNKNOWN,
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.port_mode[2] = EHCI_HCD_OMAP_MODE_UNKNOWN,
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.phy_reset = false,
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.reset_gpio_port[0] = -EINVAL,
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.reset_gpio_port[1] = -EINVAL,
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.reset_gpio_port[2] = -EINVAL,
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};
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static struct omap_musb_board_data musb_board_data = {
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.interface_type = MUSB_INTERFACE_UTMI,
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.mode = MUSB_OTG,
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@ -575,14 +564,6 @@ static void __init omap_4430sdp_init(void)
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omap_serial_init();
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omap4_twl6030_hsmmc_init(mmc);
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/* Power on the ULPI PHY */
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status = gpio_request(OMAP4SDP_MDM_PWR_EN_GPIO, "USBB1 PHY VMDM_3V3");
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if (status)
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pr_err("%s: Could not get USBB1 PHY GPIO\n", __func__);
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else
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gpio_direction_output(OMAP4SDP_MDM_PWR_EN_GPIO, 1);
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usb_ehci_init(&ehci_pdata);
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usb_musb_init(&musb_board_data);
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status = omap_ethernet_init();
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@ -408,6 +408,10 @@ static struct omap_musb_board_data musb_board_data = {
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.interface_type = MUSB_INTERFACE_ULPI,
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.mode = MUSB_OTG,
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.power = 500,
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.set_phy_power = am35x_musb_phy_power,
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.clear_irq = am35x_musb_clear_irq,
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.set_mode = am35x_musb_set_mode,
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.reset = am35x_musb_reset,
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};
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static __init void am3517_evm_musb_init(void)
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@ -93,6 +93,16 @@ static struct omap_hwmod omap2430_uart3_hwmod;
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static struct omap_hwmod omap2430_i2c1_hwmod;
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static struct omap_hwmod omap2430_i2c2_hwmod;
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static struct omap_hwmod omap2430_usbhsotg_hwmod;
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/* l3_core -> usbhsotg interface */
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static struct omap_hwmod_ocp_if omap2430_usbhsotg__l3 = {
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.master = &omap2430_usbhsotg_hwmod,
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.slave = &omap2430_l3_main_hwmod,
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.clk = "core_l3_ck",
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.user = OCP_USER_MPU,
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};
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/* I2C IP block address space length (in bytes) */
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#define OMAP2_I2C_AS_LEN 128
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@ -193,6 +203,35 @@ static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = {
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/*
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* usbhsotg interface data
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*/
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static struct omap_hwmod_addr_space omap2430_usbhsotg_addrs[] = {
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{
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.pa_start = OMAP243X_HS_BASE,
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.pa_end = OMAP243X_HS_BASE + SZ_4K - 1,
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.flags = ADDR_TYPE_RT
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},
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};
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/* l4_core ->usbhsotg interface */
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static struct omap_hwmod_ocp_if omap2430_l4_core__usbhsotg = {
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.master = &omap2430_l4_core_hwmod,
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.slave = &omap2430_usbhsotg_hwmod,
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.clk = "usb_l4_ick",
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.addr = omap2430_usbhsotg_addrs,
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.addr_cnt = ARRAY_SIZE(omap2430_usbhsotg_addrs),
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.user = OCP_USER_MPU,
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};
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static struct omap_hwmod_ocp_if *omap2430_usbhsotg_masters[] = {
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&omap2430_usbhsotg__l3,
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};
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static struct omap_hwmod_ocp_if *omap2430_usbhsotg_slaves[] = {
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&omap2430_l4_core__usbhsotg,
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};
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/* Slave interfaces on the L4_CORE interconnect */
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static struct omap_hwmod_ocp_if *omap2430_l4_core_slaves[] = {
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&omap2430_l3_main__l4_core,
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@ -1133,6 +1172,64 @@ static struct omap_hwmod omap2430_mcspi3_hwmod = {
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.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430),
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};
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/*
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* usbhsotg
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*/
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static struct omap_hwmod_class_sysconfig omap2430_usbhsotg_sysc = {
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.rev_offs = 0x0400,
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.sysc_offs = 0x0404,
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.syss_offs = 0x0408,
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.sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE|
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SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
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SYSC_HAS_AUTOIDLE),
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.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
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MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
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.sysc_fields = &omap_hwmod_sysc_type1,
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};
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static struct omap_hwmod_class usbotg_class = {
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.name = "usbotg",
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.sysc = &omap2430_usbhsotg_sysc,
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};
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/* usb_otg_hs */
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static struct omap_hwmod_irq_info omap2430_usbhsotg_mpu_irqs[] = {
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{ .name = "mc", .irq = 92 },
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{ .name = "dma", .irq = 93 },
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};
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static struct omap_hwmod omap2430_usbhsotg_hwmod = {
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.name = "usb_otg_hs",
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.mpu_irqs = omap2430_usbhsotg_mpu_irqs,
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.mpu_irqs_cnt = ARRAY_SIZE(omap2430_usbhsotg_mpu_irqs),
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.main_clk = "usbhs_ick",
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.prcm = {
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.omap2 = {
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.prcm_reg_id = 1,
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.module_bit = OMAP2430_EN_USBHS_MASK,
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.module_offs = CORE_MOD,
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.idlest_reg_id = 1,
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.idlest_idle_bit = OMAP2430_ST_USBHS_SHIFT,
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},
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},
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.masters = omap2430_usbhsotg_masters,
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.masters_cnt = ARRAY_SIZE(omap2430_usbhsotg_masters),
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.slaves = omap2430_usbhsotg_slaves,
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.slaves_cnt = ARRAY_SIZE(omap2430_usbhsotg_slaves),
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.class = &usbotg_class,
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/*
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* Erratum ID: i479 idle_req / idle_ack mechanism potentially
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* broken when autoidle is enabled
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* workaround is to disable the autoidle bit at module level.
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*/
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.flags = HWMOD_NO_OCP_AUTOIDLE | HWMOD_SWSUP_SIDLE
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| HWMOD_SWSUP_MSTANDBY,
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.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2430)
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};
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static __initdata struct omap_hwmod *omap2430_hwmods[] = {
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&omap2430_l3_main_hwmod,
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&omap2430_l4_core_hwmod,
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@ -1160,6 +1257,10 @@ static __initdata struct omap_hwmod *omap2430_hwmods[] = {
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&omap2430_mcspi1_hwmod,
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&omap2430_mcspi2_hwmod,
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&omap2430_mcspi3_hwmod,
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/* usbotg class*/
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&omap2430_usbhsotg_hwmod,
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NULL,
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};
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@ -29,6 +29,7 @@
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#include "prm-regbits-34xx.h"
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#include "cm-regbits-34xx.h"
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#include "wd_timer.h"
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#include <mach/am35xx.h>
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/*
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* OMAP3xxx hardware module integration data
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@ -60,6 +61,7 @@ static struct omap_hwmod omap34xx_mcspi1;
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static struct omap_hwmod omap34xx_mcspi2;
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static struct omap_hwmod omap34xx_mcspi3;
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static struct omap_hwmod omap34xx_mcspi4;
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static struct omap_hwmod am35xx_usbhsotg_hwmod;
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static struct omap_hwmod omap3xxx_dma_system_hwmod;
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@ -112,7 +114,23 @@ static struct omap_hwmod omap3xxx_uart1_hwmod;
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static struct omap_hwmod omap3xxx_uart2_hwmod;
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static struct omap_hwmod omap3xxx_uart3_hwmod;
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static struct omap_hwmod omap3xxx_uart4_hwmod;
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static struct omap_hwmod omap3xxx_usbhsotg_hwmod;
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/* l3_core -> usbhsotg interface */
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static struct omap_hwmod_ocp_if omap3xxx_usbhsotg__l3 = {
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.master = &omap3xxx_usbhsotg_hwmod,
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.slave = &omap3xxx_l3_main_hwmod,
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.clk = "core_l3_ick",
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.user = OCP_USER_MPU,
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};
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/* l3_core -> am35xx_usbhsotg interface */
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static struct omap_hwmod_ocp_if am35xx_usbhsotg__l3 = {
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.master = &am35xx_usbhsotg_hwmod,
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.slave = &omap3xxx_l3_main_hwmod,
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.clk = "core_l3_ick",
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.user = OCP_USER_MPU,
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};
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/* L4_CORE -> L4_WKUP interface */
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static struct omap_hwmod_ocp_if omap3xxx_l4_core__l4_wkup = {
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.master = &omap3xxx_l4_core_hwmod,
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@ -306,6 +324,61 @@ static struct omap_hwmod_ocp_if omap3_l4_core__sr2 = {
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.user = OCP_USER_MPU,
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};
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/*
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* usbhsotg interface data
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*/
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static struct omap_hwmod_addr_space omap3xxx_usbhsotg_addrs[] = {
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{
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.pa_start = OMAP34XX_HSUSB_OTG_BASE,
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.pa_end = OMAP34XX_HSUSB_OTG_BASE + SZ_4K - 1,
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.flags = ADDR_TYPE_RT
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},
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};
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/* l4_core -> usbhsotg */
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static struct omap_hwmod_ocp_if omap3xxx_l4_core__usbhsotg = {
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.master = &omap3xxx_l4_core_hwmod,
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.slave = &omap3xxx_usbhsotg_hwmod,
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.clk = "l4_ick",
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.addr = omap3xxx_usbhsotg_addrs,
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.addr_cnt = ARRAY_SIZE(omap3xxx_usbhsotg_addrs),
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.user = OCP_USER_MPU,
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};
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static struct omap_hwmod_ocp_if *omap3xxx_usbhsotg_masters[] = {
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&omap3xxx_usbhsotg__l3,
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};
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static struct omap_hwmod_ocp_if *omap3xxx_usbhsotg_slaves[] = {
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&omap3xxx_l4_core__usbhsotg,
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};
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static struct omap_hwmod_addr_space am35xx_usbhsotg_addrs[] = {
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{
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.pa_start = AM35XX_IPSS_USBOTGSS_BASE,
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.pa_end = AM35XX_IPSS_USBOTGSS_BASE + SZ_4K - 1,
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.flags = ADDR_TYPE_RT
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},
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};
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/* l4_core -> usbhsotg */
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static struct omap_hwmod_ocp_if am35xx_l4_core__usbhsotg = {
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.master = &omap3xxx_l4_core_hwmod,
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.slave = &am35xx_usbhsotg_hwmod,
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.clk = "l4_ick",
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.addr = am35xx_usbhsotg_addrs,
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.addr_cnt = ARRAY_SIZE(am35xx_usbhsotg_addrs),
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.user = OCP_USER_MPU,
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};
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static struct omap_hwmod_ocp_if *am35xx_usbhsotg_masters[] = {
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&am35xx_usbhsotg__l3,
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};
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static struct omap_hwmod_ocp_if *am35xx_usbhsotg_slaves[] = {
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&am35xx_l4_core__usbhsotg,
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};
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/* Slave interfaces on the L4_CORE interconnect */
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static struct omap_hwmod_ocp_if *omap3xxx_l4_core_slaves[] = {
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&omap3xxx_l3_main__l4_core,
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@ -1630,6 +1703,91 @@ static struct omap_hwmod omap34xx_mcspi4 = {
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.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430),
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};
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/*
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* usbhsotg
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*/
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static struct omap_hwmod_class_sysconfig omap3xxx_usbhsotg_sysc = {
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.rev_offs = 0x0400,
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.sysc_offs = 0x0404,
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.syss_offs = 0x0408,
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.sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE|
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SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
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SYSC_HAS_AUTOIDLE),
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.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
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MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
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.sysc_fields = &omap_hwmod_sysc_type1,
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};
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static struct omap_hwmod_class usbotg_class = {
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.name = "usbotg",
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.sysc = &omap3xxx_usbhsotg_sysc,
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};
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/* usb_otg_hs */
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static struct omap_hwmod_irq_info omap3xxx_usbhsotg_mpu_irqs[] = {
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{ .name = "mc", .irq = 92 },
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{ .name = "dma", .irq = 93 },
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};
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static struct omap_hwmod omap3xxx_usbhsotg_hwmod = {
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.name = "usb_otg_hs",
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.mpu_irqs = omap3xxx_usbhsotg_mpu_irqs,
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.mpu_irqs_cnt = ARRAY_SIZE(omap3xxx_usbhsotg_mpu_irqs),
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.main_clk = "hsotgusb_ick",
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.prcm = {
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.omap2 = {
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.prcm_reg_id = 1,
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.module_bit = OMAP3430_EN_HSOTGUSB_SHIFT,
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.module_offs = CORE_MOD,
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.idlest_reg_id = 1,
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.idlest_idle_bit = OMAP3430ES2_ST_HSOTGUSB_IDLE_SHIFT,
|
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.idlest_stdby_bit = OMAP3430ES2_ST_HSOTGUSB_STDBY_SHIFT
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},
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},
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.masters = omap3xxx_usbhsotg_masters,
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.masters_cnt = ARRAY_SIZE(omap3xxx_usbhsotg_masters),
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.slaves = omap3xxx_usbhsotg_slaves,
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.slaves_cnt = ARRAY_SIZE(omap3xxx_usbhsotg_slaves),
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||||
.class = &usbotg_class,
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||||
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||||
/*
|
||||
* Erratum ID: i479 idle_req / idle_ack mechanism potentially
|
||||
* broken when autoidle is enabled
|
||||
* workaround is to disable the autoidle bit at module level.
|
||||
*/
|
||||
.flags = HWMOD_NO_OCP_AUTOIDLE | HWMOD_SWSUP_SIDLE
|
||||
| HWMOD_SWSUP_MSTANDBY,
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430)
|
||||
};
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||||
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||||
/* usb_otg_hs */
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||||
static struct omap_hwmod_irq_info am35xx_usbhsotg_mpu_irqs[] = {
|
||||
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||||
{ .name = "mc", .irq = 71 },
|
||||
};
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||||
|
||||
static struct omap_hwmod_class am35xx_usbotg_class = {
|
||||
.name = "am35xx_usbotg",
|
||||
.sysc = NULL,
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||||
};
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||||
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||||
static struct omap_hwmod am35xx_usbhsotg_hwmod = {
|
||||
.name = "am35x_otg_hs",
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||||
.mpu_irqs = am35xx_usbhsotg_mpu_irqs,
|
||||
.mpu_irqs_cnt = ARRAY_SIZE(am35xx_usbhsotg_mpu_irqs),
|
||||
.main_clk = NULL,
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
},
|
||||
},
|
||||
.masters = am35xx_usbhsotg_masters,
|
||||
.masters_cnt = ARRAY_SIZE(am35xx_usbhsotg_masters),
|
||||
.slaves = am35xx_usbhsotg_slaves,
|
||||
.slaves_cnt = ARRAY_SIZE(am35xx_usbhsotg_slaves),
|
||||
.class = &am35xx_usbotg_class,
|
||||
.omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP3430ES3_1)
|
||||
};
|
||||
|
||||
static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
|
||||
&omap3xxx_l3_main_hwmod,
|
||||
&omap3xxx_l4_core_hwmod,
|
||||
|
@ -1667,6 +1825,13 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
|
|||
&omap34xx_mcspi2,
|
||||
&omap34xx_mcspi3,
|
||||
&omap34xx_mcspi4,
|
||||
|
||||
/* usbotg class */
|
||||
&omap3xxx_usbhsotg_hwmod,
|
||||
|
||||
/* usbotg for am35x */
|
||||
&am35xx_usbhsotg_hwmod,
|
||||
|
||||
NULL,
|
||||
};
|
||||
|
||||
|
|
|
@ -29,6 +29,7 @@
|
|||
#include <linux/usb.h>
|
||||
|
||||
#include <plat/usb.h>
|
||||
#include "control.h"
|
||||
|
||||
/* OMAP control module register for UTMI PHY */
|
||||
#define CONTROL_DEV_CONF 0x300
|
||||
|
@ -147,3 +148,95 @@ int omap4430_phy_exit(struct device *dev)
|
|||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void am35x_musb_reset(void)
|
||||
{
|
||||
u32 regval;
|
||||
|
||||
/* Reset the musb interface */
|
||||
regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);
|
||||
|
||||
regval |= AM35XX_USBOTGSS_SW_RST;
|
||||
omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET);
|
||||
|
||||
regval &= ~AM35XX_USBOTGSS_SW_RST;
|
||||
omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET);
|
||||
|
||||
regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);
|
||||
}
|
||||
|
||||
void am35x_musb_phy_power(u8 on)
|
||||
{
|
||||
unsigned long timeout = jiffies + msecs_to_jiffies(100);
|
||||
u32 devconf2;
|
||||
|
||||
if (on) {
|
||||
/*
|
||||
* Start the on-chip PHY and its PLL.
|
||||
*/
|
||||
devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2);
|
||||
|
||||
devconf2 &= ~(CONF2_RESET | CONF2_PHYPWRDN | CONF2_OTGPWRDN);
|
||||
devconf2 |= CONF2_PHY_PLLON;
|
||||
|
||||
omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);
|
||||
|
||||
pr_info(KERN_INFO "Waiting for PHY clock good...\n");
|
||||
while (!(omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2)
|
||||
& CONF2_PHYCLKGD)) {
|
||||
cpu_relax();
|
||||
|
||||
if (time_after(jiffies, timeout)) {
|
||||
pr_err(KERN_ERR "musb PHY clock good timed out\n");
|
||||
break;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
/*
|
||||
* Power down the on-chip PHY.
|
||||
*/
|
||||
devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2);
|
||||
|
||||
devconf2 &= ~CONF2_PHY_PLLON;
|
||||
devconf2 |= CONF2_PHYPWRDN | CONF2_OTGPWRDN;
|
||||
omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);
|
||||
}
|
||||
}
|
||||
|
||||
void am35x_musb_clear_irq(void)
|
||||
{
|
||||
u32 regval;
|
||||
|
||||
regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
|
||||
regval |= AM35XX_USBOTGSS_INT_CLR;
|
||||
omap_ctrl_writel(regval, AM35XX_CONTROL_LVL_INTR_CLEAR);
|
||||
regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
|
||||
}
|
||||
|
||||
void am35x_musb_set_mode(u8 musb_mode)
|
||||
{
|
||||
u32 devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2);
|
||||
|
||||
devconf2 &= ~CONF2_OTGMODE;
|
||||
switch (musb_mode) {
|
||||
#ifdef CONFIG_USB_MUSB_HDRC_HCD
|
||||
case MUSB_HOST: /* Force VBUS valid, ID = 0 */
|
||||
devconf2 |= CONF2_FORCE_HOST;
|
||||
break;
|
||||
#endif
|
||||
#ifdef CONFIG_USB_GADGET_MUSB_HDRC
|
||||
case MUSB_PERIPHERAL: /* Force VBUS valid, ID = 1 */
|
||||
devconf2 |= CONF2_FORCE_DEVICE;
|
||||
break;
|
||||
#endif
|
||||
#ifdef CONFIG_USB_MUSB_OTG
|
||||
case MUSB_OTG: /* Don't override the VBUS/ID comparators */
|
||||
devconf2 |= CONF2_NO_OVERRIDE;
|
||||
break;
|
||||
#endif
|
||||
default:
|
||||
pr_info(KERN_INFO "Unsupported mode %u\n", musb_mode);
|
||||
}
|
||||
|
||||
omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);
|
||||
}
|
||||
|
|
|
@ -30,118 +30,11 @@
|
|||
#include <mach/irqs.h>
|
||||
#include <mach/am35xx.h>
|
||||
#include <plat/usb.h>
|
||||
#include "control.h"
|
||||
#include <plat/omap_device.h>
|
||||
#include "mux.h"
|
||||
|
||||
#if defined(CONFIG_USB_MUSB_OMAP2PLUS) || defined (CONFIG_USB_MUSB_AM35X)
|
||||
|
||||
static void am35x_musb_reset(void)
|
||||
{
|
||||
u32 regval;
|
||||
|
||||
/* Reset the musb interface */
|
||||
regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);
|
||||
|
||||
regval |= AM35XX_USBOTGSS_SW_RST;
|
||||
omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET);
|
||||
|
||||
regval &= ~AM35XX_USBOTGSS_SW_RST;
|
||||
omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET);
|
||||
|
||||
regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET);
|
||||
}
|
||||
|
||||
static void am35x_musb_phy_power(u8 on)
|
||||
{
|
||||
unsigned long timeout = jiffies + msecs_to_jiffies(100);
|
||||
u32 devconf2;
|
||||
|
||||
if (on) {
|
||||
/*
|
||||
* Start the on-chip PHY and its PLL.
|
||||
*/
|
||||
devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2);
|
||||
|
||||
devconf2 &= ~(CONF2_RESET | CONF2_PHYPWRDN | CONF2_OTGPWRDN);
|
||||
devconf2 |= CONF2_PHY_PLLON;
|
||||
|
||||
omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);
|
||||
|
||||
pr_info(KERN_INFO "Waiting for PHY clock good...\n");
|
||||
while (!(omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2)
|
||||
& CONF2_PHYCLKGD)) {
|
||||
cpu_relax();
|
||||
|
||||
if (time_after(jiffies, timeout)) {
|
||||
pr_err(KERN_ERR "musb PHY clock good timed out\n");
|
||||
break;
|
||||
}
|
||||
}
|
||||
} else {
|
||||
/*
|
||||
* Power down the on-chip PHY.
|
||||
*/
|
||||
devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2);
|
||||
|
||||
devconf2 &= ~CONF2_PHY_PLLON;
|
||||
devconf2 |= CONF2_PHYPWRDN | CONF2_OTGPWRDN;
|
||||
omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);
|
||||
}
|
||||
}
|
||||
|
||||
static void am35x_musb_clear_irq(void)
|
||||
{
|
||||
u32 regval;
|
||||
|
||||
regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
|
||||
regval |= AM35XX_USBOTGSS_INT_CLR;
|
||||
omap_ctrl_writel(regval, AM35XX_CONTROL_LVL_INTR_CLEAR);
|
||||
regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR);
|
||||
}
|
||||
|
||||
static void am35x_musb_set_mode(u8 musb_mode)
|
||||
{
|
||||
u32 devconf2 = omap_ctrl_readl(AM35XX_CONTROL_DEVCONF2);
|
||||
|
||||
devconf2 &= ~CONF2_OTGMODE;
|
||||
switch (musb_mode) {
|
||||
#ifdef CONFIG_USB_MUSB_HDRC_HCD
|
||||
case MUSB_HOST: /* Force VBUS valid, ID = 0 */
|
||||
devconf2 |= CONF2_FORCE_HOST;
|
||||
break;
|
||||
#endif
|
||||
#ifdef CONFIG_USB_GADGET_MUSB_HDRC
|
||||
case MUSB_PERIPHERAL: /* Force VBUS valid, ID = 1 */
|
||||
devconf2 |= CONF2_FORCE_DEVICE;
|
||||
break;
|
||||
#endif
|
||||
#ifdef CONFIG_USB_MUSB_OTG
|
||||
case MUSB_OTG: /* Don't override the VBUS/ID comparators */
|
||||
devconf2 |= CONF2_NO_OVERRIDE;
|
||||
break;
|
||||
#endif
|
||||
default:
|
||||
pr_info(KERN_INFO "Unsupported mode %u\n", musb_mode);
|
||||
}
|
||||
|
||||
omap_ctrl_writel(devconf2, AM35XX_CONTROL_DEVCONF2);
|
||||
}
|
||||
|
||||
static struct resource musb_resources[] = {
|
||||
[0] = { /* start and end set dynamically */
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = { /* general IRQ */
|
||||
.start = INT_243X_HS_USB_MC,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
.name = "mc",
|
||||
},
|
||||
[2] = { /* DMA IRQ */
|
||||
.start = INT_243X_HS_USB_DMA,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
.name = "dma",
|
||||
},
|
||||
};
|
||||
|
||||
static struct musb_hdrc_config musb_config = {
|
||||
.multipoint = 1,
|
||||
.dyn_fifo = 1,
|
||||
|
@ -169,38 +62,65 @@ static struct musb_hdrc_platform_data musb_plat = {
|
|||
|
||||
static u64 musb_dmamask = DMA_BIT_MASK(32);
|
||||
|
||||
static struct platform_device musb_device = {
|
||||
.name = "musb-omap2430",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.dma_mask = &musb_dmamask,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
.platform_data = &musb_plat,
|
||||
static struct omap_device_pm_latency omap_musb_latency[] = {
|
||||
{
|
||||
.deactivate_func = omap_device_idle_hwmods,
|
||||
.activate_func = omap_device_enable_hwmods,
|
||||
.flags = OMAP_DEVICE_LATENCY_AUTO_ADJUST,
|
||||
},
|
||||
.num_resources = ARRAY_SIZE(musb_resources),
|
||||
.resource = musb_resources,
|
||||
};
|
||||
|
||||
static void usb_musb_mux_init(struct omap_musb_board_data *board_data)
|
||||
{
|
||||
switch (board_data->interface_type) {
|
||||
case MUSB_INTERFACE_UTMI:
|
||||
omap_mux_init_signal("usba0_otg_dp", OMAP_PIN_INPUT);
|
||||
omap_mux_init_signal("usba0_otg_dm", OMAP_PIN_INPUT);
|
||||
break;
|
||||
case MUSB_INTERFACE_ULPI:
|
||||
omap_mux_init_signal("usba0_ulpiphy_clk",
|
||||
OMAP_PIN_INPUT_PULLDOWN);
|
||||
omap_mux_init_signal("usba0_ulpiphy_stp",
|
||||
OMAP_PIN_INPUT_PULLDOWN);
|
||||
omap_mux_init_signal("usba0_ulpiphy_dir",
|
||||
OMAP_PIN_INPUT_PULLDOWN);
|
||||
omap_mux_init_signal("usba0_ulpiphy_nxt",
|
||||
OMAP_PIN_INPUT_PULLDOWN);
|
||||
omap_mux_init_signal("usba0_ulpiphy_dat0",
|
||||
OMAP_PIN_INPUT_PULLDOWN);
|
||||
omap_mux_init_signal("usba0_ulpiphy_dat1",
|
||||
OMAP_PIN_INPUT_PULLDOWN);
|
||||
omap_mux_init_signal("usba0_ulpiphy_dat2",
|
||||
OMAP_PIN_INPUT_PULLDOWN);
|
||||
omap_mux_init_signal("usba0_ulpiphy_dat3",
|
||||
OMAP_PIN_INPUT_PULLDOWN);
|
||||
omap_mux_init_signal("usba0_ulpiphy_dat4",
|
||||
OMAP_PIN_INPUT_PULLDOWN);
|
||||
omap_mux_init_signal("usba0_ulpiphy_dat5",
|
||||
OMAP_PIN_INPUT_PULLDOWN);
|
||||
omap_mux_init_signal("usba0_ulpiphy_dat6",
|
||||
OMAP_PIN_INPUT_PULLDOWN);
|
||||
omap_mux_init_signal("usba0_ulpiphy_dat7",
|
||||
OMAP_PIN_INPUT_PULLDOWN);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
void __init usb_musb_init(struct omap_musb_board_data *board_data)
|
||||
{
|
||||
if (cpu_is_omap243x()) {
|
||||
musb_resources[0].start = OMAP243X_HS_BASE;
|
||||
} else if (cpu_is_omap3517() || cpu_is_omap3505()) {
|
||||
musb_device.name = "musb-am35x";
|
||||
musb_resources[0].start = AM35XX_IPSS_USBOTGSS_BASE;
|
||||
musb_resources[1].start = INT_35XX_USBOTG_IRQ;
|
||||
board_data->set_phy_power = am35x_musb_phy_power;
|
||||
board_data->clear_irq = am35x_musb_clear_irq;
|
||||
board_data->set_mode = am35x_musb_set_mode;
|
||||
board_data->reset = am35x_musb_reset;
|
||||
} else if (cpu_is_omap34xx()) {
|
||||
musb_resources[0].start = OMAP34XX_HSUSB_OTG_BASE;
|
||||
struct omap_hwmod *oh;
|
||||
struct omap_device *od;
|
||||
struct platform_device *pdev;
|
||||
struct device *dev;
|
||||
int bus_id = -1;
|
||||
const char *oh_name, *name;
|
||||
|
||||
if (cpu_is_omap3517() || cpu_is_omap3505()) {
|
||||
} else if (cpu_is_omap44xx()) {
|
||||
musb_resources[0].start = OMAP44XX_HSUSB_OTG_BASE;
|
||||
musb_resources[1].start = OMAP44XX_IRQ_HS_USB_MC_N;
|
||||
musb_resources[2].start = OMAP44XX_IRQ_HS_USB_DMA_N;
|
||||
usb_musb_mux_init(board_data);
|
||||
}
|
||||
musb_resources[0].end = musb_resources[0].start + SZ_4K - 1;
|
||||
|
||||
/*
|
||||
* REVISIT: This line can be removed once all the platforms using
|
||||
|
@ -212,8 +132,35 @@ void __init usb_musb_init(struct omap_musb_board_data *board_data)
|
|||
musb_plat.mode = board_data->mode;
|
||||
musb_plat.extvbus = board_data->extvbus;
|
||||
|
||||
if (platform_device_register(&musb_device) < 0)
|
||||
printk(KERN_ERR "Unable to register HS-USB (MUSB) device\n");
|
||||
if (cpu_is_omap3517() || cpu_is_omap3505()) {
|
||||
oh_name = "am35x_otg_hs";
|
||||
name = "musb-am35x";
|
||||
} else {
|
||||
oh_name = "usb_otg_hs";
|
||||
name = "musb-omap2430";
|
||||
}
|
||||
|
||||
oh = omap_hwmod_lookup(oh_name);
|
||||
if (!oh) {
|
||||
pr_err("Could not look up %s\n", oh_name);
|
||||
return;
|
||||
}
|
||||
|
||||
od = omap_device_build(name, bus_id, oh, &musb_plat,
|
||||
sizeof(musb_plat), omap_musb_latency,
|
||||
ARRAY_SIZE(omap_musb_latency), false);
|
||||
if (IS_ERR(od)) {
|
||||
pr_err("Could not build omap_device for %s %s\n",
|
||||
name, oh_name);
|
||||
return;
|
||||
}
|
||||
|
||||
pdev = &od->pdev;
|
||||
dev = &pdev->dev;
|
||||
get_device(dev);
|
||||
dev->dma_mask = &musb_dmamask;
|
||||
dev->coherent_dma_mask = musb_dmamask;
|
||||
put_device(dev);
|
||||
}
|
||||
|
||||
#else
|
||||
|
|
|
@ -91,6 +91,10 @@ extern int omap4430_phy_exit(struct device *dev);
|
|||
|
||||
#endif
|
||||
|
||||
extern void am35x_musb_reset(void);
|
||||
extern void am35x_musb_phy_power(u8 on);
|
||||
extern void am35x_musb_clear_irq(void);
|
||||
extern void am35x_musb_set_mode(u8 musb_mode);
|
||||
|
||||
/*
|
||||
* FIXME correct answer depends on hmc_mode,
|
||||
|
|
Загрузка…
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