mtd: nand: drop edb7312 support
EDB7312 isn't supported by mainline kernel, so drop it now. If the board support will ever be submitted to mainline, one can revert this commit. Signed-off-by: Dmitry Eremin-Solenikov <dbaryshkov@gmail.com> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com>
This commit is contained in:
Dmitry Eremin-Solenikov
Artem Bityutskiy
Родитель
ed764db288
Коммит
050f012583
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@ -83,13 +83,6 @@ config MTD_NAND_DENALI_SCRATCH_REG_ADDR
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scratch register here to enable this feature. On Intel Moorestown
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boards, the scratch register is at 0xFF108018.
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config MTD_NAND_EDB7312
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tristate "Support for Cirrus Logic EBD7312 evaluation board"
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depends on ARCH_EDB7312
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help
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This enables the driver for the Cirrus Logic EBD7312 evaluation
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board to access the onboard NAND Flash.
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config MTD_NAND_H1900
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tristate "iPAQ H1900 flash"
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depends on ARCH_PXA
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@ -13,7 +13,6 @@ obj-$(CONFIG_MTD_NAND_SPIA) += spia.o
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obj-$(CONFIG_MTD_NAND_AMS_DELTA) += ams-delta.o
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obj-$(CONFIG_MTD_NAND_AUTCPU12) += autcpu12.o
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obj-$(CONFIG_MTD_NAND_DENALI) += denali.o
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obj-$(CONFIG_MTD_NAND_EDB7312) += edb7312.o
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obj-$(CONFIG_MTD_NAND_AU1550) += au1550nd.o
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obj-$(CONFIG_MTD_NAND_BF5XX) += bf5xx_nand.o
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obj-$(CONFIG_MTD_NAND_PPCHAMELEONEVB) += ppchameleonevb.o
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@ -1,188 +0,0 @@
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/*
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* drivers/mtd/nand/edb7312.c
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*
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* Copyright (C) 2002 Marius Gröger (mag@sysgo.de)
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*
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* Derived from drivers/mtd/nand/autcpu12.c
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* Copyright (c) 2001 Thomas Gleixner (gleixner@autronix.de)
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Overview:
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* This is a device driver for the NAND flash device found on the
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* CLEP7312 board which utilizes the Toshiba TC58V64AFT part. This is
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* a 64Mibit (8MiB x 8 bits) NAND flash device.
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*/
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#include <linux/slab.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/nand.h>
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#include <linux/mtd/partitions.h>
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#include <asm/io.h>
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#include <mach/hardware.h> /* for CLPS7111_VIRT_BASE */
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#include <asm/sizes.h>
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#include <asm/hardware/clps7111.h>
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/*
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* MTD structure for EDB7312 board
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*/
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static struct mtd_info *ep7312_mtd = NULL;
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/*
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* Values specific to the EDB7312 board (used with EP7312 processor)
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*/
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#define EP7312_FIO_PBASE 0x10000000 /* Phys address of flash */
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#define EP7312_PXDR 0x0001 /*
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* IO offset to Port B data register
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* where the CLE, ALE and NCE pins
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* are wired to.
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*/
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#define EP7312_PXDDR 0x0041 /*
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* IO offset to Port B data direction
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* register so we can control the IO
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* lines.
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*/
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/*
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* Module stuff
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*/
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static unsigned long ep7312_fio_pbase = EP7312_FIO_PBASE;
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static void __iomem *ep7312_pxdr = (void __iomem *)EP7312_PXDR;
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static void __iomem *ep7312_pxddr = (void __iomem *)EP7312_PXDDR;
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/*
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* Define static partitions for flash device
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*/
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static struct mtd_partition partition_info[] = {
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{.name = "EP7312 Nand Flash",
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.offset = 0,
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.size = 8 * 1024 * 1024}
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};
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#define NUM_PARTITIONS 1
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/*
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* hardware specific access to control-lines
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*
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* NAND_NCE: bit 0 -> bit 6 (bit 7 = 1)
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* NAND_CLE: bit 1 -> bit 4
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* NAND_ALE: bit 2 -> bit 5
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*/
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static void ep7312_hwcontrol(struct mtd_info *mtd, int cmd, unsigned int ctrl)
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{
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struct nand_chip *chip = mtd->priv;
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if (ctrl & NAND_CTRL_CHANGE) {
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unsigned char bits = 0x80;
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bits |= (ctrl & (NAND_CLE | NAND_ALE)) << 3;
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bits |= (ctrl & NAND_NCE) ? 0x00 : 0x40;
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clps_writeb((clps_readb(ep7312_pxdr) & 0xF0) | bits,
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ep7312_pxdr);
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}
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if (cmd != NAND_CMD_NONE)
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writeb(cmd, chip->IO_ADDR_W);
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}
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/*
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* read device ready pin
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*/
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static int ep7312_device_ready(struct mtd_info *mtd)
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{
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return 1;
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}
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/*
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* Main initialization routine
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*/
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static int __init ep7312_init(void)
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{
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struct nand_chip *this;
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void __iomem *ep7312_fio_base;
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/* Allocate memory for MTD device structure and private data */
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ep7312_mtd = kmalloc(sizeof(struct mtd_info) + sizeof(struct nand_chip), GFP_KERNEL);
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if (!ep7312_mtd) {
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printk("Unable to allocate EDB7312 NAND MTD device structure.\n");
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return -ENOMEM;
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}
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/* map physical address */
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ep7312_fio_base = ioremap(ep7312_fio_pbase, SZ_1K);
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if (!ep7312_fio_base) {
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printk("ioremap EDB7312 NAND flash failed\n");
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kfree(ep7312_mtd);
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return -EIO;
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}
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/* Get pointer to private data */
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this = (struct nand_chip *)(&ep7312_mtd[1]);
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/* Initialize structures */
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memset(ep7312_mtd, 0, sizeof(struct mtd_info));
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memset(this, 0, sizeof(struct nand_chip));
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/* Link the private data with the MTD structure */
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ep7312_mtd->priv = this;
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ep7312_mtd->owner = THIS_MODULE;
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/*
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* Set GPIO Port B control register so that the pins are configured
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* to be outputs for controlling the NAND flash.
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*/
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clps_writeb(0xf0, ep7312_pxddr);
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/* insert callbacks */
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this->IO_ADDR_R = ep7312_fio_base;
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this->IO_ADDR_W = ep7312_fio_base;
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this->cmd_ctrl = ep7312_hwcontrol;
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this->dev_ready = ep7312_device_ready;
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/* 15 us command delay time */
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this->chip_delay = 15;
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/* Scan to find existence of the device */
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if (nand_scan(ep7312_mtd, 1)) {
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iounmap((void *)ep7312_fio_base);
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kfree(ep7312_mtd);
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return -ENXIO;
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}
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ep7312_mtd->name = "edb7312-nand";
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/* Register the partitions */
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mtd_device_register(ep7312_mtd, NULL, 0,
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partition_info, NUM_PARTITIONS);
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/* Return happy */
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return 0;
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}
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module_init(ep7312_init);
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/*
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* Clean up routine
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*/
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static void __exit ep7312_cleanup(void)
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{
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struct nand_chip *this = (struct nand_chip *)&ep7312_mtd[1];
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/* Release resources, unregister device */
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nand_release(ap7312_mtd);
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/* Release io resource */
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iounmap(this->IO_ADDR_R);
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/* Free the MTD device structure */
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kfree(ep7312_mtd);
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}
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module_exit(ep7312_cleanup);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Marius Groeger <mag@sysgo.de>");
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MODULE_DESCRIPTION("MTD map driver for Cogent EDB7312 board");
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