ARC updates for 5.5-rc1
- Jump Label support for ARC - kmemleak enabled - arc mm backend TLB Miss / flush optimizations - nSIM platform switching to dwuart (vs. arcuart) and ensuing defconfig updates and cleanups - axs platform pll / video-mode updates -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEOXpuCuR6hedrdLCJadfx3eKKwl4FAl3oOlcACgkQadfx3eKK wl4HZBAAoE2crAUVCNN+5WweCbkW0UDB69AVcxjRWuL/3y4Va0rfyJyNDjc4g8+p QUG8RN2+Pdq3Z7zH0dW5JxRuEWNR5QxKF+KJtaFuEXzLG/XgiMonWBKRocP/SDf9 oBAe+4beYabhAMc4Kz6SnwbHtFxUCUrRAP5CxlrhW7FF1oK4f5qQ0D8vt3NlgNDJ mfBZrsmVUkyiPs19x3uFylgZk4xglw2sV3p8RH+g+40YV+WiG1Xh31ViET4MNctv dYuF+EgErtuKHIIknpAbRjCwGSj0Q53L/6HNRoJpTnVKBlqrtLuc5LorG9UeIH6g pZJAGAt4GuYaarXX2wPeb69sA+GfVHMVbcZKBCm5UdxpiR3Q+fGk/1aWsb97HZW3 2uUVq8mEaltXhJDU+Mmym8rfpECvZ8JL3nEJ5r9eTQH+1DhAa7FdRIAW+oO4N4xE KahVYzICInrykkn6gFOAA04cr4L3asZ16MHwn02C47FKoUjoM7PVWoVbIz32Dc8P 7ErMP9TWLc51+ko5hiTxHHRWozpwHCxQavcopgRlZLO3iX1MkmFtYyork8t0Oior 8jSCwcGBm9XCBMkGznhvVcPQOGMB6/9hhHhgNBPcp5bjMz8GoeZx+dFnW7cKzj4D TgsfgqpGzvAF4QWHhmx/f32+Yw5/UTJUzjmXguFKgEJidqIDKIc= =DK3r -----END PGP SIGNATURE----- Merge tag 'arc-5.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc Pull ARC updates from Vineet Gupta - Jump Label support for ARC - kmemleak enabled - arc mm backend TLB Miss / flush optimizations - nSIM platform switching to dwuart (vs. arcuart) and ensuing defconfig updates and cleanups - axs platform pll / video-mode updates * tag 'arc-5.5-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc: ARC: add kmemleak support ARC: [plat-axs10x]: remove hardcoded video mode from bootargs ARC: [plat-axs10x]: use pgu pll instead of fixed clock ARC: ARCv2: jump label: implement jump label patching ARC: mm: tlb flush optim: elide redundant uTLB invalidates for MMUv3 ARC: mm: tlb flush optim: elide repeated uTLB invalidate in loop ARC: mm: tlb flush optim: Make TLBWriteNI fallback to TLBWrite if not available ARC: mm: TLB Miss optim: avoid re-reading ECR ARCv2: mm: TLB Miss optim: Use double world load/stores LDD/STD ARCv2: mm: TLB Miss optim: SMP builds can cache pgd pointer in mmu scratch reg ARC: nSIM_700: remove unused network options ARC: nSIM_700: switch to DW UART usage ARC: merge HAPS-HS with nSIM-HS configs ARC: HAPS: cleanup defconfigs from unused ETH drivers ARC: HAPS: add HIGHMEM memory zone to DTS ARC: HAPS: use same UART configuration everywhere ARC: HAPS: cleanup defconfigs from unused IO-related options ARC: regenerate nSIM and HAPS defconfigs
This commit is contained in:
Коммит
056df578c2
|
@ -29,6 +29,7 @@ config ARC
|
|||
select HAVE_ARCH_KGDB
|
||||
select HAVE_ARCH_TRACEHOOK
|
||||
select HAVE_DEBUG_STACKOVERFLOW
|
||||
select HAVE_DEBUG_KMEMLEAK
|
||||
select HAVE_FUTEX_CMPXCHG if FUTEX
|
||||
select HAVE_IOREMAP_PROT
|
||||
select HAVE_KERNEL_GZIP
|
||||
|
@ -45,6 +46,7 @@ config ARC
|
|||
select OF_EARLY_FLATTREE
|
||||
select PCI_SYSCALL if PCI
|
||||
select PERF_USE_VMALLOC if ARC_CACHE_VIPT_ALIASING
|
||||
select HAVE_ARCH_JUMP_LABEL if ISA_ARCV2 && !CPU_ENDIAN_BE32
|
||||
|
||||
config ARCH_HAS_CACHE_LINE_SIZE
|
||||
def_bool y
|
||||
|
@ -524,6 +526,13 @@ config ARC_DW2_UNWIND
|
|||
config ARC_DBG_TLB_PARANOIA
|
||||
bool "Paranoia Checks in Low Level TLB Handlers"
|
||||
|
||||
config ARC_DBG_JUMP_LABEL
|
||||
bool "Paranoid checks in Static Keys (jump labels) code"
|
||||
depends on JUMP_LABEL
|
||||
default y if STATIC_KEYS_SELFTEST
|
||||
help
|
||||
Enable paranoid checks and self-test of both ARC-specific and generic
|
||||
part of static keys (jump labels) related code.
|
||||
endif
|
||||
|
||||
config ARC_BUILTIN_DTB_NAME
|
||||
|
|
|
@ -3,7 +3,7 @@
|
|||
# Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
|
||||
#
|
||||
|
||||
KBUILD_DEFCONFIG := nsim_hs_defconfig
|
||||
KBUILD_DEFCONFIG := haps_hs_smp_defconfig
|
||||
|
||||
ifeq ($(CROSS_COMPILE),)
|
||||
CROSS_COMPILE := $(call cc-cross-prefix, arc-linux- arceb-linux-)
|
||||
|
|
|
@ -28,6 +28,12 @@
|
|||
clock-frequency = <750000000>;
|
||||
};
|
||||
|
||||
input_clk: input-clk {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <33333333>;
|
||||
};
|
||||
|
||||
core_intc: arc700-intc@cpu {
|
||||
compatible = "snps,arc700-intc";
|
||||
interrupt-controller;
|
||||
|
|
|
@ -14,6 +14,6 @@
|
|||
compatible = "snps,axs101", "snps,arc-sdp";
|
||||
|
||||
chosen {
|
||||
bootargs = "earlycon=uart8250,mmio32,0xe0022000,115200n8 console=tty0 console=ttyS3,115200n8 consoleblank=0 video=1280x720@60 print-fatal-signals=1";
|
||||
bootargs = "earlycon=uart8250,mmio32,0xe0022000,115200n8 console=tty0 console=ttyS3,115200n8 consoleblank=0 print-fatal-signals=1";
|
||||
};
|
||||
};
|
||||
|
|
|
@ -17,6 +17,6 @@
|
|||
compatible = "snps,axs103", "snps,arc-sdp";
|
||||
|
||||
chosen {
|
||||
bootargs = "earlycon=uart8250,mmio32,0xe0022000,115200n8 console=tty0 console=ttyS3,115200n8 print-fatal-signals=1 consoleblank=0 video=1280x720@60";
|
||||
bootargs = "earlycon=uart8250,mmio32,0xe0022000,115200n8 console=tty0 console=ttyS3,115200n8 print-fatal-signals=1 consoleblank=0";
|
||||
};
|
||||
};
|
||||
|
|
|
@ -61,12 +61,13 @@
|
|||
clock-frequency = <25000000>;
|
||||
#clock-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
pguclk: pguclk {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <74250000>;
|
||||
};
|
||||
pguclk: pguclk@10080 {
|
||||
compatible = "snps,axs10x-pgu-pll-clock";
|
||||
reg = <0x10080 0x10>, <0x110 0x10>;
|
||||
#clock-cells = <0>;
|
||||
clocks = <&input_clk>;
|
||||
};
|
||||
|
||||
gmac: ethernet@18000 {
|
||||
|
|
|
@ -9,13 +9,15 @@
|
|||
/ {
|
||||
model = "snps,zebu_hs";
|
||||
compatible = "snps,zebu_hs";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
interrupt-parent = <&core_intc>;
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x80000000 0x20000000>; /* 512 */
|
||||
/* CONFIG_LINUX_RAM_BASE needs to match low mem start */
|
||||
reg = <0x0 0x80000000 0x0 0x20000000 /* 512 MB low mem */
|
||||
0x1 0x00000000 0x0 0x40000000>; /* 1 GB highmem */
|
||||
};
|
||||
|
||||
chosen {
|
||||
|
@ -31,8 +33,9 @@
|
|||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
/* child and parent address space 1:1 mapped */
|
||||
ranges;
|
||||
/* only perip space at end of low mem accessible
|
||||
bus addr, parent bus addr, size */
|
||||
ranges = <0x80000000 0x0 0x80000000 0x80000000>;
|
||||
|
||||
core_clk: core_clk {
|
||||
#clock-cells = <0>;
|
||||
|
@ -47,7 +50,7 @@
|
|||
};
|
||||
|
||||
uart0: serial@f0000000 {
|
||||
compatible = "ns8250";
|
||||
compatible = "ns16550a";
|
||||
reg = <0xf0000000 0x2000>;
|
||||
interrupts = <24>;
|
||||
clock-frequency = <50000000>;
|
||||
|
|
|
@ -54,7 +54,6 @@
|
|||
};
|
||||
|
||||
uart0: serial@f0000000 {
|
||||
/* compatible = "ns8250"; Doesn't use FIFOs */
|
||||
compatible = "ns16550a";
|
||||
reg = <0xf0000000 0x2000>;
|
||||
interrupt-parent = <&idu_intc>;
|
||||
|
|
|
@ -14,11 +14,11 @@
|
|||
interrupt-parent = <&core_intc>;
|
||||
|
||||
chosen {
|
||||
bootargs = "earlycon=arc_uart,mmio32,0xc0fc1000,115200n8 console=ttyARC0,115200n8 print-fatal-signals=1";
|
||||
bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=ttyS0,115200n8 print-fatal-signals=1";
|
||||
};
|
||||
|
||||
aliases {
|
||||
serial0 = &arcuart0;
|
||||
serial0 = &uart0;
|
||||
};
|
||||
|
||||
fpga {
|
||||
|
@ -41,29 +41,15 @@
|
|||
#interrupt-cells = <1>;
|
||||
};
|
||||
|
||||
arcuart0: serial@c0fc1000 {
|
||||
compatible = "snps,arc-uart";
|
||||
reg = <0xc0fc1000 0x100>;
|
||||
interrupts = <5>;
|
||||
clock-frequency = <80000000>;
|
||||
current-speed = <115200>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ethernet@c0fc2000 {
|
||||
compatible = "snps,arc-emac";
|
||||
reg = <0xc0fc2000 0x3c>;
|
||||
interrupts = <6>;
|
||||
mac-address = [ 00 11 22 33 44 55 ];
|
||||
clock-frequency = <80000000>;
|
||||
max-speed = <100>;
|
||||
phy = <&phy0>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
phy0: ethernet-phy@0 {
|
||||
reg = <1>;
|
||||
};
|
||||
uart0: serial@f0000000 {
|
||||
compatible = "ns16550a";
|
||||
reg = <0xf0000000 0x2000>;
|
||||
interrupts = <24>;
|
||||
clock-frequency = <50000000>;
|
||||
baud = <115200>;
|
||||
reg-shift = <2>;
|
||||
reg-io-width = <4>;
|
||||
no-loopback-test = <1>;
|
||||
};
|
||||
|
||||
arcpct0: pct {
|
||||
|
|
|
@ -1,67 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-only
|
||||
/*
|
||||
* Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)
|
||||
*/
|
||||
/dts-v1/;
|
||||
|
||||
/include/ "skeleton_hs.dtsi"
|
||||
|
||||
/ {
|
||||
model = "snps,nsim_hs";
|
||||
compatible = "snps,nsim_hs";
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
interrupt-parent = <&core_intc>;
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
/* CONFIG_LINUX_RAM_BASE needs to match low mem start */
|
||||
reg = <0x0 0x80000000 0x0 0x20000000 /* 512 MB low mem */
|
||||
0x1 0x00000000 0x0 0x40000000>; /* 1 GB highmem */
|
||||
};
|
||||
|
||||
chosen {
|
||||
bootargs = "earlycon=arc_uart,mmio32,0xc0fc1000,115200n8 console=ttyARC0,115200n8 print-fatal-signals=1";
|
||||
};
|
||||
|
||||
aliases {
|
||||
serial0 = &arcuart0;
|
||||
};
|
||||
|
||||
fpga {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
/* only perip space at end of low mem accessible
|
||||
bus addr, parent bus addr, size */
|
||||
ranges = <0x80000000 0x0 0x80000000 0x80000000>;
|
||||
|
||||
core_clk: core_clk {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <80000000>;
|
||||
};
|
||||
|
||||
core_intc: core-interrupt-controller {
|
||||
compatible = "snps,archs-intc";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
|
||||
arcuart0: serial@c0fc1000 {
|
||||
compatible = "snps,arc-uart";
|
||||
reg = <0xc0fc1000 0x100>;
|
||||
interrupts = <24>;
|
||||
clock-frequency = <80000000>;
|
||||
current-speed = <115200>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
arcpct0: pct {
|
||||
compatible = "snps,archs-pct";
|
||||
#interrupt-cells = <1>;
|
||||
interrupts = <20>;
|
||||
};
|
||||
};
|
||||
};
|
|
@ -1,65 +0,0 @@
|
|||
// SPDX-License-Identifier: GPL-2.0-only
|
||||
/*
|
||||
* Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)
|
||||
*/
|
||||
/dts-v1/;
|
||||
|
||||
/include/ "skeleton_hs_idu.dtsi"
|
||||
|
||||
/ {
|
||||
model = "snps,nsim_hs-smp";
|
||||
compatible = "snps,nsim_hs";
|
||||
interrupt-parent = <&core_intc>;
|
||||
|
||||
chosen {
|
||||
bootargs = "earlycon=arc_uart,mmio32,0xc0fc1000,115200n8 console=ttyARC0,115200n8 print-fatal-signals=1";
|
||||
};
|
||||
|
||||
aliases {
|
||||
serial0 = &arcuart0;
|
||||
};
|
||||
|
||||
fpga {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
/* child and parent address space 1:1 mapped */
|
||||
ranges;
|
||||
|
||||
core_clk: core_clk {
|
||||
#clock-cells = <0>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <80000000>;
|
||||
};
|
||||
|
||||
core_intc: core-interrupt-controller {
|
||||
compatible = "snps,archs-intc";
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
|
||||
idu_intc: idu-interrupt-controller {
|
||||
compatible = "snps,archs-idu-intc";
|
||||
interrupt-controller;
|
||||
interrupt-parent = <&core_intc>;
|
||||
#interrupt-cells = <1>;
|
||||
};
|
||||
|
||||
arcuart0: serial@c0fc1000 {
|
||||
compatible = "snps,arc-uart";
|
||||
reg = <0xc0fc1000 0x100>;
|
||||
interrupt-parent = <&idu_intc>;
|
||||
interrupts = <0>;
|
||||
clock-frequency = <80000000>;
|
||||
current-speed = <115200>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
arcpct0: pct {
|
||||
compatible = "snps,archs-pct";
|
||||
#interrupt-cells = <1>;
|
||||
interrupts = <20>;
|
||||
};
|
||||
};
|
||||
};
|
|
@ -4,6 +4,7 @@ CONFIG_POSIX_MQUEUE=y
|
|||
# CONFIG_CROSS_MEMORY_ATTACH is not set
|
||||
CONFIG_NO_HZ_IDLE=y
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_PREEMPT=y
|
||||
CONFIG_IKCONFIG=y
|
||||
CONFIG_IKCONFIG_PROC=y
|
||||
CONFIG_NAMESPACES=y
|
||||
|
@ -15,13 +16,9 @@ CONFIG_EXPERT=y
|
|||
CONFIG_PERF_EVENTS=y
|
||||
# CONFIG_COMPAT_BRK is not set
|
||||
CONFIG_SLAB=y
|
||||
CONFIG_ARC_BUILTIN_DTB_NAME="haps_hs"
|
||||
CONFIG_MODULES=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
# CONFIG_IOSCHED_DEADLINE is not set
|
||||
# CONFIG_IOSCHED_CFQ is not set
|
||||
CONFIG_ISA_ARCV2=y
|
||||
CONFIG_ARC_BUILTIN_DTB_NAME="haps_hs"
|
||||
CONFIG_PREEMPT=y
|
||||
# CONFIG_COMPACTION is not set
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
|
@ -30,9 +27,6 @@ CONFIG_UNIX=y
|
|||
CONFIG_UNIX_DIAG=y
|
||||
CONFIG_NET_KEY=y
|
||||
CONFIG_INET=y
|
||||
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
|
||||
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
|
||||
# CONFIG_INET_XFRM_MODE_BEET is not set
|
||||
# CONFIG_IPV6 is not set
|
||||
# CONFIG_WIRELESS is not set
|
||||
CONFIG_DEVTMPFS=y
|
||||
|
@ -42,21 +36,12 @@ CONFIG_DEVTMPFS_MOUNT=y
|
|||
CONFIG_VIRTIO_BLK=y
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_VIRTIO_NET=y
|
||||
# CONFIG_NET_VENDOR_ARC is not set
|
||||
# CONFIG_NET_VENDOR_BROADCOM is not set
|
||||
# CONFIG_NET_VENDOR_INTEL is not set
|
||||
# CONFIG_NET_VENDOR_MARVELL is not set
|
||||
# CONFIG_NET_VENDOR_MICREL is not set
|
||||
# CONFIG_NET_VENDOR_NATSEMI is not set
|
||||
# CONFIG_NET_VENDOR_SEEQ is not set
|
||||
# CONFIG_NET_VENDOR_STMICRO is not set
|
||||
# CONFIG_NET_VENDOR_VIA is not set
|
||||
# CONFIG_NET_VENDOR_WIZNET is not set
|
||||
# CONFIG_ETHERNET is not set
|
||||
# CONFIG_WLAN is not set
|
||||
CONFIG_INPUT_EVDEV=y
|
||||
CONFIG_MOUSE_PS2_TOUCHKIT=y
|
||||
# CONFIG_SERIO_SERPORT is not set
|
||||
CONFIG_SERIO_ARC_PS2=y
|
||||
# CONFIG_INPUT_KEYBOARD is not set
|
||||
# CONFIG_INPUT_MOUSE is not set
|
||||
# CONFIG_SERIO is not set
|
||||
# CONFIG_LEGACY_PTYS is not set
|
||||
CONFIG_SERIAL_8250=y
|
||||
CONFIG_SERIAL_8250_CONSOLE=y
|
||||
|
@ -66,9 +51,6 @@ CONFIG_SERIAL_8250_DW=y
|
|||
CONFIG_SERIAL_OF_PLATFORM=y
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
# CONFIG_HWMON is not set
|
||||
CONFIG_FB=y
|
||||
CONFIG_FRAMEBUFFER_CONSOLE=y
|
||||
CONFIG_LOGO=y
|
||||
# CONFIG_HID is not set
|
||||
# CONFIG_USB_SUPPORT is not set
|
||||
CONFIG_VIRTIO_MMIO=y
|
||||
|
|
|
@ -4,6 +4,7 @@ CONFIG_POSIX_MQUEUE=y
|
|||
# CONFIG_CROSS_MEMORY_ATTACH is not set
|
||||
CONFIG_NO_HZ_IDLE=y
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_PREEMPT=y
|
||||
CONFIG_IKCONFIG=y
|
||||
CONFIG_IKCONFIG_PROC=y
|
||||
CONFIG_NAMESPACES=y
|
||||
|
@ -16,15 +17,11 @@ CONFIG_PERF_EVENTS=y
|
|||
# CONFIG_VM_EVENT_COUNTERS is not set
|
||||
# CONFIG_COMPAT_BRK is not set
|
||||
CONFIG_SLAB=y
|
||||
CONFIG_SMP=y
|
||||
CONFIG_ARC_BUILTIN_DTB_NAME="haps_hs_idu"
|
||||
CONFIG_KPROBES=y
|
||||
CONFIG_MODULES=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
# CONFIG_IOSCHED_DEADLINE is not set
|
||||
# CONFIG_IOSCHED_CFQ is not set
|
||||
CONFIG_ISA_ARCV2=y
|
||||
CONFIG_SMP=y
|
||||
CONFIG_ARC_BUILTIN_DTB_NAME="haps_hs_idu"
|
||||
CONFIG_PREEMPT=y
|
||||
# CONFIG_COMPACTION is not set
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
|
@ -33,9 +30,6 @@ CONFIG_UNIX=y
|
|||
CONFIG_UNIX_DIAG=y
|
||||
CONFIG_NET_KEY=y
|
||||
CONFIG_INET=y
|
||||
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
|
||||
# CONFIG_INET_XFRM_MODE_TUNNEL is not set
|
||||
# CONFIG_INET_XFRM_MODE_BEET is not set
|
||||
# CONFIG_IPV6 is not set
|
||||
# CONFIG_WIRELESS is not set
|
||||
CONFIG_DEVTMPFS=y
|
||||
|
@ -43,21 +37,12 @@ CONFIG_DEVTMPFS=y
|
|||
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
|
||||
# CONFIG_BLK_DEV is not set
|
||||
CONFIG_NETDEVICES=y
|
||||
# CONFIG_NET_VENDOR_ARC is not set
|
||||
# CONFIG_NET_VENDOR_BROADCOM is not set
|
||||
# CONFIG_NET_VENDOR_INTEL is not set
|
||||
# CONFIG_NET_VENDOR_MARVELL is not set
|
||||
# CONFIG_NET_VENDOR_MICREL is not set
|
||||
# CONFIG_NET_VENDOR_NATSEMI is not set
|
||||
# CONFIG_NET_VENDOR_SEEQ is not set
|
||||
# CONFIG_NET_VENDOR_STMICRO is not set
|
||||
# CONFIG_NET_VENDOR_VIA is not set
|
||||
# CONFIG_NET_VENDOR_WIZNET is not set
|
||||
# CONFIG_ETHERNET is not set
|
||||
# CONFIG_WLAN is not set
|
||||
CONFIG_INPUT_EVDEV=y
|
||||
CONFIG_MOUSE_PS2_TOUCHKIT=y
|
||||
# CONFIG_SERIO_SERPORT is not set
|
||||
CONFIG_SERIO_ARC_PS2=y
|
||||
# CONFIG_INPUT_KEYBOARD is not set
|
||||
# CONFIG_INPUT_MOUSE is not set
|
||||
# CONFIG_SERIO is not set
|
||||
# CONFIG_LEGACY_PTYS is not set
|
||||
CONFIG_SERIAL_8250=y
|
||||
CONFIG_SERIAL_8250_CONSOLE=y
|
||||
|
@ -67,9 +52,6 @@ CONFIG_SERIAL_8250_DW=y
|
|||
CONFIG_SERIAL_OF_PLATFORM=y
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
# CONFIG_HWMON is not set
|
||||
CONFIG_FB=y
|
||||
CONFIG_FRAMEBUFFER_CONSOLE=y
|
||||
CONFIG_LOGO=y
|
||||
# CONFIG_HID is not set
|
||||
# CONFIG_USB_SUPPORT is not set
|
||||
# CONFIG_IOMMU_SUPPORT is not set
|
||||
|
|
|
@ -4,6 +4,7 @@ CONFIG_SYSVIPC=y
|
|||
CONFIG_POSIX_MQUEUE=y
|
||||
# CONFIG_CROSS_MEMORY_ATTACH is not set
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_PREEMPT=y
|
||||
CONFIG_IKCONFIG=y
|
||||
CONFIG_IKCONFIG_PROC=y
|
||||
CONFIG_NAMESPACES=y
|
||||
|
@ -17,13 +18,10 @@ CONFIG_PERF_EVENTS=y
|
|||
# CONFIG_SLUB_DEBUG is not set
|
||||
# CONFIG_COMPAT_BRK is not set
|
||||
CONFIG_ISA_ARCOMPACT=y
|
||||
CONFIG_ARC_BUILTIN_DTB_NAME="nsim_700"
|
||||
CONFIG_KPROBES=y
|
||||
CONFIG_MODULES=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
# CONFIG_IOSCHED_DEADLINE is not set
|
||||
# CONFIG_IOSCHED_CFQ is not set
|
||||
CONFIG_ARC_BUILTIN_DTB_NAME="nsim_700"
|
||||
CONFIG_PREEMPT=y
|
||||
# CONFIG_COMPACTION is not set
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
|
@ -37,15 +35,18 @@ CONFIG_DEVTMPFS=y
|
|||
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
|
||||
# CONFIG_BLK_DEV is not set
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_ARC_EMAC=y
|
||||
CONFIG_LXT_PHY=y
|
||||
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
|
||||
# CONFIG_ETHERNET is not set
|
||||
# CONFIG_WLAN is not set
|
||||
# CONFIG_INPUT_KEYBOARD is not set
|
||||
# CONFIG_INPUT_MOUSE is not set
|
||||
# CONFIG_SERIO is not set
|
||||
# CONFIG_LEGACY_PTYS is not set
|
||||
CONFIG_SERIAL_ARC=y
|
||||
CONFIG_SERIAL_ARC_CONSOLE=y
|
||||
CONFIG_SERIAL_8250=y
|
||||
CONFIG_SERIAL_8250_CONSOLE=y
|
||||
CONFIG_SERIAL_8250_NR_UARTS=1
|
||||
CONFIG_SERIAL_8250_RUNTIME_UARTS=1
|
||||
CONFIG_SERIAL_8250_DW=y
|
||||
CONFIG_SERIAL_OF_PLATFORM=y
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
# CONFIG_HWMON is not set
|
||||
# CONFIG_HID is not set
|
||||
|
|
|
@ -1,60 +0,0 @@
|
|||
# CONFIG_LOCALVERSION_AUTO is not set
|
||||
# CONFIG_SWAP is not set
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_POSIX_MQUEUE=y
|
||||
# CONFIG_CROSS_MEMORY_ATTACH is not set
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_IKCONFIG=y
|
||||
CONFIG_IKCONFIG_PROC=y
|
||||
CONFIG_NAMESPACES=y
|
||||
# CONFIG_UTS_NS is not set
|
||||
# CONFIG_PID_NS is not set
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE_O3=y
|
||||
CONFIG_KALLSYMS_ALL=y
|
||||
CONFIG_EMBEDDED=y
|
||||
CONFIG_PERF_EVENTS=y
|
||||
# CONFIG_SLUB_DEBUG is not set
|
||||
# CONFIG_COMPAT_BRK is not set
|
||||
CONFIG_KPROBES=y
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_FORCE_LOAD=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
CONFIG_MODULE_FORCE_UNLOAD=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
# CONFIG_IOSCHED_DEADLINE is not set
|
||||
# CONFIG_IOSCHED_CFQ is not set
|
||||
CONFIG_ISA_ARCV2=y
|
||||
CONFIG_ARC_BUILTIN_DTB_NAME="nsim_hs"
|
||||
CONFIG_PREEMPT=y
|
||||
# CONFIG_COMPACTION is not set
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_UNIX_DIAG=y
|
||||
CONFIG_NET_KEY=y
|
||||
CONFIG_INET=y
|
||||
# CONFIG_IPV6 is not set
|
||||
CONFIG_DEVTMPFS=y
|
||||
# CONFIG_STANDALONE is not set
|
||||
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
|
||||
# CONFIG_BLK_DEV is not set
|
||||
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
|
||||
# CONFIG_INPUT_KEYBOARD is not set
|
||||
# CONFIG_INPUT_MOUSE is not set
|
||||
# CONFIG_SERIO is not set
|
||||
# CONFIG_LEGACY_PTYS is not set
|
||||
CONFIG_SERIAL_ARC=y
|
||||
CONFIG_SERIAL_ARC_CONSOLE=y
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
# CONFIG_HWMON is not set
|
||||
# CONFIG_HID is not set
|
||||
# CONFIG_USB_SUPPORT is not set
|
||||
# CONFIG_IOMMU_SUPPORT is not set
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT2_FS_XATTR=y
|
||||
CONFIG_TMPFS=y
|
||||
# CONFIG_MISC_FILESYSTEMS is not set
|
||||
CONFIG_NFS_FS=y
|
||||
# CONFIG_ENABLE_MUST_CHECK is not set
|
||||
# CONFIG_DEBUG_PREEMPT is not set
|
|
@ -1,58 +0,0 @@
|
|||
# CONFIG_LOCALVERSION_AUTO is not set
|
||||
# CONFIG_SWAP is not set
|
||||
# CONFIG_CROSS_MEMORY_ATTACH is not set
|
||||
CONFIG_HIGH_RES_TIMERS=y
|
||||
CONFIG_IKCONFIG=y
|
||||
CONFIG_IKCONFIG_PROC=y
|
||||
CONFIG_NAMESPACES=y
|
||||
# CONFIG_UTS_NS is not set
|
||||
# CONFIG_PID_NS is not set
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE_O3=y
|
||||
CONFIG_KALLSYMS_ALL=y
|
||||
CONFIG_EMBEDDED=y
|
||||
CONFIG_PERF_EVENTS=y
|
||||
# CONFIG_SLUB_DEBUG is not set
|
||||
# CONFIG_COMPAT_BRK is not set
|
||||
CONFIG_KPROBES=y
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_FORCE_LOAD=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
CONFIG_MODULE_FORCE_UNLOAD=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
# CONFIG_IOSCHED_DEADLINE is not set
|
||||
# CONFIG_IOSCHED_CFQ is not set
|
||||
CONFIG_ISA_ARCV2=y
|
||||
CONFIG_SMP=y
|
||||
CONFIG_ARC_BUILTIN_DTB_NAME="nsim_hs_idu"
|
||||
CONFIG_PREEMPT=y
|
||||
# CONFIG_COMPACTION is not set
|
||||
CONFIG_NET=y
|
||||
CONFIG_PACKET=y
|
||||
CONFIG_UNIX=y
|
||||
CONFIG_UNIX_DIAG=y
|
||||
CONFIG_NET_KEY=y
|
||||
CONFIG_INET=y
|
||||
# CONFIG_IPV6 is not set
|
||||
CONFIG_DEVTMPFS=y
|
||||
# CONFIG_STANDALONE is not set
|
||||
# CONFIG_PREVENT_FIRMWARE_BUILD is not set
|
||||
# CONFIG_BLK_DEV is not set
|
||||
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
|
||||
# CONFIG_INPUT_KEYBOARD is not set
|
||||
# CONFIG_INPUT_MOUSE is not set
|
||||
# CONFIG_SERIO is not set
|
||||
# CONFIG_LEGACY_PTYS is not set
|
||||
CONFIG_SERIAL_ARC=y
|
||||
CONFIG_SERIAL_ARC_CONSOLE=y
|
||||
# CONFIG_HW_RANDOM is not set
|
||||
# CONFIG_HWMON is not set
|
||||
# CONFIG_HID is not set
|
||||
# CONFIG_USB_SUPPORT is not set
|
||||
# CONFIG_IOMMU_SUPPORT is not set
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT2_FS_XATTR=y
|
||||
CONFIG_TMPFS=y
|
||||
# CONFIG_MISC_FILESYSTEMS is not set
|
||||
CONFIG_NFS_FS=y
|
||||
# CONFIG_ENABLE_MUST_CHECK is not set
|
|
@ -25,6 +25,8 @@
|
|||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
#include <linux/build_bug.h>
|
||||
|
||||
/* Uncached access macros */
|
||||
#define arc_read_uncached_32(ptr) \
|
||||
({ \
|
||||
|
|
|
@ -130,7 +130,7 @@
|
|||
* to be saved again on kernel mode stack, as part of pt_regs.
|
||||
*-------------------------------------------------------------*/
|
||||
.macro PROLOG_FREEUP_REG reg, mem
|
||||
#ifdef CONFIG_SMP
|
||||
#ifndef ARC_USE_SCRATCH_REG
|
||||
sr \reg, [ARC_REG_SCRATCH_DATA0]
|
||||
#else
|
||||
st \reg, [\mem]
|
||||
|
@ -138,7 +138,7 @@
|
|||
.endm
|
||||
|
||||
.macro PROLOG_RESTORE_REG reg, mem
|
||||
#ifdef CONFIG_SMP
|
||||
#ifndef ARC_USE_SCRATCH_REG
|
||||
lr \reg, [ARC_REG_SCRATCH_DATA0]
|
||||
#else
|
||||
ld \reg, [\mem]
|
||||
|
|
|
@ -0,0 +1,72 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
#ifndef _ASM_ARC_JUMP_LABEL_H
|
||||
#define _ASM_ARC_JUMP_LABEL_H
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
#include <linux/stringify.h>
|
||||
#include <linux/types.h>
|
||||
|
||||
#define JUMP_LABEL_NOP_SIZE 4
|
||||
|
||||
/*
|
||||
* NOTE about '.balign 4':
|
||||
*
|
||||
* To make atomic update of patched instruction available we need to guarantee
|
||||
* that this instruction doesn't cross L1 cache line boundary.
|
||||
*
|
||||
* As of today we simply align instruction which can be patched by 4 byte using
|
||||
* ".balign 4" directive. In that case patched instruction is aligned with one
|
||||
* 16-bit NOP_S if this is required.
|
||||
* However 'align by 4' directive is much stricter than it actually required.
|
||||
* It's enough that our 32-bit instruction don't cross L1 cache line boundary /
|
||||
* L1 I$ fetch block boundary which can be achieved by using
|
||||
* ".bundle_align_mode" assembler directive. That will save us from adding
|
||||
* useless NOP_S padding in most of the cases.
|
||||
*
|
||||
* TODO: switch to ".bundle_align_mode" directive using whin it will be
|
||||
* supported by ARC toolchain.
|
||||
*/
|
||||
|
||||
static __always_inline bool arch_static_branch(struct static_key *key,
|
||||
bool branch)
|
||||
{
|
||||
asm_volatile_goto(".balign "__stringify(JUMP_LABEL_NOP_SIZE)" \n"
|
||||
"1: \n"
|
||||
"nop \n"
|
||||
".pushsection __jump_table, \"aw\" \n"
|
||||
".word 1b, %l[l_yes], %c0 \n"
|
||||
".popsection \n"
|
||||
: : "i" (&((char *)key)[branch]) : : l_yes);
|
||||
|
||||
return false;
|
||||
l_yes:
|
||||
return true;
|
||||
}
|
||||
|
||||
static __always_inline bool arch_static_branch_jump(struct static_key *key,
|
||||
bool branch)
|
||||
{
|
||||
asm_volatile_goto(".balign "__stringify(JUMP_LABEL_NOP_SIZE)" \n"
|
||||
"1: \n"
|
||||
"b %l[l_yes] \n"
|
||||
".pushsection __jump_table, \"aw\" \n"
|
||||
".word 1b, %l[l_yes], %c0 \n"
|
||||
".popsection \n"
|
||||
: : "i" (&((char *)key)[branch]) : : l_yes);
|
||||
|
||||
return false;
|
||||
l_yes:
|
||||
return true;
|
||||
}
|
||||
|
||||
typedef u32 jump_label_t;
|
||||
|
||||
struct jump_entry {
|
||||
jump_label_t code;
|
||||
jump_label_t target;
|
||||
jump_label_t key;
|
||||
};
|
||||
|
||||
#endif /* __ASSEMBLY__ */
|
||||
#endif
|
|
@ -40,6 +40,10 @@
|
|||
#define ARC_REG_SCRATCH_DATA0 0x46c
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_ISA_ARCV2) || !defined(CONFIG_SMP)
|
||||
#define ARC_USE_SCRATCH_REG
|
||||
#endif
|
||||
|
||||
/* Bits in MMU PID register */
|
||||
#define __TLB_ENABLE (1 << 31)
|
||||
#define __PROG_ENABLE (1 << 30)
|
||||
|
@ -63,6 +67,8 @@
|
|||
#if (CONFIG_ARC_MMU_VER >= 2)
|
||||
#define TLBWriteNI 0x5 /* write JTLB without inv uTLBs */
|
||||
#define TLBIVUTLB 0x6 /* explicitly inv uTLBs */
|
||||
#else
|
||||
#define TLBWriteNI TLBWrite /* Not present in hardware, fallback */
|
||||
#endif
|
||||
|
||||
#if (CONFIG_ARC_MMU_VER >= 4)
|
||||
|
|
|
@ -144,7 +144,7 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
|
|||
*/
|
||||
cpumask_set_cpu(cpu, mm_cpumask(next));
|
||||
|
||||
#ifndef CONFIG_SMP
|
||||
#ifdef ARC_USE_SCRATCH_REG
|
||||
/* PGD cached in MMU reg to avoid 3 mem lookups: task->mm->pgd */
|
||||
write_aux_reg(ARC_REG_SCRATCH_DATA0, next->pgd);
|
||||
#endif
|
||||
|
|
|
@ -350,7 +350,7 @@ static inline void set_pte_at(struct mm_struct *mm, unsigned long addr,
|
|||
* Thus use this macro only when you are certain that "current" is current
|
||||
* e.g. when dealing with signal frame setup code etc
|
||||
*/
|
||||
#ifndef CONFIG_SMP
|
||||
#ifdef ARC_USE_SCRATCH_REG
|
||||
#define pgd_offset_fast(mm, addr) \
|
||||
({ \
|
||||
pgd_t *pgd_base = (pgd_t *) read_aux_reg(ARC_REG_SCRATCH_DATA0); \
|
||||
|
|
|
@ -20,6 +20,7 @@ obj-$(CONFIG_ARC_EMUL_UNALIGNED) += unaligned.o
|
|||
obj-$(CONFIG_KGDB) += kgdb.o
|
||||
obj-$(CONFIG_ARC_METAWARE_HLINK) += arc_hostlink.o
|
||||
obj-$(CONFIG_PERF_EVENTS) += perf_event.o
|
||||
obj-$(CONFIG_JUMP_LABEL) += jump_label.o
|
||||
|
||||
obj-$(CONFIG_ARC_FPU_SAVE_RESTORE) += fpu.o
|
||||
CFLAGS_fpu.o += -mdpfp
|
||||
|
|
|
@ -0,0 +1,170 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/jump_label.h>
|
||||
|
||||
#include "asm/cacheflush.h"
|
||||
|
||||
#define JUMPLABEL_ERR "ARC: jump_label: ERROR: "
|
||||
|
||||
/* Halt system on fatal error to make debug easier */
|
||||
#define arc_jl_fatal(format...) \
|
||||
({ \
|
||||
pr_err(JUMPLABEL_ERR format); \
|
||||
BUG(); \
|
||||
})
|
||||
|
||||
static inline u32 arc_gen_nop(void)
|
||||
{
|
||||
/* 1x 32bit NOP in middle endian */
|
||||
return 0x7000264a;
|
||||
}
|
||||
|
||||
/*
|
||||
* Atomic update of patched instruction is only available if this
|
||||
* instruction doesn't cross L1 cache line boundary. You can read about
|
||||
* the way we achieve this in arc/include/asm/jump_label.h
|
||||
*/
|
||||
static inline void instruction_align_assert(void *addr, int len)
|
||||
{
|
||||
unsigned long a = (unsigned long)addr;
|
||||
|
||||
if ((a >> L1_CACHE_SHIFT) != ((a + len - 1) >> L1_CACHE_SHIFT))
|
||||
arc_jl_fatal("instruction (addr %px) cross L1 cache line border",
|
||||
addr);
|
||||
}
|
||||
|
||||
/*
|
||||
* ARCv2 'Branch unconditionally' instruction:
|
||||
* 00000ssssssssss1SSSSSSSSSSNRtttt
|
||||
* s S[n:0] lower bits signed immediate (number is bitfield size)
|
||||
* S S[m:n+1] upper bits signed immediate (number is bitfield size)
|
||||
* t S[24:21] upper bits signed immediate (branch unconditionally far)
|
||||
* N N <.d> delay slot mode
|
||||
* R R Reserved
|
||||
*/
|
||||
static inline u32 arc_gen_branch(jump_label_t pc, jump_label_t target)
|
||||
{
|
||||
u32 instruction_l, instruction_r;
|
||||
u32 pcl = pc & GENMASK(31, 2);
|
||||
u32 u_offset = target - pcl;
|
||||
u32 s, S, t;
|
||||
|
||||
/*
|
||||
* Offset in 32-bit branch instruction must to fit into s25.
|
||||
* Something is terribly broken if we get such huge offset within one
|
||||
* function.
|
||||
*/
|
||||
if ((s32)u_offset < -16777216 || (s32)u_offset > 16777214)
|
||||
arc_jl_fatal("gen branch with offset (%d) not fit in s25",
|
||||
(s32)u_offset);
|
||||
|
||||
/*
|
||||
* All instructions are aligned by 2 bytes so we should never get offset
|
||||
* here which is not 2 bytes aligned.
|
||||
*/
|
||||
if (u_offset & 0x1)
|
||||
arc_jl_fatal("gen branch with offset (%d) unaligned to 2 bytes",
|
||||
(s32)u_offset);
|
||||
|
||||
s = (u_offset >> 1) & GENMASK(9, 0);
|
||||
S = (u_offset >> 11) & GENMASK(9, 0);
|
||||
t = (u_offset >> 21) & GENMASK(3, 0);
|
||||
|
||||
/* 00000ssssssssss1 */
|
||||
instruction_l = (s << 1) | 0x1;
|
||||
/* SSSSSSSSSSNRtttt */
|
||||
instruction_r = (S << 6) | t;
|
||||
|
||||
return (instruction_r << 16) | (instruction_l & GENMASK(15, 0));
|
||||
}
|
||||
|
||||
void arch_jump_label_transform(struct jump_entry *entry,
|
||||
enum jump_label_type type)
|
||||
{
|
||||
jump_label_t *instr_addr = (jump_label_t *)entry->code;
|
||||
u32 instr;
|
||||
|
||||
instruction_align_assert(instr_addr, JUMP_LABEL_NOP_SIZE);
|
||||
|
||||
if (type == JUMP_LABEL_JMP)
|
||||
instr = arc_gen_branch(entry->code, entry->target);
|
||||
else
|
||||
instr = arc_gen_nop();
|
||||
|
||||
WRITE_ONCE(*instr_addr, instr);
|
||||
flush_icache_range(entry->code, entry->code + JUMP_LABEL_NOP_SIZE);
|
||||
}
|
||||
|
||||
void arch_jump_label_transform_static(struct jump_entry *entry,
|
||||
enum jump_label_type type)
|
||||
{
|
||||
/*
|
||||
* We use only one NOP type (1x, 4 byte) in arch_static_branch, so
|
||||
* there's no need to patch an identical NOP over the top of it here.
|
||||
* The generic code calls 'arch_jump_label_transform' if the NOP needs
|
||||
* to be replaced by a branch, so 'arch_jump_label_transform_static' is
|
||||
* never called with type other than JUMP_LABEL_NOP.
|
||||
*/
|
||||
BUG_ON(type != JUMP_LABEL_NOP);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_ARC_DBG_JUMP_LABEL
|
||||
#define SELFTEST_MSG "ARC: instruction generation self-test: "
|
||||
|
||||
struct arc_gen_branch_testdata {
|
||||
jump_label_t pc;
|
||||
jump_label_t target_address;
|
||||
u32 expected_instr;
|
||||
};
|
||||
|
||||
static __init int branch_gen_test(const struct arc_gen_branch_testdata *test)
|
||||
{
|
||||
u32 instr_got;
|
||||
|
||||
instr_got = arc_gen_branch(test->pc, test->target_address);
|
||||
if (instr_got == test->expected_instr)
|
||||
return 0;
|
||||
|
||||
pr_err(SELFTEST_MSG "FAIL:\n arc_gen_branch(0x%08x, 0x%08x) != 0x%08x, got 0x%08x\n",
|
||||
test->pc, test->target_address,
|
||||
test->expected_instr, instr_got);
|
||||
|
||||
return -EFAULT;
|
||||
}
|
||||
|
||||
/*
|
||||
* Offset field in branch instruction is not continuous. Test all
|
||||
* available offset field and sign combinations. Test data is generated
|
||||
* from real working code.
|
||||
*/
|
||||
static const struct arc_gen_branch_testdata arcgenbr_test_data[] __initconst = {
|
||||
{0x90007548, 0x90007514, 0xffcf07cd}, /* tiny (-52) offs */
|
||||
{0x9000c9c0, 0x9000c782, 0xffcf05c3}, /* tiny (-574) offs */
|
||||
{0x9000cc1c, 0x9000c782, 0xffcf0367}, /* tiny (-1178) offs */
|
||||
{0x9009dce0, 0x9009d106, 0xff8f0427}, /* small (-3034) offs */
|
||||
{0x9000f5de, 0x90007d30, 0xfc0f0755}, /* big (-30892) offs */
|
||||
{0x900a2444, 0x90035f64, 0xc9cf0321}, /* huge (-443616) offs */
|
||||
{0x90007514, 0x9000752c, 0x00000019}, /* tiny (+24) offs */
|
||||
{0x9001a578, 0x9001a77a, 0x00000203}, /* tiny (+514) offs */
|
||||
{0x90031ed8, 0x90032634, 0x0000075d}, /* tiny (+1884) offs */
|
||||
{0x9008c7f2, 0x9008d3f0, 0x00400401}, /* small (+3072) offs */
|
||||
{0x9000bb38, 0x9003b340, 0x17c00009}, /* big (+194568) offs */
|
||||
{0x90008f44, 0x90578d80, 0xb7c2063d} /* huge (+5701180) offs */
|
||||
};
|
||||
|
||||
static __init int instr_gen_test(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(arcgenbr_test_data); i++)
|
||||
if (branch_gen_test(&arcgenbr_test_data[i]))
|
||||
return -EFAULT;
|
||||
|
||||
pr_info(SELFTEST_MSG "OK\n");
|
||||
|
||||
return 0;
|
||||
}
|
||||
early_initcall(instr_gen_test);
|
||||
|
||||
#endif /* CONFIG_ARC_DBG_JUMP_LABEL */
|
|
@ -118,6 +118,33 @@ static inline void __tlb_entry_erase(void)
|
|||
write_aux_reg(ARC_REG_TLBCOMMAND, TLBWrite);
|
||||
}
|
||||
|
||||
static void utlb_invalidate(void)
|
||||
{
|
||||
#if (CONFIG_ARC_MMU_VER >= 2)
|
||||
|
||||
#if (CONFIG_ARC_MMU_VER == 2)
|
||||
/* MMU v2 introduced the uTLB Flush command.
|
||||
* There was however an obscure hardware bug, where uTLB flush would
|
||||
* fail when a prior probe for J-TLB (both totally unrelated) would
|
||||
* return lkup err - because the entry didn't exist in MMU.
|
||||
* The Workround was to set Index reg with some valid value, prior to
|
||||
* flush. This was fixed in MMU v3
|
||||
*/
|
||||
unsigned int idx;
|
||||
|
||||
/* make sure INDEX Reg is valid */
|
||||
idx = read_aux_reg(ARC_REG_TLBINDEX);
|
||||
|
||||
/* If not write some dummy val */
|
||||
if (unlikely(idx & TLB_LKUP_ERR))
|
||||
write_aux_reg(ARC_REG_TLBINDEX, 0xa);
|
||||
#endif
|
||||
|
||||
write_aux_reg(ARC_REG_TLBCOMMAND, TLBIVUTLB);
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
#if (CONFIG_ARC_MMU_VER < 4)
|
||||
|
||||
static inline unsigned int tlb_entry_lkup(unsigned long vaddr_n_asid)
|
||||
|
@ -149,44 +176,6 @@ static void tlb_entry_erase(unsigned int vaddr_n_asid)
|
|||
}
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* ARC700 MMU caches recently used J-TLB entries (RAM) as uTLBs (FLOPs)
|
||||
*
|
||||
* New IVUTLB cmd in MMU v2 explictly invalidates the uTLB
|
||||
*
|
||||
* utlb_invalidate ( )
|
||||
* -For v2 MMU calls Flush uTLB Cmd
|
||||
* -For v1 MMU does nothing (except for Metal Fix v1 MMU)
|
||||
* This is because in v1 TLBWrite itself invalidate uTLBs
|
||||
***************************************************************************/
|
||||
|
||||
static void utlb_invalidate(void)
|
||||
{
|
||||
#if (CONFIG_ARC_MMU_VER >= 2)
|
||||
|
||||
#if (CONFIG_ARC_MMU_VER == 2)
|
||||
/* MMU v2 introduced the uTLB Flush command.
|
||||
* There was however an obscure hardware bug, where uTLB flush would
|
||||
* fail when a prior probe for J-TLB (both totally unrelated) would
|
||||
* return lkup err - because the entry didn't exist in MMU.
|
||||
* The Workround was to set Index reg with some valid value, prior to
|
||||
* flush. This was fixed in MMU v3 hence not needed any more
|
||||
*/
|
||||
unsigned int idx;
|
||||
|
||||
/* make sure INDEX Reg is valid */
|
||||
idx = read_aux_reg(ARC_REG_TLBINDEX);
|
||||
|
||||
/* If not write some dummy val */
|
||||
if (unlikely(idx & TLB_LKUP_ERR))
|
||||
write_aux_reg(ARC_REG_TLBINDEX, 0xa);
|
||||
#endif
|
||||
|
||||
write_aux_reg(ARC_REG_TLBCOMMAND, TLBIVUTLB);
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
static void tlb_entry_insert(unsigned int pd0, pte_t pd1)
|
||||
{
|
||||
unsigned int idx;
|
||||
|
@ -219,11 +208,6 @@ static void tlb_entry_insert(unsigned int pd0, pte_t pd1)
|
|||
|
||||
#else /* CONFIG_ARC_MMU_VER >= 4) */
|
||||
|
||||
static void utlb_invalidate(void)
|
||||
{
|
||||
/* No need since uTLB is always in sync with JTLB */
|
||||
}
|
||||
|
||||
static void tlb_entry_erase(unsigned int vaddr_n_asid)
|
||||
{
|
||||
write_aux_reg(ARC_REG_TLBPD0, vaddr_n_asid | _PAGE_PRESENT);
|
||||
|
@ -267,7 +251,7 @@ noinline void local_flush_tlb_all(void)
|
|||
for (entry = 0; entry < num_tlb; entry++) {
|
||||
/* write this entry to the TLB */
|
||||
write_aux_reg(ARC_REG_TLBINDEX, entry);
|
||||
write_aux_reg(ARC_REG_TLBCOMMAND, TLBWrite);
|
||||
write_aux_reg(ARC_REG_TLBCOMMAND, TLBWriteNI);
|
||||
}
|
||||
|
||||
if (IS_ENABLED(CONFIG_TRANSPARENT_HUGEPAGE)) {
|
||||
|
@ -278,7 +262,7 @@ noinline void local_flush_tlb_all(void)
|
|||
|
||||
for (entry = stlb_idx; entry < stlb_idx + 16; entry++) {
|
||||
write_aux_reg(ARC_REG_TLBINDEX, entry);
|
||||
write_aux_reg(ARC_REG_TLBCOMMAND, TLBWrite);
|
||||
write_aux_reg(ARC_REG_TLBCOMMAND, TLBWriteNI);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -355,8 +339,6 @@ void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
|
|||
}
|
||||
}
|
||||
|
||||
utlb_invalidate();
|
||||
|
||||
local_irq_restore(flags);
|
||||
}
|
||||
|
||||
|
@ -385,8 +367,6 @@ void local_flush_tlb_kernel_range(unsigned long start, unsigned long end)
|
|||
start += PAGE_SIZE;
|
||||
}
|
||||
|
||||
utlb_invalidate();
|
||||
|
||||
local_irq_restore(flags);
|
||||
}
|
||||
|
||||
|
@ -407,7 +387,6 @@ void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
|
|||
|
||||
if (asid_mm(vma->vm_mm, cpu) != MM_CTXT_NO_ASID) {
|
||||
tlb_entry_erase((page & PAGE_MASK) | hw_pid(vma->vm_mm, cpu));
|
||||
utlb_invalidate();
|
||||
}
|
||||
|
||||
local_irq_restore(flags);
|
||||
|
@ -868,7 +847,7 @@ void arc_mmu_init(void)
|
|||
write_aux_reg(ARC_REG_PID, MMU_ENABLE);
|
||||
|
||||
/* In smp we use this reg for interrupt 1 scratch */
|
||||
#ifndef CONFIG_SMP
|
||||
#ifdef ARC_USE_SCRATCH_REG
|
||||
/* swapper_pg_dir is the pgd for the kernel, used by vmalloc */
|
||||
write_aux_reg(ARC_REG_SCRATCH_DATA0, swapper_pg_dir);
|
||||
#endif
|
||||
|
|
|
@ -122,17 +122,27 @@ ex_saved_reg1:
|
|||
#else /* ARCv2 */
|
||||
|
||||
.macro TLBMISS_FREEUP_REGS
|
||||
#ifdef CONFIG_ARC_HAS_LL64
|
||||
std r0, [sp, -16]
|
||||
std r2, [sp, -8]
|
||||
#else
|
||||
PUSH r0
|
||||
PUSH r1
|
||||
PUSH r2
|
||||
PUSH r3
|
||||
#endif
|
||||
.endm
|
||||
|
||||
.macro TLBMISS_RESTORE_REGS
|
||||
#ifdef CONFIG_ARC_HAS_LL64
|
||||
ldd r0, [sp, -16]
|
||||
ldd r2, [sp, -8]
|
||||
#else
|
||||
POP r3
|
||||
POP r2
|
||||
POP r1
|
||||
POP r0
|
||||
#endif
|
||||
.endm
|
||||
|
||||
#endif
|
||||
|
@ -193,7 +203,7 @@ ex_saved_reg1:
|
|||
|
||||
lr r2, [efa]
|
||||
|
||||
#ifndef CONFIG_SMP
|
||||
#ifdef ARC_USE_SCRATCH_REG
|
||||
lr r1, [ARC_REG_SCRATCH_DATA0] ; current pgd
|
||||
#else
|
||||
GET_CURR_TASK_ON_CPU r1
|
||||
|
@ -282,11 +292,7 @@ ex_saved_reg1:
|
|||
sr TLBGetIndex, [ARC_REG_TLBCOMMAND]
|
||||
|
||||
/* Commit the Write */
|
||||
#if (CONFIG_ARC_MMU_VER >= 2) /* introduced in v2 */
|
||||
sr TLBWriteNI, [ARC_REG_TLBCOMMAND]
|
||||
#else
|
||||
sr TLBWrite, [ARC_REG_TLBCOMMAND]
|
||||
#endif
|
||||
|
||||
#else
|
||||
sr TLBInsertEntry, [ARC_REG_TLBCOMMAND]
|
||||
|
@ -370,9 +376,7 @@ ENTRY(EV_TLBMissD)
|
|||
|
||||
;----------------------------------------------------------------
|
||||
; UPDATE_PTE: Let Linux VM know that page was accessed/dirty
|
||||
lr r3, [ecr]
|
||||
or r0, r0, _PAGE_ACCESSED ; Accessed bit always
|
||||
btst_s r3, ECR_C_BIT_DTLB_ST_MISS ; See if it was a Write Access ?
|
||||
or.nz r0, r0, _PAGE_DIRTY ; if Write, set Dirty bit as well
|
||||
st_s r0, [r1] ; Write back PTE
|
||||
|
||||
|
|
|
@ -21,7 +21,6 @@ static const char *simulation_compat[] __initconst = {
|
|||
"snps,nsim",
|
||||
"snps,nsimosci",
|
||||
#else
|
||||
"snps,nsim_hs",
|
||||
"snps,nsimosci_hs",
|
||||
"snps,zebu_hs",
|
||||
#endif
|
||||
|
|
Загрузка…
Ссылка в новой задаче