firmware: xilinx: Add ZynqMP aes API for AES functionality
Add ZynqMP firmware AES API to perform encryption/decryption of given data. Signed-off-by: Kalyani Akula <kalyani.akula@xilinx.com> Acked-by: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
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@ -707,6 +707,30 @@ static int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities,
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qos, ack, NULL);
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}
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/**
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* zynqmp_pm_aes - Access AES hardware to encrypt/decrypt the data using
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* AES-GCM core.
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* @address: Address of the AesParams structure.
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* @out: Returned output value
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*
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* Return: Returns status, either success or error code.
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*/
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static int zynqmp_pm_aes_engine(const u64 address, u32 *out)
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{
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u32 ret_payload[PAYLOAD_ARG_CNT];
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int ret;
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if (!out)
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return -EINVAL;
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ret = zynqmp_pm_invoke_fn(PM_SECURE_AES, upper_32_bits(address),
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lower_32_bits(address),
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0, 0, ret_payload);
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*out = ret_payload[1];
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return ret;
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}
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static const struct zynqmp_eemi_ops eemi_ops = {
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.get_api_version = zynqmp_pm_get_api_version,
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.get_chipid = zynqmp_pm_get_chipid,
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@ -730,6 +754,7 @@ static const struct zynqmp_eemi_ops eemi_ops = {
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.set_requirement = zynqmp_pm_set_requirement,
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.fpga_load = zynqmp_pm_fpga_load,
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.fpga_get_status = zynqmp_pm_fpga_get_status,
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.aes = zynqmp_pm_aes_engine,
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};
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/**
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@ -82,6 +82,7 @@ enum pm_api_id {
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PM_CLOCK_GETRATE,
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PM_CLOCK_SETPARENT,
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PM_CLOCK_GETPARENT,
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PM_SECURE_AES = 47,
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PM_FEATURE_CHECK = 63,
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PM_API_MAX,
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};
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@ -315,6 +316,7 @@ struct zynqmp_eemi_ops {
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const u32 capabilities,
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const u32 qos,
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const enum zynqmp_pm_request_ack ack);
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int (*aes)(const u64 address, u32 *out);
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};
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int zynqmp_pm_invoke_fn(u32 pm_api_id, u32 arg0, u32 arg1,
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