MIPS: Replace 'kernel_uses_smartmips_rixi' with 'cpu_has_rixi'.
Remove usage of the 'kernel_uses_smartmips_rixi' macro from all files and use new 'cpu_has_rixi' instead. Signed-off-by: Steven J. Hill <sjhill@mips.com> Acked-by: David Daney <david.daney@cavium.com>
This commit is contained in:
Родитель
b2ab4f08e8
Коммит
05857c64ec
|
@ -98,9 +98,6 @@
|
||||||
#ifndef cpu_has_rixi
|
#ifndef cpu_has_rixi
|
||||||
#define cpu_has_rixi (cpu_data[0].options & MIPS_CPU_RIXI)
|
#define cpu_has_rixi (cpu_data[0].options & MIPS_CPU_RIXI)
|
||||||
#endif
|
#endif
|
||||||
#ifndef kernel_uses_smartmips_rixi
|
|
||||||
#define kernel_uses_smartmips_rixi 0
|
|
||||||
#endif
|
|
||||||
#ifndef cpu_has_vtag_icache
|
#ifndef cpu_has_vtag_icache
|
||||||
#define cpu_has_vtag_icache (cpu_data[0].icache.flags & MIPS_CACHE_VTAG)
|
#define cpu_has_vtag_icache (cpu_data[0].icache.flags & MIPS_CACHE_VTAG)
|
||||||
#endif
|
#endif
|
||||||
|
|
|
@ -58,7 +58,7 @@
|
||||||
#define cpu_has_veic 0
|
#define cpu_has_veic 0
|
||||||
#define cpu_hwrena_impl_bits 0xc0000000
|
#define cpu_hwrena_impl_bits 0xc0000000
|
||||||
|
|
||||||
#define kernel_uses_smartmips_rixi (cpu_data[0].cputype != CPU_CAVIUM_OCTEON)
|
#define cpu_has_rixi (cpu_data[0].cputype != CPU_CAVIUM_OCTEON)
|
||||||
|
|
||||||
#define ARCH_HAS_IRQ_PER_CPU 1
|
#define ARCH_HAS_IRQ_PER_CPU 1
|
||||||
#define ARCH_HAS_SPINLOCK_PREFETCH 1
|
#define ARCH_HAS_SPINLOCK_PREFETCH 1
|
||||||
|
|
|
@ -79,9 +79,9 @@
|
||||||
/* implemented in software */
|
/* implemented in software */
|
||||||
#define _PAGE_PRESENT_SHIFT (0)
|
#define _PAGE_PRESENT_SHIFT (0)
|
||||||
#define _PAGE_PRESENT (1 << _PAGE_PRESENT_SHIFT)
|
#define _PAGE_PRESENT (1 << _PAGE_PRESENT_SHIFT)
|
||||||
/* implemented in software, should be unused if kernel_uses_smartmips_rixi. */
|
/* implemented in software, should be unused if cpu_has_rixi. */
|
||||||
#define _PAGE_READ_SHIFT (kernel_uses_smartmips_rixi ? _PAGE_PRESENT_SHIFT : _PAGE_PRESENT_SHIFT + 1)
|
#define _PAGE_READ_SHIFT (cpu_has_rixi ? _PAGE_PRESENT_SHIFT : _PAGE_PRESENT_SHIFT + 1)
|
||||||
#define _PAGE_READ ({if (kernel_uses_smartmips_rixi) BUG(); 1 << _PAGE_READ_SHIFT; })
|
#define _PAGE_READ ({BUG_ON(cpu_has_rixi); 1 << _PAGE_READ_SHIFT; })
|
||||||
/* implemented in software */
|
/* implemented in software */
|
||||||
#define _PAGE_WRITE_SHIFT (_PAGE_READ_SHIFT + 1)
|
#define _PAGE_WRITE_SHIFT (_PAGE_READ_SHIFT + 1)
|
||||||
#define _PAGE_WRITE (1 << _PAGE_WRITE_SHIFT)
|
#define _PAGE_WRITE (1 << _PAGE_WRITE_SHIFT)
|
||||||
|
@ -104,12 +104,12 @@
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* Page cannot be executed */
|
/* Page cannot be executed */
|
||||||
#define _PAGE_NO_EXEC_SHIFT (kernel_uses_smartmips_rixi ? _PAGE_HUGE_SHIFT + 1 : _PAGE_HUGE_SHIFT)
|
#define _PAGE_NO_EXEC_SHIFT (cpu_has_rixi ? _PAGE_HUGE_SHIFT + 1 : _PAGE_HUGE_SHIFT)
|
||||||
#define _PAGE_NO_EXEC ({if (!kernel_uses_smartmips_rixi) BUG(); 1 << _PAGE_NO_EXEC_SHIFT; })
|
#define _PAGE_NO_EXEC ({BUG_ON(!cpu_has_rixi); 1 << _PAGE_NO_EXEC_SHIFT; })
|
||||||
|
|
||||||
/* Page cannot be read */
|
/* Page cannot be read */
|
||||||
#define _PAGE_NO_READ_SHIFT (kernel_uses_smartmips_rixi ? _PAGE_NO_EXEC_SHIFT + 1 : _PAGE_NO_EXEC_SHIFT)
|
#define _PAGE_NO_READ_SHIFT (cpu_has_rixi ? _PAGE_NO_EXEC_SHIFT + 1 : _PAGE_NO_EXEC_SHIFT)
|
||||||
#define _PAGE_NO_READ ({if (!kernel_uses_smartmips_rixi) BUG(); 1 << _PAGE_NO_READ_SHIFT; })
|
#define _PAGE_NO_READ ({BUG_ON(!cpu_has_rixi); 1 << _PAGE_NO_READ_SHIFT; })
|
||||||
|
|
||||||
#define _PAGE_GLOBAL_SHIFT (_PAGE_NO_READ_SHIFT + 1)
|
#define _PAGE_GLOBAL_SHIFT (_PAGE_NO_READ_SHIFT + 1)
|
||||||
#define _PAGE_GLOBAL (1 << _PAGE_GLOBAL_SHIFT)
|
#define _PAGE_GLOBAL (1 << _PAGE_GLOBAL_SHIFT)
|
||||||
|
@ -155,7 +155,7 @@
|
||||||
*/
|
*/
|
||||||
static inline uint64_t pte_to_entrylo(unsigned long pte_val)
|
static inline uint64_t pte_to_entrylo(unsigned long pte_val)
|
||||||
{
|
{
|
||||||
if (kernel_uses_smartmips_rixi) {
|
if (cpu_has_rixi) {
|
||||||
int sa;
|
int sa;
|
||||||
#ifdef CONFIG_32BIT
|
#ifdef CONFIG_32BIT
|
||||||
sa = 31 - _PAGE_NO_READ_SHIFT;
|
sa = 31 - _PAGE_NO_READ_SHIFT;
|
||||||
|
@ -220,7 +220,7 @@ static inline uint64_t pte_to_entrylo(unsigned long pte_val)
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#define __READABLE (_PAGE_SILENT_READ | _PAGE_ACCESSED | (kernel_uses_smartmips_rixi ? 0 : _PAGE_READ))
|
#define __READABLE (_PAGE_SILENT_READ | _PAGE_ACCESSED | (cpu_has_rixi ? 0 : _PAGE_READ))
|
||||||
#define __WRITEABLE (_PAGE_WRITE | _PAGE_SILENT_WRITE | _PAGE_MODIFIED)
|
#define __WRITEABLE (_PAGE_WRITE | _PAGE_SILENT_WRITE | _PAGE_MODIFIED)
|
||||||
|
|
||||||
#define _PAGE_CHG_MASK (_PFN_MASK | _PAGE_ACCESSED | _PAGE_MODIFIED | _CACHE_MASK)
|
#define _PAGE_CHG_MASK (_PFN_MASK | _PAGE_ACCESSED | _PAGE_MODIFIED | _CACHE_MASK)
|
||||||
|
|
|
@ -22,15 +22,15 @@ struct mm_struct;
|
||||||
struct vm_area_struct;
|
struct vm_area_struct;
|
||||||
|
|
||||||
#define PAGE_NONE __pgprot(_PAGE_PRESENT | _CACHE_CACHABLE_NONCOHERENT)
|
#define PAGE_NONE __pgprot(_PAGE_PRESENT | _CACHE_CACHABLE_NONCOHERENT)
|
||||||
#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_WRITE | (kernel_uses_smartmips_rixi ? 0 : _PAGE_READ) | \
|
#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_WRITE | (cpu_has_rixi ? 0 : _PAGE_READ) | \
|
||||||
_page_cachable_default)
|
_page_cachable_default)
|
||||||
#define PAGE_COPY __pgprot(_PAGE_PRESENT | (kernel_uses_smartmips_rixi ? 0 : _PAGE_READ) | \
|
#define PAGE_COPY __pgprot(_PAGE_PRESENT | (cpu_has_rixi ? 0 : _PAGE_READ) | \
|
||||||
(kernel_uses_smartmips_rixi ? _PAGE_NO_EXEC : 0) | _page_cachable_default)
|
(cpu_has_rixi ? _PAGE_NO_EXEC : 0) | _page_cachable_default)
|
||||||
#define PAGE_READONLY __pgprot(_PAGE_PRESENT | (kernel_uses_smartmips_rixi ? 0 : _PAGE_READ) | \
|
#define PAGE_READONLY __pgprot(_PAGE_PRESENT | (cpu_has_rixi ? 0 : _PAGE_READ) | \
|
||||||
_page_cachable_default)
|
_page_cachable_default)
|
||||||
#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \
|
#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | __READABLE | __WRITEABLE | \
|
||||||
_PAGE_GLOBAL | _page_cachable_default)
|
_PAGE_GLOBAL | _page_cachable_default)
|
||||||
#define PAGE_USERIO __pgprot(_PAGE_PRESENT | (kernel_uses_smartmips_rixi ? 0 : _PAGE_READ) | _PAGE_WRITE | \
|
#define PAGE_USERIO __pgprot(_PAGE_PRESENT | (cpu_has_rixi ? 0 : _PAGE_READ) | _PAGE_WRITE | \
|
||||||
_page_cachable_default)
|
_page_cachable_default)
|
||||||
#define PAGE_KERNEL_UNCACHED __pgprot(_PAGE_PRESENT | __READABLE | \
|
#define PAGE_KERNEL_UNCACHED __pgprot(_PAGE_PRESENT | __READABLE | \
|
||||||
__WRITEABLE | _PAGE_GLOBAL | _CACHE_UNCACHED)
|
__WRITEABLE | _PAGE_GLOBAL | _CACHE_UNCACHED)
|
||||||
|
@ -299,7 +299,7 @@ static inline pte_t pte_mkdirty(pte_t pte)
|
||||||
static inline pte_t pte_mkyoung(pte_t pte)
|
static inline pte_t pte_mkyoung(pte_t pte)
|
||||||
{
|
{
|
||||||
pte_val(pte) |= _PAGE_ACCESSED;
|
pte_val(pte) |= _PAGE_ACCESSED;
|
||||||
if (kernel_uses_smartmips_rixi) {
|
if (cpu_has_rixi) {
|
||||||
if (!(pte_val(pte) & _PAGE_NO_READ))
|
if (!(pte_val(pte) & _PAGE_NO_READ))
|
||||||
pte_val(pte) |= _PAGE_SILENT_READ;
|
pte_val(pte) |= _PAGE_SILENT_READ;
|
||||||
} else {
|
} else {
|
||||||
|
|
|
@ -142,7 +142,7 @@ EXPORT_SYMBOL(_page_cachable_default);
|
||||||
|
|
||||||
static inline void setup_protection_map(void)
|
static inline void setup_protection_map(void)
|
||||||
{
|
{
|
||||||
if (kernel_uses_smartmips_rixi) {
|
if (cpu_has_rixi) {
|
||||||
protection_map[0] = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_EXEC | _PAGE_NO_READ);
|
protection_map[0] = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_EXEC | _PAGE_NO_READ);
|
||||||
protection_map[1] = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_EXEC);
|
protection_map[1] = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_EXEC);
|
||||||
protection_map[2] = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_EXEC | _PAGE_NO_READ);
|
protection_map[2] = __pgprot(_page_cachable_default | _PAGE_PRESENT | _PAGE_NO_EXEC | _PAGE_NO_READ);
|
||||||
|
|
|
@ -114,7 +114,7 @@ good_area:
|
||||||
if (!(vma->vm_flags & VM_WRITE))
|
if (!(vma->vm_flags & VM_WRITE))
|
||||||
goto bad_area;
|
goto bad_area;
|
||||||
} else {
|
} else {
|
||||||
if (kernel_uses_smartmips_rixi) {
|
if (cpu_has_rixi) {
|
||||||
if (address == regs->cp0_epc && !(vma->vm_flags & VM_EXEC)) {
|
if (address == regs->cp0_epc && !(vma->vm_flags & VM_EXEC)) {
|
||||||
#if 0
|
#if 0
|
||||||
pr_notice("Cpu%d[%s:%d:%0*lx:%ld:%0*lx] XI violation\n",
|
pr_notice("Cpu%d[%s:%d:%0*lx:%ld:%0*lx] XI violation\n",
|
||||||
|
|
|
@ -401,7 +401,7 @@ void __cpuinit tlb_init(void)
|
||||||
current_cpu_type() == CPU_R14000)
|
current_cpu_type() == CPU_R14000)
|
||||||
write_c0_framemask(0);
|
write_c0_framemask(0);
|
||||||
|
|
||||||
if (kernel_uses_smartmips_rixi) {
|
if (cpu_has_rixi) {
|
||||||
/*
|
/*
|
||||||
* Enable the no read, no exec bits, and enable large virtual
|
* Enable the no read, no exec bits, and enable large virtual
|
||||||
* address.
|
* address.
|
||||||
|
|
|
@ -586,7 +586,7 @@ static void __cpuinit build_tlb_write_entry(u32 **p, struct uasm_label **l,
|
||||||
static __cpuinit __maybe_unused void build_convert_pte_to_entrylo(u32 **p,
|
static __cpuinit __maybe_unused void build_convert_pte_to_entrylo(u32 **p,
|
||||||
unsigned int reg)
|
unsigned int reg)
|
||||||
{
|
{
|
||||||
if (kernel_uses_smartmips_rixi) {
|
if (cpu_has_rixi) {
|
||||||
UASM_i_SRL(p, reg, reg, ilog2(_PAGE_NO_EXEC));
|
UASM_i_SRL(p, reg, reg, ilog2(_PAGE_NO_EXEC));
|
||||||
UASM_i_ROTR(p, reg, reg, ilog2(_PAGE_GLOBAL) - ilog2(_PAGE_NO_EXEC));
|
UASM_i_ROTR(p, reg, reg, ilog2(_PAGE_GLOBAL) - ilog2(_PAGE_NO_EXEC));
|
||||||
} else {
|
} else {
|
||||||
|
@ -990,7 +990,7 @@ static void __cpuinit build_update_entries(u32 **p, unsigned int tmp,
|
||||||
if (cpu_has_64bits) {
|
if (cpu_has_64bits) {
|
||||||
uasm_i_ld(p, tmp, 0, ptep); /* get even pte */
|
uasm_i_ld(p, tmp, 0, ptep); /* get even pte */
|
||||||
uasm_i_ld(p, ptep, sizeof(pte_t), ptep); /* get odd pte */
|
uasm_i_ld(p, ptep, sizeof(pte_t), ptep); /* get odd pte */
|
||||||
if (kernel_uses_smartmips_rixi) {
|
if (cpu_has_rixi) {
|
||||||
UASM_i_SRL(p, tmp, tmp, ilog2(_PAGE_NO_EXEC));
|
UASM_i_SRL(p, tmp, tmp, ilog2(_PAGE_NO_EXEC));
|
||||||
UASM_i_SRL(p, ptep, ptep, ilog2(_PAGE_NO_EXEC));
|
UASM_i_SRL(p, ptep, ptep, ilog2(_PAGE_NO_EXEC));
|
||||||
UASM_i_ROTR(p, tmp, tmp, ilog2(_PAGE_GLOBAL) - ilog2(_PAGE_NO_EXEC));
|
UASM_i_ROTR(p, tmp, tmp, ilog2(_PAGE_GLOBAL) - ilog2(_PAGE_NO_EXEC));
|
||||||
|
@ -1017,7 +1017,7 @@ static void __cpuinit build_update_entries(u32 **p, unsigned int tmp,
|
||||||
UASM_i_LW(p, ptep, sizeof(pte_t), ptep); /* get odd pte */
|
UASM_i_LW(p, ptep, sizeof(pte_t), ptep); /* get odd pte */
|
||||||
if (r45k_bvahwbug())
|
if (r45k_bvahwbug())
|
||||||
build_tlb_probe_entry(p);
|
build_tlb_probe_entry(p);
|
||||||
if (kernel_uses_smartmips_rixi) {
|
if (cpu_has_rixi) {
|
||||||
UASM_i_SRL(p, tmp, tmp, ilog2(_PAGE_NO_EXEC));
|
UASM_i_SRL(p, tmp, tmp, ilog2(_PAGE_NO_EXEC));
|
||||||
UASM_i_SRL(p, ptep, ptep, ilog2(_PAGE_NO_EXEC));
|
UASM_i_SRL(p, ptep, ptep, ilog2(_PAGE_NO_EXEC));
|
||||||
UASM_i_ROTR(p, tmp, tmp, ilog2(_PAGE_GLOBAL) - ilog2(_PAGE_NO_EXEC));
|
UASM_i_ROTR(p, tmp, tmp, ilog2(_PAGE_GLOBAL) - ilog2(_PAGE_NO_EXEC));
|
||||||
|
@ -1183,7 +1183,7 @@ build_fast_tlb_refill_handler (u32 **p, struct uasm_label **l,
|
||||||
UASM_i_LW(p, even, 0, ptr); /* get even pte */
|
UASM_i_LW(p, even, 0, ptr); /* get even pte */
|
||||||
UASM_i_LW(p, odd, sizeof(pte_t), ptr); /* get odd pte */
|
UASM_i_LW(p, odd, sizeof(pte_t), ptr); /* get odd pte */
|
||||||
}
|
}
|
||||||
if (kernel_uses_smartmips_rixi) {
|
if (cpu_has_rixi) {
|
||||||
uasm_i_dsrl_safe(p, even, even, ilog2(_PAGE_NO_EXEC));
|
uasm_i_dsrl_safe(p, even, even, ilog2(_PAGE_NO_EXEC));
|
||||||
uasm_i_dsrl_safe(p, odd, odd, ilog2(_PAGE_NO_EXEC));
|
uasm_i_dsrl_safe(p, odd, odd, ilog2(_PAGE_NO_EXEC));
|
||||||
uasm_i_drotr(p, even, even,
|
uasm_i_drotr(p, even, even,
|
||||||
|
@ -1545,7 +1545,7 @@ build_pte_present(u32 **p, struct uasm_reloc **r,
|
||||||
{
|
{
|
||||||
int t = scratch >= 0 ? scratch : pte;
|
int t = scratch >= 0 ? scratch : pte;
|
||||||
|
|
||||||
if (kernel_uses_smartmips_rixi) {
|
if (cpu_has_rixi) {
|
||||||
if (use_bbit_insns()) {
|
if (use_bbit_insns()) {
|
||||||
uasm_il_bbit0(p, r, pte, ilog2(_PAGE_PRESENT), lid);
|
uasm_il_bbit0(p, r, pte, ilog2(_PAGE_PRESENT), lid);
|
||||||
uasm_i_nop(p);
|
uasm_i_nop(p);
|
||||||
|
@ -1875,7 +1875,7 @@ static void __cpuinit build_r4000_tlb_load_handler(void)
|
||||||
if (m4kc_tlbp_war())
|
if (m4kc_tlbp_war())
|
||||||
build_tlb_probe_entry(&p);
|
build_tlb_probe_entry(&p);
|
||||||
|
|
||||||
if (kernel_uses_smartmips_rixi) {
|
if (cpu_has_rixi) {
|
||||||
/*
|
/*
|
||||||
* If the page is not _PAGE_VALID, RI or XI could not
|
* If the page is not _PAGE_VALID, RI or XI could not
|
||||||
* have triggered it. Skip the expensive test..
|
* have triggered it. Skip the expensive test..
|
||||||
|
@ -1929,7 +1929,7 @@ static void __cpuinit build_r4000_tlb_load_handler(void)
|
||||||
build_pte_present(&p, &r, wr.r1, wr.r2, wr.r3, label_nopage_tlbl);
|
build_pte_present(&p, &r, wr.r1, wr.r2, wr.r3, label_nopage_tlbl);
|
||||||
build_tlb_probe_entry(&p);
|
build_tlb_probe_entry(&p);
|
||||||
|
|
||||||
if (kernel_uses_smartmips_rixi) {
|
if (cpu_has_rixi) {
|
||||||
/*
|
/*
|
||||||
* If the page is not _PAGE_VALID, RI or XI could not
|
* If the page is not _PAGE_VALID, RI or XI could not
|
||||||
* have triggered it. Skip the expensive test..
|
* have triggered it. Skip the expensive test..
|
||||||
|
|
Загрузка…
Ссылка в новой задаче