Merge branch 'p2v' into devel
Conflicts: arch/arm/kernel/module.c arch/arm/mach-s5pv210/sleep.S
This commit is contained in:
Коммит
05e3475451
|
@ -190,6 +190,22 @@ config VECTORS_BASE
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help
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The base address of exception vectors.
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config ARM_PATCH_PHYS_VIRT
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bool "Patch physical to virtual translations at runtime (EXPERIMENTAL)"
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depends on EXPERIMENTAL
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depends on !XIP_KERNEL && MMU
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depends on !ARCH_REALVIEW || !SPARSEMEM
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help
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Patch phys-to-virt translation functions at runtime according to
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the position of the kernel in system memory.
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This can only be used with non-XIP with MMU kernels where
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the base of physical memory is at a 16MB boundary.
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config ARM_PATCH_PHYS_VIRT_16BIT
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def_bool y
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depends on ARM_PATCH_PHYS_VIRT && ARCH_MSM
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source "init/Kconfig"
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source "kernel/Kconfig.freezer"
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|
|
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@ -15,6 +15,7 @@
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#include <linux/compiler.h>
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#include <linux/const.h>
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#include <linux/types.h>
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#include <mach/memory.h>
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#include <asm/sizes.h>
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@ -132,21 +133,11 @@
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#define DTCM_OFFSET UL(0xfffe8000)
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#endif
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/*
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* Physical vs virtual RAM address space conversion. These are
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* private definitions which should NOT be used outside memory.h
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* files. Use virt_to_phys/phys_to_virt/__pa/__va instead.
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*/
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#ifndef __virt_to_phys
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#define __virt_to_phys(x) ((x) - PAGE_OFFSET + PHYS_OFFSET)
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#define __phys_to_virt(x) ((x) - PHYS_OFFSET + PAGE_OFFSET)
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#endif
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/*
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* Convert a physical address to a Page Frame Number and back
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*/
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||||
#define __phys_to_pfn(paddr) ((paddr) >> PAGE_SHIFT)
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#define __pfn_to_phys(pfn) ((pfn) << PAGE_SHIFT)
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#define __phys_to_pfn(paddr) ((unsigned long)((paddr) >> PAGE_SHIFT))
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#define __pfn_to_phys(pfn) ((phys_addr_t)(pfn) << PAGE_SHIFT)
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/*
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* Convert a page to/from a physical address
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@ -156,6 +147,62 @@
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#ifndef __ASSEMBLY__
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/*
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* Physical vs virtual RAM address space conversion. These are
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* private definitions which should NOT be used outside memory.h
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* files. Use virt_to_phys/phys_to_virt/__pa/__va instead.
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*/
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#ifndef __virt_to_phys
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#ifdef CONFIG_ARM_PATCH_PHYS_VIRT
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/*
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* Constants used to force the right instruction encodings and shifts
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* so that all we need to do is modify the 8-bit constant field.
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*/
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#define __PV_BITS_31_24 0x81000000
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#define __PV_BITS_23_16 0x00810000
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extern unsigned long __pv_phys_offset;
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#define PHYS_OFFSET __pv_phys_offset
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#define __pv_stub(from,to,instr,type) \
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__asm__("@ __pv_stub\n" \
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"1: " instr " %0, %1, %2\n" \
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" .pushsection .pv_table,\"a\"\n" \
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" .long 1b\n" \
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" .popsection\n" \
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: "=r" (to) \
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: "r" (from), "I" (type))
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static inline unsigned long __virt_to_phys(unsigned long x)
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{
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unsigned long t;
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__pv_stub(x, t, "add", __PV_BITS_31_24);
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#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT
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__pv_stub(t, t, "add", __PV_BITS_23_16);
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#endif
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return t;
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}
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static inline unsigned long __phys_to_virt(unsigned long x)
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{
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unsigned long t;
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__pv_stub(x, t, "sub", __PV_BITS_31_24);
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#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT
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__pv_stub(t, t, "sub", __PV_BITS_23_16);
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#endif
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return t;
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}
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#else
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#define __virt_to_phys(x) ((x) - PAGE_OFFSET + PHYS_OFFSET)
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#define __phys_to_virt(x) ((x) - PHYS_OFFSET + PAGE_OFFSET)
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#endif
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#endif
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#ifndef PHYS_OFFSET
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#define PHYS_OFFSET PLAT_PHYS_OFFSET
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#endif
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/*
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* The DMA mask corresponding to the maximum bus address allocatable
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* using GFP_DMA. The default here places no restriction on DMA
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|
@ -188,12 +235,12 @@
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* translation for translating DMA addresses. Use the driver
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* DMA support - see dma-mapping.h.
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*/
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static inline unsigned long virt_to_phys(const volatile void *x)
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static inline phys_addr_t virt_to_phys(const volatile void *x)
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{
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return __virt_to_phys((unsigned long)(x));
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}
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static inline void *phys_to_virt(unsigned long x)
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static inline void *phys_to_virt(phys_addr_t x)
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{
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return (void *)(__phys_to_virt((unsigned long)(x)));
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}
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|
|
|
@ -25,8 +25,31 @@ struct mod_arch_specific {
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};
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/*
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* Include the ARM architecture version.
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* Add the ARM architecture version to the version magic string
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*/
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#define MODULE_ARCH_VERMAGIC "ARMv" __stringify(__LINUX_ARM_ARCH__) " "
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#define MODULE_ARCH_VERMAGIC_ARMVSN "ARMv" __stringify(__LINUX_ARM_ARCH__) " "
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/* Add __virt_to_phys patching state as well */
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#ifdef CONFIG_ARM_PATCH_PHYS_VIRT
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#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT
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#define MODULE_ARCH_VERMAGIC_P2V "p2v16 "
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#else
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#define MODULE_ARCH_VERMAGIC_P2V "p2v8 "
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#endif
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#else
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#define MODULE_ARCH_VERMAGIC_P2V ""
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#endif
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/* Add instruction set architecture tag to distinguish ARM/Thumb kernels */
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#ifdef CONFIG_THUMB2_KERNEL
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#define MODULE_ARCH_VERMAGIC_ARMTHUMB "thumb2 "
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#else
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#define MODULE_ARCH_VERMAGIC_ARMTHUMB ""
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#endif
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#define MODULE_ARCH_VERMAGIC \
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MODULE_ARCH_VERMAGIC_ARMVSN \
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MODULE_ARCH_VERMAGIC_ARMTHUMB \
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MODULE_ARCH_VERMAGIC_P2V
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|
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#endif /* _ASM_ARM_MODULE_H */
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|
|
|
@ -164,3 +164,7 @@ EXPORT_SYMBOL(mcount);
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|||
#endif
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EXPORT_SYMBOL(__gnu_mcount_nc);
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#endif
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#ifdef CONFIG_ARM_PATCH_PHYS_VIRT
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EXPORT_SYMBOL(__pv_phys_offset);
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#endif
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|
|
@ -26,14 +26,6 @@
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#include <mach/debug-macro.S>
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#endif
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#if (PHYS_OFFSET & 0x001fffff)
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#error "PHYS_OFFSET must be at an even 2MiB boundary!"
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#endif
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#define KERNEL_RAM_VADDR (PAGE_OFFSET + TEXT_OFFSET)
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#define KERNEL_RAM_PADDR (PHYS_OFFSET + TEXT_OFFSET)
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/*
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* swapper_pg_dir is the virtual address of the initial page table.
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* We place the page tables 16K below KERNEL_RAM_VADDR. Therefore, we must
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@ -41,6 +33,7 @@
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* the least significant 16 bits to be 0x8000, but we could probably
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* relax this restriction to KERNEL_RAM_VADDR >= PAGE_OFFSET + 0x4000.
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*/
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#define KERNEL_RAM_VADDR (PAGE_OFFSET + TEXT_OFFSET)
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#if (KERNEL_RAM_VADDR & 0xffff) != 0x8000
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#error KERNEL_RAM_VADDR must start at 0xXXXX8000
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#endif
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|
@ -48,8 +41,8 @@
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.globl swapper_pg_dir
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.equ swapper_pg_dir, KERNEL_RAM_VADDR - 0x4000
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.macro pgtbl, rd
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ldr \rd, =(KERNEL_RAM_PADDR - 0x4000)
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.macro pgtbl, rd, phys
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add \rd, \phys, #TEXT_OFFSET - 0x4000
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.endm
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#ifdef CONFIG_XIP_KERNEL
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@ -88,13 +81,25 @@ ENTRY(stext)
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THUMB( it eq ) @ force fixup-able long branch encoding
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beq __error_p @ yes, error 'p'
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#ifndef CONFIG_XIP_KERNEL
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adr r3, 2f
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ldmia r3, {r4, r8}
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sub r4, r3, r4 @ (PHYS_OFFSET - PAGE_OFFSET)
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add r8, r8, r4 @ PHYS_OFFSET
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#else
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ldr r8, =PLAT_PHYS_OFFSET
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#endif
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/*
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* r1 = machine no, r2 = atags,
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* r9 = cpuid, r10 = procinfo
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* r8 = phys_offset, r9 = cpuid, r10 = procinfo
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*/
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bl __vet_atags
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#ifdef CONFIG_SMP_ON_UP
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bl __fixup_smp
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#endif
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#ifdef CONFIG_ARM_PATCH_PHYS_VIRT
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bl __fixup_pv_table
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#endif
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bl __create_page_tables
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@ -114,21 +119,24 @@ ENTRY(stext)
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1: b __enable_mmu
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ENDPROC(stext)
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.ltorg
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#ifndef CONFIG_XIP_KERNEL
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2: .long .
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.long PAGE_OFFSET
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#endif
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/*
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* Setup the initial page tables. We only setup the barest
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* amount which are required to get the kernel running, which
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* generally means mapping in the kernel code.
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*
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* r9 = cpuid
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* r10 = procinfo
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* r8 = phys_offset, r9 = cpuid, r10 = procinfo
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*
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* Returns:
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* r0, r3, r5-r7 corrupted
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* r4 = physical page table address
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*/
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__create_page_tables:
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pgtbl r4 @ page table address
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pgtbl r4, r8 @ page table address
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/*
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* Clear the 16K level 1 swapper page table
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|
@ -184,10 +192,8 @@ __create_page_tables:
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/*
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* Map some ram to cover our .data and .bss areas.
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*/
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orr r3, r7, #(KERNEL_RAM_PADDR & 0xff000000)
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.if (KERNEL_RAM_PADDR & 0x00f00000)
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orr r3, r3, #(KERNEL_RAM_PADDR & 0x00f00000)
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.endif
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add r3, r8, #TEXT_OFFSET
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orr r3, r3, r7
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add r0, r4, #(KERNEL_RAM_VADDR & 0xff000000) >> 18
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str r3, [r0, #(KERNEL_RAM_VADDR & 0x00f00000) >> 18]!
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ldr r6, =(_end - 1)
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|
@ -200,14 +206,17 @@ __create_page_tables:
|
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#endif
|
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|
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/*
|
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* Then map first 1MB of ram in case it contains our boot params.
|
||||
* Then map boot params address in r2 or
|
||||
* the first 1MB of ram if boot params address is not specified.
|
||||
*/
|
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add r0, r4, #PAGE_OFFSET >> 18
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orr r6, r7, #(PHYS_OFFSET & 0xff000000)
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.if (PHYS_OFFSET & 0x00f00000)
|
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orr r6, r6, #(PHYS_OFFSET & 0x00f00000)
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.endif
|
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str r6, [r0]
|
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mov r0, r2, lsr #20
|
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movs r0, r0, lsl #20
|
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moveq r0, r8
|
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sub r3, r0, r8
|
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add r3, r3, #PAGE_OFFSET
|
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add r3, r4, r3, lsr #18
|
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orr r6, r7, r0
|
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str r6, [r3]
|
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|
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#ifdef CONFIG_DEBUG_LL
|
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#ifndef CONFIG_DEBUG_ICEDCC
|
||||
|
@ -452,4 +461,129 @@ ENTRY(fixup_smp)
|
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ldmfd sp!, {r4 - r6, pc}
|
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ENDPROC(fixup_smp)
|
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|
||||
#ifdef CONFIG_ARM_PATCH_PHYS_VIRT
|
||||
|
||||
/* __fixup_pv_table - patch the stub instructions with the delta between
|
||||
* PHYS_OFFSET and PAGE_OFFSET, which is assumed to be 16MiB aligned and
|
||||
* can be expressed by an immediate shifter operand. The stub instruction
|
||||
* has a form of '(add|sub) rd, rn, #imm'.
|
||||
*/
|
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__HEAD
|
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__fixup_pv_table:
|
||||
adr r0, 1f
|
||||
ldmia r0, {r3-r5, r7}
|
||||
sub r3, r0, r3 @ PHYS_OFFSET - PAGE_OFFSET
|
||||
add r4, r4, r3 @ adjust table start address
|
||||
add r5, r5, r3 @ adjust table end address
|
||||
add r7, r7, r3 @ adjust __pv_phys_offset address
|
||||
str r8, [r7] @ save computed PHYS_OFFSET to __pv_phys_offset
|
||||
#ifndef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT
|
||||
mov r6, r3, lsr #24 @ constant for add/sub instructions
|
||||
teq r3, r6, lsl #24 @ must be 16MiB aligned
|
||||
#else
|
||||
mov r6, r3, lsr #16 @ constant for add/sub instructions
|
||||
teq r3, r6, lsl #16 @ must be 64kiB aligned
|
||||
#endif
|
||||
THUMB( it ne @ cross section branch )
|
||||
bne __error
|
||||
str r6, [r7, #4] @ save to __pv_offset
|
||||
b __fixup_a_pv_table
|
||||
ENDPROC(__fixup_pv_table)
|
||||
|
||||
.align
|
||||
1: .long .
|
||||
.long __pv_table_begin
|
||||
.long __pv_table_end
|
||||
2: .long __pv_phys_offset
|
||||
|
||||
.text
|
||||
__fixup_a_pv_table:
|
||||
#ifdef CONFIG_THUMB2_KERNEL
|
||||
#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT
|
||||
lsls r0, r6, #24
|
||||
lsr r6, #8
|
||||
beq 1f
|
||||
clz r7, r0
|
||||
lsr r0, #24
|
||||
lsl r0, r7
|
||||
bic r0, 0x0080
|
||||
lsrs r7, #1
|
||||
orrcs r0, #0x0080
|
||||
orr r0, r0, r7, lsl #12
|
||||
#endif
|
||||
1: lsls r6, #24
|
||||
beq 4f
|
||||
clz r7, r6
|
||||
lsr r6, #24
|
||||
lsl r6, r7
|
||||
bic r6, #0x0080
|
||||
lsrs r7, #1
|
||||
orrcs r6, #0x0080
|
||||
orr r6, r6, r7, lsl #12
|
||||
orr r6, #0x4000
|
||||
b 4f
|
||||
2: @ at this point the C flag is always clear
|
||||
add r7, r3
|
||||
#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT
|
||||
ldrh ip, [r7]
|
||||
tst ip, 0x0400 @ the i bit tells us LS or MS byte
|
||||
beq 3f
|
||||
cmp r0, #0 @ set C flag, and ...
|
||||
biceq ip, 0x0400 @ immediate zero value has a special encoding
|
||||
streqh ip, [r7] @ that requires the i bit cleared
|
||||
#endif
|
||||
3: ldrh ip, [r7, #2]
|
||||
and ip, 0x8f00
|
||||
orrcc ip, r6 @ mask in offset bits 31-24
|
||||
orrcs ip, r0 @ mask in offset bits 23-16
|
||||
strh ip, [r7, #2]
|
||||
4: cmp r4, r5
|
||||
ldrcc r7, [r4], #4 @ use branch for delay slot
|
||||
bcc 2b
|
||||
bx lr
|
||||
#else
|
||||
#ifdef CONFIG_ARM_PATCH_PHYS_VIRT_16BIT
|
||||
and r0, r6, #255 @ offset bits 23-16
|
||||
mov r6, r6, lsr #8 @ offset bits 31-24
|
||||
#else
|
||||
mov r0, #0 @ just in case...
|
||||
#endif
|
||||
b 3f
|
||||
2: ldr ip, [r7, r3]
|
||||
bic ip, ip, #0x000000ff
|
||||
tst ip, #0x400 @ rotate shift tells us LS or MS byte
|
||||
orrne ip, ip, r6 @ mask in offset bits 31-24
|
||||
orreq ip, ip, r0 @ mask in offset bits 23-16
|
||||
str ip, [r7, r3]
|
||||
3: cmp r4, r5
|
||||
ldrcc r7, [r4], #4 @ use branch for delay slot
|
||||
bcc 2b
|
||||
mov pc, lr
|
||||
#endif
|
||||
ENDPROC(__fixup_a_pv_table)
|
||||
|
||||
ENTRY(fixup_pv_table)
|
||||
stmfd sp!, {r4 - r7, lr}
|
||||
ldr r2, 2f @ get address of __pv_phys_offset
|
||||
mov r3, #0 @ no offset
|
||||
mov r4, r0 @ r0 = table start
|
||||
add r5, r0, r1 @ r1 = table size
|
||||
ldr r6, [r2, #4] @ get __pv_offset
|
||||
bl __fixup_a_pv_table
|
||||
ldmfd sp!, {r4 - r7, pc}
|
||||
ENDPROC(fixup_pv_table)
|
||||
|
||||
.align
|
||||
2: .long __pv_phys_offset
|
||||
|
||||
.data
|
||||
.globl __pv_phys_offset
|
||||
.type __pv_phys_offset, %object
|
||||
__pv_phys_offset:
|
||||
.long 0
|
||||
.size __pv_phys_offset, . - __pv_phys_offset
|
||||
__pv_offset:
|
||||
.long 0
|
||||
#endif
|
||||
|
||||
#include "head-common.S"
|
||||
|
|
|
@ -283,12 +283,13 @@ static const Elf_Shdr *find_mod_section(const Elf32_Ehdr *hdr,
|
|||
return NULL;
|
||||
}
|
||||
|
||||
extern void fixup_pv_table(const void *, unsigned long);
|
||||
extern void fixup_smp(const void *, unsigned long);
|
||||
|
||||
int module_finalize(const Elf32_Ehdr *hdr, const Elf_Shdr *sechdrs,
|
||||
struct module *mod)
|
||||
{
|
||||
const Elf_Shdr * __maybe_unused s = NULL;
|
||||
const Elf_Shdr *s = NULL;
|
||||
#ifdef CONFIG_ARM_UNWIND
|
||||
const char *secstrs = (void *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
|
||||
const Elf_Shdr *sechdrs_end = sechdrs + hdr->e_shnum;
|
||||
|
@ -332,6 +333,11 @@ int module_finalize(const Elf32_Ehdr *hdr, const Elf_Shdr *sechdrs,
|
|||
maps[i].unw_sec->sh_size,
|
||||
maps[i].txt_sec->sh_addr,
|
||||
maps[i].txt_sec->sh_size);
|
||||
#endif
|
||||
#ifdef CONFIG_ARM_PATCH_PHYS_VIRT
|
||||
s = find_mod_section(hdr, sechdrs, ".pv_table");
|
||||
if (s)
|
||||
fixup_pv_table((void *)s->sh_addr, s->sh_size);
|
||||
#endif
|
||||
s = find_mod_section(hdr, sechdrs, ".alt.smp.init");
|
||||
if (s && !is_smp())
|
||||
|
|
|
@ -325,28 +325,6 @@ static void __init early_print(const char *str, ...)
|
|||
printk("%s", buf);
|
||||
}
|
||||
|
||||
static struct machine_desc * __init lookup_machine_type(unsigned int type)
|
||||
{
|
||||
extern struct machine_desc __arch_info_begin[], __arch_info_end[];
|
||||
struct machine_desc *p;
|
||||
|
||||
for (p = __arch_info_begin; p < __arch_info_end; p++)
|
||||
if (type == p->nr)
|
||||
return p;
|
||||
|
||||
early_print("\n"
|
||||
"Error: unrecognized/unsupported machine ID (r1 = 0x%08x).\n\n"
|
||||
"Available machine support:\n\nID (hex)\tNAME\n", type);
|
||||
|
||||
for (p = __arch_info_begin; p < __arch_info_end; p++)
|
||||
early_print("%08x\t%s\n", p->nr, p->name);
|
||||
|
||||
early_print("\nPlease check your kernel config and/or bootloader.\n");
|
||||
|
||||
while (true)
|
||||
/* can't use cpu_relax() here as it may require MMU setup */;
|
||||
}
|
||||
|
||||
static void __init feat_v6_fixup(void)
|
||||
{
|
||||
int id = read_cpuid_id();
|
||||
|
@ -463,21 +441,29 @@ void cpu_init(void)
|
|||
|
||||
static struct machine_desc * __init setup_machine(unsigned int nr)
|
||||
{
|
||||
struct machine_desc *list;
|
||||
extern struct machine_desc __arch_info_begin[], __arch_info_end[];
|
||||
struct machine_desc *p;
|
||||
|
||||
/*
|
||||
* locate machine in the list of supported machines.
|
||||
*/
|
||||
list = lookup_machine_type(nr);
|
||||
if (!list) {
|
||||
printk("Machine configuration botched (nr %d), unable "
|
||||
"to continue.\n", nr);
|
||||
while (1);
|
||||
}
|
||||
for (p = __arch_info_begin; p < __arch_info_end; p++)
|
||||
if (nr == p->nr) {
|
||||
printk("Machine: %s\n", p->name);
|
||||
return p;
|
||||
}
|
||||
|
||||
printk("Machine: %s\n", list->name);
|
||||
early_print("\n"
|
||||
"Error: unrecognized/unsupported machine ID (r1 = 0x%08x).\n\n"
|
||||
"Available machine support:\n\nID (hex)\tNAME\n", nr);
|
||||
|
||||
return list;
|
||||
for (p = __arch_info_begin; p < __arch_info_end; p++)
|
||||
early_print("%08x\t%s\n", p->nr, p->name);
|
||||
|
||||
early_print("\nPlease check your kernel config and/or bootloader.\n");
|
||||
|
||||
while (true)
|
||||
/* can't use cpu_relax() here as it may require MMU setup */;
|
||||
}
|
||||
|
||||
static int __init arm_add_memory(unsigned long start, unsigned long size)
|
||||
|
@ -740,7 +726,7 @@ static struct init_tags {
|
|||
{ tag_size(tag_core), ATAG_CORE },
|
||||
{ 1, PAGE_SIZE, 0xff },
|
||||
{ tag_size(tag_mem32), ATAG_MEM },
|
||||
{ MEM_SIZE, PHYS_OFFSET },
|
||||
{ MEM_SIZE },
|
||||
{ 0, ATAG_NONE }
|
||||
};
|
||||
|
||||
|
@ -839,6 +825,8 @@ void __init setup_arch(char **cmdline_p)
|
|||
struct machine_desc *mdesc;
|
||||
char *from = default_command_line;
|
||||
|
||||
init_tags.mem.start = PHYS_OFFSET;
|
||||
|
||||
unwind_init();
|
||||
|
||||
setup_processor();
|
||||
|
@ -851,8 +839,25 @@ void __init setup_arch(char **cmdline_p)
|
|||
|
||||
if (__atags_pointer)
|
||||
tags = phys_to_virt(__atags_pointer);
|
||||
else if (mdesc->boot_params)
|
||||
tags = phys_to_virt(mdesc->boot_params);
|
||||
else if (mdesc->boot_params) {
|
||||
#ifdef CONFIG_MMU
|
||||
/*
|
||||
* We still are executing with a minimal MMU mapping created
|
||||
* with the presumption that the machine default for this
|
||||
* is located in the first MB of RAM. Anything else will
|
||||
* fault and silently hang the kernel at this point.
|
||||
*/
|
||||
if (mdesc->boot_params < PHYS_OFFSET ||
|
||||
mdesc->boot_params >= PHYS_OFFSET + SZ_1M) {
|
||||
printk(KERN_WARNING
|
||||
"Default boot params at physical 0x%08lx out of reach\n",
|
||||
mdesc->boot_params);
|
||||
} else
|
||||
#endif
|
||||
{
|
||||
tags = phys_to_virt(mdesc->boot_params);
|
||||
}
|
||||
}
|
||||
|
||||
#if defined(CONFIG_DEPRECATED_PARAM_STRUCT)
|
||||
/*
|
||||
|
|
|
@ -15,7 +15,7 @@
|
|||
#include <linux/string.h> /* memcpy */
|
||||
#include <asm/cputype.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <mach/memory.h>
|
||||
#include <asm/memory.h>
|
||||
#include "tcm.h"
|
||||
|
||||
static struct gen_pool *tcm_pool;
|
||||
|
|
|
@ -64,6 +64,10 @@ SECTIONS
|
|||
__smpalt_end = .;
|
||||
#endif
|
||||
|
||||
__pv_table_begin = .;
|
||||
*(.pv_table)
|
||||
__pv_table_end = .;
|
||||
|
||||
INIT_SETUP(16)
|
||||
|
||||
INIT_CALLS
|
||||
|
|
|
@ -12,6 +12,6 @@
|
|||
#define __ASM_ARCH_MEMORY_H
|
||||
|
||||
|
||||
#define PHYS_OFFSET UL(0xf0000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0xf0000000)
|
||||
|
||||
#endif /* __ASM_ARCH_MEMORY_H */
|
||||
|
|
|
@ -23,6 +23,6 @@
|
|||
|
||||
#include <mach/hardware.h>
|
||||
|
||||
#define PHYS_OFFSET (AT91_SDRAM_BASE)
|
||||
#define PLAT_PHYS_OFFSET (AT91_SDRAM_BASE)
|
||||
|
||||
#endif
|
||||
|
|
|
@ -31,7 +31,7 @@
|
|||
* *_SIZE is the size of the region
|
||||
* *_BASE is the virtual address
|
||||
*/
|
||||
#define RAM_START PHYS_OFFSET
|
||||
#define RAM_START PLAT_PHYS_OFFSET
|
||||
|
||||
#define RAM_SIZE (CFG_GLOBAL_RAM_SIZE-CFG_GLOBAL_RAM_SIZE_RESERVED)
|
||||
#define RAM_BASE PAGE_OFFSET
|
||||
|
|
|
@ -23,7 +23,7 @@
|
|||
* files. Use virt_to_phys/phys_to_virt/__pa/__va instead.
|
||||
*/
|
||||
|
||||
#define PHYS_OFFSET CFG_GLOBAL_RAM_BASE
|
||||
#define PLAT_PHYS_OFFSET CFG_GLOBAL_RAM_BASE
|
||||
|
||||
/*
|
||||
* Maximum DMA memory allowed is 14M
|
||||
|
|
|
@ -23,7 +23,7 @@
|
|||
/*
|
||||
* Physical DRAM offset.
|
||||
*/
|
||||
#define PHYS_OFFSET UL(0xc0000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0xc0000000)
|
||||
|
||||
#if !defined(CONFIG_ARCH_CDB89712) && !defined (CONFIG_ARCH_AUTCPU12)
|
||||
|
||||
|
|
|
@ -13,7 +13,7 @@
|
|||
/*
|
||||
* Physical DRAM offset.
|
||||
*/
|
||||
#define PHYS_OFFSET UL(0x00000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x00000000)
|
||||
|
||||
#define __phys_to_bus(x) ((x) + PHYS_OFFSET)
|
||||
#define __bus_to_phys(x) ((x) - PHYS_OFFSET)
|
||||
|
|
|
@ -26,9 +26,9 @@
|
|||
#if defined(CONFIG_ARCH_DAVINCI_DA8XX) && defined(CONFIG_ARCH_DAVINCI_DMx)
|
||||
#error Cannot enable DaVinci and DA8XX platforms concurrently
|
||||
#elif defined(CONFIG_ARCH_DAVINCI_DA8XX)
|
||||
#define PHYS_OFFSET DA8XX_DDR_BASE
|
||||
#define PLAT_PHYS_OFFSET DA8XX_DDR_BASE
|
||||
#else
|
||||
#define PHYS_OFFSET DAVINCI_DDR_BASE
|
||||
#define PLAT_PHYS_OFFSET DAVINCI_DDR_BASE
|
||||
#endif
|
||||
|
||||
#define DDR2_SDRCR_OFFSET 0xc
|
||||
|
|
|
@ -5,6 +5,6 @@
|
|||
#ifndef __ASM_ARCH_MEMORY_H
|
||||
#define __ASM_ARCH_MEMORY_H
|
||||
|
||||
#define PHYS_OFFSET UL(0x00000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x00000000)
|
||||
|
||||
#endif
|
||||
|
|
|
@ -19,7 +19,7 @@
|
|||
/*
|
||||
* Physical DRAM offset.
|
||||
*/
|
||||
#define PHYS_OFFSET UL(0x00000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x00000000)
|
||||
|
||||
/*
|
||||
* Cache flushing area - SRAM
|
||||
|
|
|
@ -6,15 +6,15 @@
|
|||
#define __ASM_ARCH_MEMORY_H
|
||||
|
||||
#if defined(CONFIG_EP93XX_SDCE3_SYNC_PHYS_OFFSET)
|
||||
#define PHYS_OFFSET UL(0x00000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x00000000)
|
||||
#elif defined(CONFIG_EP93XX_SDCE0_PHYS_OFFSET)
|
||||
#define PHYS_OFFSET UL(0xc0000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0xc0000000)
|
||||
#elif defined(CONFIG_EP93XX_SDCE1_PHYS_OFFSET)
|
||||
#define PHYS_OFFSET UL(0xd0000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0xd0000000)
|
||||
#elif defined(CONFIG_EP93XX_SDCE2_PHYS_OFFSET)
|
||||
#define PHYS_OFFSET UL(0xe0000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0xe0000000)
|
||||
#elif defined(CONFIG_EP93XX_SDCE3_ASYNC_PHYS_OFFSET)
|
||||
#define PHYS_OFFSET UL(0xf0000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0xf0000000)
|
||||
#else
|
||||
#error "Kconfig bug: No EP93xx PHYS_OFFSET set"
|
||||
#endif
|
||||
|
|
|
@ -62,7 +62,7 @@ extern unsigned long __bus_to_pfn(unsigned long);
|
|||
/*
|
||||
* Physical DRAM offset.
|
||||
*/
|
||||
#define PHYS_OFFSET UL(0x00000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x00000000)
|
||||
|
||||
#define FLUSH_BASE_PHYS 0x50000000
|
||||
|
||||
|
|
|
@ -11,9 +11,9 @@
|
|||
#define __MACH_MEMORY_H
|
||||
|
||||
#ifdef CONFIG_GEMINI_MEM_SWAP
|
||||
# define PHYS_OFFSET UL(0x00000000)
|
||||
# define PLAT_PHYS_OFFSET UL(0x00000000)
|
||||
#else
|
||||
# define PHYS_OFFSET UL(0x10000000)
|
||||
# define PLAT_PHYS_OFFSET UL(0x10000000)
|
||||
#endif
|
||||
|
||||
#endif /* __MACH_MEMORY_H */
|
||||
|
|
|
@ -7,7 +7,7 @@
|
|||
#ifndef __ASM_ARCH_MEMORY_H
|
||||
#define __ASM_ARCH_MEMORY_H
|
||||
|
||||
#define PHYS_OFFSET UL(0x40000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x40000000)
|
||||
/*
|
||||
* This is the maximum DMA address that can be DMAd to.
|
||||
* There should not be more than (0xd0000000 - 0xc0000000)
|
||||
|
|
|
@ -23,7 +23,7 @@
|
|||
/*
|
||||
* Physical DRAM offset.
|
||||
*/
|
||||
#define PHYS_OFFSET UL(0x00000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x00000000)
|
||||
|
||||
#define BUS_OFFSET UL(0x80000000)
|
||||
#define __virt_to_bus(x) ((x) - PAGE_OFFSET + BUS_OFFSET)
|
||||
|
|
|
@ -6,7 +6,7 @@
|
|||
/*
|
||||
* Physical DRAM offset.
|
||||
*/
|
||||
#define PHYS_OFFSET UL(0x00000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x00000000)
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
|
|
|
@ -8,6 +8,6 @@
|
|||
/*
|
||||
* Physical DRAM offset.
|
||||
*/
|
||||
#define PHYS_OFFSET UL(0xa0000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0xa0000000)
|
||||
|
||||
#endif
|
||||
|
|
|
@ -8,6 +8,6 @@
|
|||
/*
|
||||
* Physical DRAM offset.
|
||||
*/
|
||||
#define PHYS_OFFSET UL(0x00000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x00000000)
|
||||
|
||||
#endif
|
||||
|
|
|
@ -13,7 +13,7 @@
|
|||
#ifndef __ASM_ARCH_MEMORY_H
|
||||
#define __ASM_ARCH_MEMORY_H
|
||||
|
||||
#define PHYS_OFFSET UL(0x00000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x00000000)
|
||||
|
||||
#include <mach/ixp2000-regs.h>
|
||||
|
||||
|
|
|
@ -17,7 +17,7 @@
|
|||
/*
|
||||
* Physical DRAM offset.
|
||||
*/
|
||||
#define PHYS_OFFSET (0x00000000)
|
||||
#define PLAT_PHYS_OFFSET (0x00000000)
|
||||
|
||||
#define IXP23XX_PCI_SDRAM_OFFSET (*((volatile int *)IXP23XX_PCI_SDRAM_BAR) & 0xfffffff0)
|
||||
|
||||
|
|
|
@ -12,7 +12,7 @@
|
|||
/*
|
||||
* Physical DRAM offset.
|
||||
*/
|
||||
#define PHYS_OFFSET UL(0x00000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x00000000)
|
||||
|
||||
#if !defined(__ASSEMBLY__) && defined(CONFIG_PCI)
|
||||
|
||||
|
|
|
@ -5,6 +5,6 @@
|
|||
#ifndef __ASM_ARCH_MEMORY_H
|
||||
#define __ASM_ARCH_MEMORY_H
|
||||
|
||||
#define PHYS_OFFSET UL(0x00000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x00000000)
|
||||
|
||||
#endif
|
||||
|
|
|
@ -18,7 +18,7 @@
|
|||
/*
|
||||
* Physical SRAM offset.
|
||||
*/
|
||||
#define PHYS_OFFSET KS8695_SDRAM_PA
|
||||
#define PLAT_PHYS_OFFSET KS8695_SDRAM_PA
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
|
|
|
@ -17,7 +17,7 @@
|
|||
/*
|
||||
* Physical DRAM offset.
|
||||
*/
|
||||
#define PHYS_OFFSET UL(0xc0000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0xc0000000)
|
||||
|
||||
/*
|
||||
* Sparsemem version of the above
|
||||
|
|
|
@ -5,6 +5,6 @@
|
|||
#ifndef __ASM_ARCH_MEMORY_H
|
||||
#define __ASM_ARCH_MEMORY_H
|
||||
|
||||
#define PHYS_OFFSET UL(0x00000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x00000000)
|
||||
|
||||
#endif
|
||||
|
|
|
@ -22,6 +22,6 @@
|
|||
/*
|
||||
* Physical DRAM offset of bank 0
|
||||
*/
|
||||
#define PHYS_OFFSET UL(0x80000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x80000000)
|
||||
|
||||
#endif
|
||||
|
|
|
@ -9,6 +9,6 @@
|
|||
#ifndef __ASM_MACH_MEMORY_H
|
||||
#define __ASM_MACH_MEMORY_H
|
||||
|
||||
#define PHYS_OFFSET UL(0x00000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x00000000)
|
||||
|
||||
#endif /* __ASM_MACH_MEMORY_H */
|
||||
|
|
|
@ -132,7 +132,7 @@ static void __init msm7x2x_map_io(void)
|
|||
MACHINE_START(MSM7X27_SURF, "QCT MSM7x27 SURF")
|
||||
#ifdef CONFIG_MSM_DEBUG_UART
|
||||
#endif
|
||||
.boot_params = PHYS_OFFSET + 0x100,
|
||||
.boot_params = PLAT_PHYS_OFFSET + 0x100,
|
||||
.map_io = msm7x2x_map_io,
|
||||
.init_irq = msm7x2x_init_irq,
|
||||
.init_machine = msm7x2x_init,
|
||||
|
@ -142,7 +142,7 @@ MACHINE_END
|
|||
MACHINE_START(MSM7X27_FFA, "QCT MSM7x27 FFA")
|
||||
#ifdef CONFIG_MSM_DEBUG_UART
|
||||
#endif
|
||||
.boot_params = PHYS_OFFSET + 0x100,
|
||||
.boot_params = PLAT_PHYS_OFFSET + 0x100,
|
||||
.map_io = msm7x2x_map_io,
|
||||
.init_irq = msm7x2x_init_irq,
|
||||
.init_machine = msm7x2x_init,
|
||||
|
@ -152,7 +152,7 @@ MACHINE_END
|
|||
MACHINE_START(MSM7X25_SURF, "QCT MSM7x25 SURF")
|
||||
#ifdef CONFIG_MSM_DEBUG_UART
|
||||
#endif
|
||||
.boot_params = PHYS_OFFSET + 0x100,
|
||||
.boot_params = PLAT_PHYS_OFFSET + 0x100,
|
||||
.map_io = msm7x2x_map_io,
|
||||
.init_irq = msm7x2x_init_irq,
|
||||
.init_machine = msm7x2x_init,
|
||||
|
@ -162,7 +162,7 @@ MACHINE_END
|
|||
MACHINE_START(MSM7X25_FFA, "QCT MSM7x25 FFA")
|
||||
#ifdef CONFIG_MSM_DEBUG_UART
|
||||
#endif
|
||||
.boot_params = PHYS_OFFSET + 0x100,
|
||||
.boot_params = PLAT_PHYS_OFFSET + 0x100,
|
||||
.map_io = msm7x2x_map_io,
|
||||
.init_irq = msm7x2x_init_irq,
|
||||
.init_machine = msm7x2x_init,
|
||||
|
|
|
@ -26,11 +26,11 @@
|
|||
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/memory.h>
|
||||
#include <asm/setup.h>
|
||||
|
||||
#include <mach/gpio.h>
|
||||
#include <mach/board.h>
|
||||
#include <mach/memory.h>
|
||||
#include <mach/msm_iomap.h>
|
||||
#include <mach/dma.h>
|
||||
|
||||
|
@ -85,7 +85,7 @@ static void __init msm7x30_map_io(void)
|
|||
MACHINE_START(MSM7X30_SURF, "QCT MSM7X30 SURF")
|
||||
#ifdef CONFIG_MSM_DEBUG_UART
|
||||
#endif
|
||||
.boot_params = PHYS_OFFSET + 0x100,
|
||||
.boot_params = PLAT_PHYS_OFFSET + 0x100,
|
||||
.map_io = msm7x30_map_io,
|
||||
.init_irq = msm7x30_init_irq,
|
||||
.init_machine = msm7x30_init,
|
||||
|
@ -95,7 +95,7 @@ MACHINE_END
|
|||
MACHINE_START(MSM7X30_FFA, "QCT MSM7X30 FFA")
|
||||
#ifdef CONFIG_MSM_DEBUG_UART
|
||||
#endif
|
||||
.boot_params = PHYS_OFFSET + 0x100,
|
||||
.boot_params = PLAT_PHYS_OFFSET + 0x100,
|
||||
.map_io = msm7x30_map_io,
|
||||
.init_irq = msm7x30_init_irq,
|
||||
.init_machine = msm7x30_init,
|
||||
|
@ -105,7 +105,7 @@ MACHINE_END
|
|||
MACHINE_START(MSM7X30_FLUID, "QCT MSM7X30 FLUID")
|
||||
#ifdef CONFIG_MSM_DEBUG_UART
|
||||
#endif
|
||||
.boot_params = PHYS_OFFSET + 0x100,
|
||||
.boot_params = PLAT_PHYS_OFFSET + 0x100,
|
||||
.map_io = msm7x30_map_io,
|
||||
.init_irq = msm7x30_init_irq,
|
||||
.init_machine = msm7x30_init,
|
||||
|
|
|
@ -118,7 +118,7 @@ static void __init qsd8x50_init(void)
|
|||
MACHINE_START(QSD8X50_SURF, "QCT QSD8X50 SURF")
|
||||
#ifdef CONFIG_MSM_DEBUG_UART
|
||||
#endif
|
||||
.boot_params = PHYS_OFFSET + 0x100,
|
||||
.boot_params = PLAT_PHYS_OFFSET + 0x100,
|
||||
.map_io = qsd8x50_map_io,
|
||||
.init_irq = qsd8x50_init_irq,
|
||||
.init_machine = qsd8x50_init,
|
||||
|
@ -128,7 +128,7 @@ MACHINE_END
|
|||
MACHINE_START(QSD8X50A_ST1_5, "QCT QSD8X50A ST1.5")
|
||||
#ifdef CONFIG_MSM_DEBUG_UART
|
||||
#endif
|
||||
.boot_params = PHYS_OFFSET + 0x100,
|
||||
.boot_params = PLAT_PHYS_OFFSET + 0x100,
|
||||
.map_io = qsd8x50_map_io,
|
||||
.init_irq = qsd8x50_init_irq,
|
||||
.init_machine = qsd8x50_init,
|
||||
|
|
|
@ -107,7 +107,7 @@ MACHINE_START(SAPPHIRE, "sapphire")
|
|||
/* Maintainer: Brian Swetland <swetland@google.com> */
|
||||
#ifdef CONFIG_MSM_DEBUG_UART
|
||||
#endif
|
||||
.boot_params = PHYS_OFFSET + 0x100,
|
||||
.boot_params = PLAT_PHYS_OFFSET + 0x100,
|
||||
.fixup = sapphire_fixup,
|
||||
.map_io = sapphire_map_io,
|
||||
.init_irq = sapphire_init_irq,
|
||||
|
|
|
@ -18,15 +18,15 @@
|
|||
|
||||
/* physical offset of RAM */
|
||||
#if defined(CONFIG_ARCH_QSD8X50) && defined(CONFIG_MSM_SOC_REV_A)
|
||||
#define PHYS_OFFSET UL(0x00000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x00000000)
|
||||
#elif defined(CONFIG_ARCH_QSD8X50)
|
||||
#define PHYS_OFFSET UL(0x20000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x20000000)
|
||||
#elif defined(CONFIG_ARCH_MSM7X30)
|
||||
#define PHYS_OFFSET UL(0x00200000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x00200000)
|
||||
#elif defined(CONFIG_ARCH_MSM8X60)
|
||||
#define PHYS_OFFSET UL(0x40200000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x40200000)
|
||||
#else
|
||||
#define PHYS_OFFSET UL(0x10000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x10000000)
|
||||
#endif
|
||||
|
||||
#endif
|
||||
|
|
|
@ -5,6 +5,6 @@
|
|||
#ifndef __ASM_ARCH_MEMORY_H
|
||||
#define __ASM_ARCH_MEMORY_H
|
||||
|
||||
#define PHYS_OFFSET UL(0x00000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x00000000)
|
||||
|
||||
#endif
|
||||
|
|
|
@ -27,6 +27,7 @@
|
|||
|
||||
#include <asm/irq.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/memory.h>
|
||||
#include <asm/setup.h>
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/mach/irq.h>
|
||||
|
@ -36,7 +37,6 @@
|
|||
#include <mach/clock.h>
|
||||
#include <mach/common.h>
|
||||
#include <mach/iomux-mx3.h>
|
||||
#include <mach/memory.h>
|
||||
|
||||
#include "devices-imx31.h"
|
||||
#include "devices.h"
|
||||
|
|
|
@ -20,7 +20,7 @@
|
|||
#ifndef __ASM_ARCH_MEMORY_H
|
||||
#define __ASM_ARCH_MEMORY_H
|
||||
|
||||
#define PHYS_OFFSET UL(0x80000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x80000000)
|
||||
|
||||
#endif
|
||||
|
||||
|
|
|
@ -23,6 +23,6 @@
|
|||
/*
|
||||
* Physical DRAM offset.
|
||||
*/
|
||||
#define PHYS_OFFSET UL(0x00000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x00000000)
|
||||
|
||||
#endif
|
||||
|
|
|
@ -19,6 +19,6 @@
|
|||
#define NS9XXX_CS2STAT_LENGTH UL(0x1000)
|
||||
#define NS9XXX_CS3STAT_LENGTH UL(0x1000)
|
||||
|
||||
#define PHYS_OFFSET UL(0x00000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x00000000)
|
||||
|
||||
#endif
|
||||
|
|
|
@ -16,6 +16,6 @@
|
|||
#ifndef __ASM_ARCH_MEMORY_H
|
||||
#define __ASM_ARCH_MEMORY_H
|
||||
|
||||
#define PHYS_OFFSET UL(0x00000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x00000000)
|
||||
|
||||
#endif
|
||||
|
|
|
@ -17,6 +17,9 @@
|
|||
|
||||
#include <plat/serial.h>
|
||||
|
||||
#define omap_uart_v2p(x) ((x) - PAGE_OFFSET + PLAT_PHYS_OFFSET)
|
||||
#define omap_uart_p2v(x) ((x) - PLAT_PHYS_OFFSET + PAGE_OFFSET)
|
||||
|
||||
.pushsection .data
|
||||
omap_uart_phys: .word 0x0
|
||||
omap_uart_virt: .word 0x0
|
||||
|
@ -33,7 +36,7 @@ omap_uart_virt: .word 0x0
|
|||
/* Use omap_uart_phys/virt if already configured */
|
||||
9: mrc p15, 0, \rp, c1, c0
|
||||
tst \rp, #1 @ MMU enabled?
|
||||
ldreq \rp, =__virt_to_phys(omap_uart_phys) @ MMU not enabled
|
||||
ldreq \rp, =omap_uart_v2p(omap_uart_phys) @ MMU disabled
|
||||
ldrne \rp, =omap_uart_phys @ MMU enabled
|
||||
add \rv, \rp, #4 @ omap_uart_virt
|
||||
ldr \rp, [\rp, #0]
|
||||
|
@ -46,7 +49,7 @@ omap_uart_virt: .word 0x0
|
|||
mrc p15, 0, \rp, c1, c0
|
||||
tst \rp, #1 @ MMU enabled?
|
||||
ldreq \rp, =OMAP_UART_INFO @ MMU not enabled
|
||||
ldrne \rp, =__phys_to_virt(OMAP_UART_INFO) @ MMU enabled
|
||||
ldrne \rp, =omap_uart_p2v(OMAP_UART_INFO) @ MMU enabled
|
||||
ldr \rp, [\rp, #0]
|
||||
|
||||
/* Select the UART to use based on the UART1 scratchpad value */
|
||||
|
@ -73,7 +76,7 @@ omap_uart_virt: .word 0x0
|
|||
98: add \rp, \rp, #0xff000000 @ phys base
|
||||
mrc p15, 0, \rv, c1, c0
|
||||
tst \rv, #1 @ MMU enabled?
|
||||
ldreq \rv, =__virt_to_phys(omap_uart_phys) @ MMU not enabled
|
||||
ldreq \rv, =omap_uart_v2p(omap_uart_phys) @ MMU disabled
|
||||
ldrne \rv, =omap_uart_phys @ MMU enabled
|
||||
str \rp, [\rv, #0]
|
||||
sub \rp, \rp, #0xff000000 @ phys base
|
||||
|
|
|
@ -19,6 +19,9 @@
|
|||
|
||||
#define UART_OFFSET(addr) ((addr) & 0x00ffffff)
|
||||
|
||||
#define omap_uart_v2p(x) ((x) - PAGE_OFFSET + PLAT_PHYS_OFFSET)
|
||||
#define omap_uart_p2v(x) ((x) - PLAT_PHYS_OFFSET + PAGE_OFFSET)
|
||||
|
||||
.pushsection .data
|
||||
omap_uart_phys: .word 0
|
||||
omap_uart_virt: .word 0
|
||||
|
@ -36,7 +39,7 @@ omap_uart_lsr: .word 0
|
|||
/* Use omap_uart_phys/virt if already configured */
|
||||
10: mrc p15, 0, \rp, c1, c0
|
||||
tst \rp, #1 @ MMU enabled?
|
||||
ldreq \rp, =__virt_to_phys(omap_uart_phys) @ MMU not enabled
|
||||
ldreq \rp, =omap_uart_v2p(omap_uart_phys) @ MMU disabled
|
||||
ldrne \rp, =omap_uart_phys @ MMU enabled
|
||||
add \rv, \rp, #4 @ omap_uart_virt
|
||||
ldr \rp, [\rp, #0]
|
||||
|
@ -49,7 +52,7 @@ omap_uart_lsr: .word 0
|
|||
mrc p15, 0, \rp, c1, c0
|
||||
tst \rp, #1 @ MMU enabled?
|
||||
ldreq \rp, =OMAP_UART_INFO @ MMU not enabled
|
||||
ldrne \rp, =__phys_to_virt(OMAP_UART_INFO) @ MMU enabled
|
||||
ldrne \rp, =omap_uart_p2v(OMAP_UART_INFO) @ MMU enabled
|
||||
ldr \rp, [\rp, #0]
|
||||
|
||||
/* Select the UART to use based on the UART1 scratchpad value */
|
||||
|
@ -94,7 +97,7 @@ omap_uart_lsr: .word 0
|
|||
95: ldr \rp, =ZOOM_UART_BASE
|
||||
mrc p15, 0, \rv, c1, c0
|
||||
tst \rv, #1 @ MMU enabled?
|
||||
ldreq \rv, =__virt_to_phys(omap_uart_phys) @ MMU not enabled
|
||||
ldreq \rv, =omap_uart_v2p(omap_uart_phys) @ MMU disabled
|
||||
ldrne \rv, =omap_uart_phys @ MMU enabled
|
||||
str \rp, [\rv, #0]
|
||||
ldr \rp, =ZOOM_UART_VIRT
|
||||
|
@ -109,7 +112,7 @@ omap_uart_lsr: .word 0
|
|||
98: add \rp, \rp, #0x48000000 @ phys base
|
||||
mrc p15, 0, \rv, c1, c0
|
||||
tst \rv, #1 @ MMU enabled?
|
||||
ldreq \rv, =__virt_to_phys(omap_uart_phys) @ MMU not enabled
|
||||
ldreq \rv, =omap_uart_v2p(omap_uart_phys) @ MMU disabled
|
||||
ldrne \rv, =omap_uart_phys @ MMU enabled
|
||||
str \rp, [\rv, #0]
|
||||
sub \rp, \rp, #0x48000000 @ phys base
|
||||
|
@ -131,7 +134,7 @@ omap_uart_lsr: .word 0
|
|||
.macro busyuart,rd,rx
|
||||
1001: mrc p15, 0, \rd, c1, c0
|
||||
tst \rd, #1 @ MMU enabled?
|
||||
ldreq \rd, =__virt_to_phys(omap_uart_lsr) @ MMU not enabled
|
||||
ldreq \rd, =omap_uart_v2p(omap_uart_lsr) @ MMU disabled
|
||||
ldrne \rd, =omap_uart_lsr @ MMU enabled
|
||||
ldr \rd, [\rd, #0]
|
||||
ldrb \rd, [\rx, \rd]
|
||||
|
|
|
@ -7,6 +7,6 @@
|
|||
#ifndef __ASM_ARCH_MEMORY_H
|
||||
#define __ASM_ARCH_MEMORY_H
|
||||
|
||||
#define PHYS_OFFSET UL(0x00000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x00000000)
|
||||
|
||||
#endif
|
||||
|
|
|
@ -16,6 +16,6 @@
|
|||
/*
|
||||
* Physical DRAM offset.
|
||||
*/
|
||||
#define PHYS_OFFSET UL(0x80000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x80000000)
|
||||
|
||||
#endif
|
||||
|
|
|
@ -829,5 +829,5 @@ MACHINE_START(BALLOON3, "Balloon3")
|
|||
.init_irq = balloon3_init_irq,
|
||||
.timer = &pxa_timer,
|
||||
.init_machine = balloon3_init,
|
||||
.boot_params = PHYS_OFFSET + 0x100,
|
||||
.boot_params = PLAT_PHYS_OFFSET + 0x100,
|
||||
MACHINE_END
|
||||
|
|
|
@ -15,7 +15,7 @@
|
|||
/*
|
||||
* Physical DRAM offset.
|
||||
*/
|
||||
#define PHYS_OFFSET UL(0xa0000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0xa0000000)
|
||||
|
||||
#if !defined(__ASSEMBLY__) && defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI)
|
||||
void cmx2xx_pci_adjust_zones(unsigned long *size, unsigned long *holes);
|
||||
|
|
|
@ -24,9 +24,9 @@
|
|||
* Physical DRAM offset.
|
||||
*/
|
||||
#ifdef CONFIG_REALVIEW_HIGH_PHYS_OFFSET
|
||||
#define PHYS_OFFSET UL(0x70000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x70000000)
|
||||
#else
|
||||
#define PHYS_OFFSET UL(0x00000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x00000000)
|
||||
#endif
|
||||
|
||||
#if !defined(__ASSEMBLY__) && defined(CONFIG_ZONE_DMA)
|
||||
|
|
|
@ -484,7 +484,7 @@ static void __init realview_eb_init(void)
|
|||
|
||||
MACHINE_START(REALVIEW_EB, "ARM-RealView EB")
|
||||
/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
|
||||
.boot_params = PHYS_OFFSET + 0x00000100,
|
||||
.boot_params = PLAT_PHYS_OFFSET + 0x00000100,
|
||||
.fixup = realview_fixup,
|
||||
.map_io = realview_eb_map_io,
|
||||
.init_irq = gic_init_irq,
|
||||
|
|
|
@ -379,7 +379,7 @@ static void __init realview_pb1176_init(void)
|
|||
|
||||
MACHINE_START(REALVIEW_PB1176, "ARM-RealView PB1176")
|
||||
/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
|
||||
.boot_params = PHYS_OFFSET + 0x00000100,
|
||||
.boot_params = PLAT_PHYS_OFFSET + 0x00000100,
|
||||
.fixup = realview_pb1176_fixup,
|
||||
.map_io = realview_pb1176_map_io,
|
||||
.init_irq = gic_init_irq,
|
||||
|
|
|
@ -381,7 +381,7 @@ static void __init realview_pb11mp_init(void)
|
|||
|
||||
MACHINE_START(REALVIEW_PB11MP, "ARM-RealView PB11MPCore")
|
||||
/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
|
||||
.boot_params = PHYS_OFFSET + 0x00000100,
|
||||
.boot_params = PLAT_PHYS_OFFSET + 0x00000100,
|
||||
.fixup = realview_fixup,
|
||||
.map_io = realview_pb11mp_map_io,
|
||||
.init_irq = gic_init_irq,
|
||||
|
|
|
@ -331,7 +331,7 @@ static void __init realview_pba8_init(void)
|
|||
|
||||
MACHINE_START(REALVIEW_PBA8, "ARM-RealView PB-A8")
|
||||
/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
|
||||
.boot_params = PHYS_OFFSET + 0x00000100,
|
||||
.boot_params = PLAT_PHYS_OFFSET + 0x00000100,
|
||||
.fixup = realview_fixup,
|
||||
.map_io = realview_pba8_map_io,
|
||||
.init_irq = gic_init_irq,
|
||||
|
|
|
@ -414,7 +414,7 @@ static void __init realview_pbx_init(void)
|
|||
|
||||
MACHINE_START(REALVIEW_PBX, "ARM-RealView PBX")
|
||||
/* Maintainer: ARM Ltd/Deep Blue Solutions Ltd */
|
||||
.boot_params = PHYS_OFFSET + 0x00000100,
|
||||
.boot_params = PLAT_PHYS_OFFSET + 0x00000100,
|
||||
.fixup = realview_pbx_fixup,
|
||||
.map_io = realview_pbx_map_io,
|
||||
.init_irq = gic_init_irq,
|
||||
|
|
|
@ -21,7 +21,7 @@
|
|||
/*
|
||||
* Physical DRAM offset.
|
||||
*/
|
||||
#define PHYS_OFFSET UL(0x10000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x10000000)
|
||||
|
||||
/*
|
||||
* Cache flushing area - ROM
|
||||
|
|
|
@ -15,6 +15,6 @@
|
|||
#ifndef __ASM_ARCH_MEMORY_H
|
||||
#define __ASM_ARCH_MEMORY_H
|
||||
|
||||
#define PHYS_OFFSET UL(0x0C000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x0C000000)
|
||||
|
||||
#endif
|
||||
|
|
|
@ -11,6 +11,6 @@
|
|||
#ifndef __ASM_ARCH_MEMORY_H
|
||||
#define __ASM_ARCH_MEMORY_H
|
||||
|
||||
#define PHYS_OFFSET UL(0x30000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x30000000)
|
||||
|
||||
#endif
|
||||
|
|
|
@ -11,7 +11,7 @@
|
|||
#ifndef __ASM_ARCH_24A0_MEMORY_H
|
||||
#define __ASM_ARCH_24A0_MEMORY_H __FILE__
|
||||
|
||||
#define PHYS_OFFSET UL(0x10000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x10000000)
|
||||
|
||||
#define __virt_to_bus(x) __virt_to_phys(x)
|
||||
#define __bus_to_virt(x) __phys_to_virt(x)
|
||||
|
|
|
@ -13,7 +13,7 @@
|
|||
#ifndef __ASM_ARCH_MEMORY_H
|
||||
#define __ASM_ARCH_MEMORY_H
|
||||
|
||||
#define PHYS_OFFSET UL(0x50000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x50000000)
|
||||
|
||||
#define CONSISTENT_DMA_SIZE SZ_8M
|
||||
|
||||
|
|
|
@ -13,7 +13,7 @@
|
|||
#ifndef __ASM_ARCH_MEMORY_H
|
||||
#define __ASM_ARCH_MEMORY_H
|
||||
|
||||
#define PHYS_OFFSET UL(0x20000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x20000000)
|
||||
#define CONSISTENT_DMA_SIZE SZ_8M
|
||||
|
||||
#endif /* __ASM_ARCH_MEMORY_H */
|
||||
|
|
|
@ -13,7 +13,7 @@
|
|||
#ifndef __ASM_ARCH_MEMORY_H
|
||||
#define __ASM_ARCH_MEMORY_H __FILE__
|
||||
|
||||
#define PHYS_OFFSET UL(0x20000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x20000000)
|
||||
#define CONSISTENT_DMA_SIZE SZ_8M
|
||||
|
||||
#endif /* __ASM_ARCH_MEMORY_H */
|
||||
|
|
|
@ -13,6 +13,6 @@
|
|||
#ifndef __ASM_ARCH_MEMORY_H
|
||||
#define __ASM_ARCH_MEMORY_H
|
||||
|
||||
#define PHYS_OFFSET UL(0x20000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x20000000)
|
||||
|
||||
#endif
|
||||
|
|
|
@ -13,7 +13,7 @@
|
|||
#ifndef __ASM_ARCH_MEMORY_H
|
||||
#define __ASM_ARCH_MEMORY_H
|
||||
|
||||
#define PHYS_OFFSET UL(0x20000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x20000000)
|
||||
#define CONSISTENT_DMA_SIZE (SZ_8M + SZ_4M + SZ_2M)
|
||||
|
||||
/*
|
||||
|
|
|
@ -13,7 +13,7 @@
|
|||
#ifndef __ASM_ARCH_MEMORY_H
|
||||
#define __ASM_ARCH_MEMORY_H __FILE__
|
||||
|
||||
#define PHYS_OFFSET UL(0x40000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x40000000)
|
||||
|
||||
/* Maximum of 256MiB in one bank */
|
||||
#define MAX_PHYSMEM_BITS 32
|
||||
|
|
|
@ -12,7 +12,7 @@
|
|||
/*
|
||||
* Physical DRAM offset is 0xc0000000 on the SA1100
|
||||
*/
|
||||
#define PHYS_OFFSET UL(0xc0000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0xc0000000)
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
|
|
|
@ -15,7 +15,7 @@
|
|||
/*
|
||||
* Physical DRAM offset.
|
||||
*/
|
||||
#define PHYS_OFFSET UL(0x08000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x08000000)
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
|
|
|
@ -1,7 +1,7 @@
|
|||
#ifndef __ASM_MACH_MEMORY_H
|
||||
#define __ASM_MACH_MEMORY_H
|
||||
|
||||
#define PHYS_OFFSET UL(CONFIG_MEMORY_START)
|
||||
#define PLAT_PHYS_OFFSET UL(CONFIG_MEMORY_START)
|
||||
#define MEM_SIZE UL(CONFIG_MEMORY_SIZE)
|
||||
|
||||
/* DMA memory at 0xf6000000 - 0xffdfffff */
|
||||
|
|
|
@ -54,7 +54,7 @@ static void __init tcc8k_map_io(void)
|
|||
}
|
||||
|
||||
MACHINE_START(TCC8000_SDK, "Telechips TCC8000-SDK Demo Board")
|
||||
.boot_params = PHYS_OFFSET + 0x00000100,
|
||||
.boot_params = PLAT_PHYS_OFFSET + 0x00000100,
|
||||
.map_io = tcc8k_map_io,
|
||||
.init_irq = tcc8k_init_irq,
|
||||
.init_machine = tcc8k_init,
|
||||
|
|
|
@ -22,7 +22,7 @@
|
|||
#define __MACH_TEGRA_MEMORY_H
|
||||
|
||||
/* physical offset of RAM */
|
||||
#define PHYS_OFFSET UL(0)
|
||||
#define PLAT_PHYS_OFFSET UL(0)
|
||||
|
||||
#endif
|
||||
|
||||
|
|
|
@ -15,17 +15,17 @@
|
|||
|
||||
#ifdef CONFIG_MACH_U300_DUAL_RAM
|
||||
|
||||
#define PHYS_OFFSET UL(0x48000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x48000000)
|
||||
#define BOOT_PARAMS_OFFSET (PHYS_OFFSET + 0x100)
|
||||
|
||||
#else
|
||||
|
||||
#ifdef CONFIG_MACH_U300_2MB_ALIGNMENT_FIX
|
||||
#define PHYS_OFFSET (0x28000000 + \
|
||||
#define PLAT_PHYS_OFFSET (0x28000000 + \
|
||||
(CONFIG_MACH_U300_ACCESS_MEM_SIZE - \
|
||||
(CONFIG_MACH_U300_ACCESS_MEM_SIZE & 1))*1024*1024)
|
||||
#else
|
||||
#define PHYS_OFFSET (0x28000000 + \
|
||||
#define PLAT_PHYS_OFFSET (0x28000000 + \
|
||||
(CONFIG_MACH_U300_ACCESS_MEM_SIZE + \
|
||||
(CONFIG_MACH_U300_ACCESS_MEM_SIZE & 1))*1024*1024)
|
||||
#endif
|
||||
|
|
|
@ -19,9 +19,9 @@
|
|||
#include <linux/io.h>
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/platform.h>
|
||||
#include <mach/memory.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/arch.h>
|
||||
#include <asm/memory.h>
|
||||
|
||||
static void __init u300_reserve(void)
|
||||
{
|
||||
|
|
|
@ -12,7 +12,7 @@
|
|||
/*
|
||||
* Physical DRAM offset.
|
||||
*/
|
||||
#define PHYS_OFFSET UL(0x00000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x00000000)
|
||||
#define BUS_OFFSET UL(0x00000000)
|
||||
|
||||
#endif
|
||||
|
|
|
@ -23,6 +23,6 @@
|
|||
/*
|
||||
* Physical DRAM offset.
|
||||
*/
|
||||
#define PHYS_OFFSET UL(0x00000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x00000000)
|
||||
|
||||
#endif
|
||||
|
|
|
@ -243,7 +243,7 @@ static void __init ct_ca9x4_init(void)
|
|||
}
|
||||
|
||||
MACHINE_START(VEXPRESS, "ARM-Versatile Express CA9x4")
|
||||
.boot_params = PHYS_OFFSET + 0x00000100,
|
||||
.boot_params = PLAT_PHYS_OFFSET + 0x00000100,
|
||||
.map_io = ct_ca9x4_map_io,
|
||||
.init_irq = ct_ca9x4_init_irq,
|
||||
#if 0
|
||||
|
|
|
@ -20,6 +20,6 @@
|
|||
#ifndef __ASM_ARCH_MEMORY_H
|
||||
#define __ASM_ARCH_MEMORY_H
|
||||
|
||||
#define PHYS_OFFSET UL(0x60000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x60000000)
|
||||
|
||||
#endif
|
||||
|
|
|
@ -18,6 +18,6 @@
|
|||
#ifndef __ASM_ARCH_MEMORY_H
|
||||
#define __ASM_ARCH_MEMORY_H
|
||||
|
||||
#define PHYS_OFFSET UL(0x00000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x00000000)
|
||||
|
||||
#endif
|
||||
|
|
|
@ -23,23 +23,23 @@
|
|||
|
||||
#if !defined(CONFIG_RUNTIME_PHYS_OFFSET)
|
||||
# if defined CONFIG_ARCH_MX1
|
||||
# define PHYS_OFFSET MX1_PHYS_OFFSET
|
||||
# define PLAT_PHYS_OFFSET MX1_PHYS_OFFSET
|
||||
# elif defined CONFIG_MACH_MX21
|
||||
# define PHYS_OFFSET MX21_PHYS_OFFSET
|
||||
# define PLAT_PHYS_OFFSET MX21_PHYS_OFFSET
|
||||
# elif defined CONFIG_ARCH_MX25
|
||||
# define PHYS_OFFSET MX25_PHYS_OFFSET
|
||||
# define PLAT_PHYS_OFFSET MX25_PHYS_OFFSET
|
||||
# elif defined CONFIG_MACH_MX27
|
||||
# define PHYS_OFFSET MX27_PHYS_OFFSET
|
||||
# define PLAT_PHYS_OFFSET MX27_PHYS_OFFSET
|
||||
# elif defined CONFIG_ARCH_MX3
|
||||
# define PHYS_OFFSET MX3x_PHYS_OFFSET
|
||||
# define PLAT_PHYS_OFFSET MX3x_PHYS_OFFSET
|
||||
# elif defined CONFIG_ARCH_MXC91231
|
||||
# define PHYS_OFFSET MXC91231_PHYS_OFFSET
|
||||
# define PLAT_PHYS_OFFSET MXC91231_PHYS_OFFSET
|
||||
# elif defined CONFIG_ARCH_MX50
|
||||
# define PHYS_OFFSET MX50_PHYS_OFFSET
|
||||
# define PLAT_PHYS_OFFSET MX50_PHYS_OFFSET
|
||||
# elif defined CONFIG_ARCH_MX51
|
||||
# define PHYS_OFFSET MX51_PHYS_OFFSET
|
||||
# define PLAT_PHYS_OFFSET MX51_PHYS_OFFSET
|
||||
# elif defined CONFIG_ARCH_MX53
|
||||
# define PHYS_OFFSET MX53_PHYS_OFFSET
|
||||
# define PLAT_PHYS_OFFSET MX53_PHYS_OFFSET
|
||||
# endif
|
||||
#endif
|
||||
|
||||
|
|
|
@ -37,9 +37,9 @@
|
|||
* Physical DRAM offset.
|
||||
*/
|
||||
#if defined(CONFIG_ARCH_OMAP1)
|
||||
#define PHYS_OFFSET UL(0x10000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x10000000)
|
||||
#else
|
||||
#define PHYS_OFFSET UL(0x80000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x80000000)
|
||||
#endif
|
||||
|
||||
/*
|
||||
|
|
|
@ -27,7 +27,7 @@
|
|||
* 2. We assume printascii is called at least once before paging_init,
|
||||
* and addruart has a chance to read OMAP_UART_INFO
|
||||
*/
|
||||
#define OMAP_UART_INFO (PHYS_OFFSET + 0x3ffc)
|
||||
#define OMAP_UART_INFO (PLAT_PHYS_OFFSET + 0x3ffc)
|
||||
|
||||
/* OMAP1 serial ports */
|
||||
#define OMAP1_UART1_BASE 0xfffb0000
|
||||
|
|
|
@ -15,6 +15,6 @@
|
|||
#define __PLAT_MEMORY_H
|
||||
|
||||
/* Physical DRAM offset */
|
||||
#define PHYS_OFFSET UL(0x00000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x00000000)
|
||||
|
||||
#endif /* __PLAT_MEMORY_H */
|
||||
|
|
|
@ -17,6 +17,6 @@
|
|||
/*
|
||||
* Physical DRAM offset.
|
||||
*/
|
||||
#define PHYS_OFFSET UL(0x40000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x40000000)
|
||||
|
||||
#endif
|
||||
|
|
|
@ -13,6 +13,6 @@
|
|||
/*
|
||||
* Physical DRAM offset.
|
||||
*/
|
||||
#define PHYS_OFFSET UL(0x20000000)
|
||||
#define PLAT_PHYS_OFFSET UL(0x20000000)
|
||||
|
||||
#endif
|
||||
|
|
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