mfd: db8500-prcmu: update resource passing
When trying to get rid of the cross-includes of <mach/id.h> from different drivers, so we can localize ASIC/CPU detection to the mach-ux500 folder, we run into the way the PRCMU handles base addresses and firmware detection. This patch updates the firmware version detection to pass the required information as platform data instead of relying on cpu_is_* macros. Now the PRCMU base address, the secondary TCDM area, the TCPM area and the IRQ are passed as resources instead of being grabbed from <mach/*> files. Incidentally this also removes part of the reliance on <mach/irqs.h>. Further it updates the firmware version detection, since the location of the firmware ID bytes in the designated memory are is now passed from the platform data instead. There is no reason not to include the nice split-off of a struct to hold the firmware information and a separate function to populate it. The patch actually rids the need to use the external db8500_prcmu_early_init call at all, but I'm keepin back that removal as I don't want the patch to be too big. Cc: arm@kernel.org Cc: Michel Jaoen <michel.jaouen@stericsson.com> Cc: Lee Jones <lee.jones@linaro.org> Acked-by: Samuel Ortiz <sameo@linux.intel.com> Acked-by: Loic Pallardy <loic.pallardy@stericsson.com> Acked-by: Fabio Baltieri <fabio.baltieri@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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Коммит
05ec260ede
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@ -215,7 +215,7 @@ static struct platform_device snowball_sbnet_dev = {
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},
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};
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static struct ab8500_platform_data ab8500_platdata = {
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struct ab8500_platform_data ab8500_platdata = {
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.irq_base = MOP500_AB8500_IRQ_BASE,
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.regulator_reg_init = ab8500_regulator_reg_init,
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.num_regulator_reg_init = ARRAY_SIZE(ab8500_regulator_reg_init),
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@ -651,6 +651,7 @@ static void __init mop500_init_machine(void)
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int i2c0_devs;
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int i;
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platform_device_register(&db8500_prcmu_device);
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mop500_gpio_keys[0].gpio = GPIO_PROX_SENSOR;
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mop500_pinmaps_init();
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@ -685,6 +686,7 @@ static void __init snowball_init_machine(void)
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struct device *parent = NULL;
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int i;
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platform_device_register(&db8500_prcmu_device);
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snowball_pinmaps_init();
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parent = u8500_init_devices(&ab8500_platdata);
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@ -710,6 +712,7 @@ static void __init hrefv60_init_machine(void)
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int i2c0_devs;
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int i;
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platform_device_register(&db8500_prcmu_device);
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/*
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* The HREFv60 board removed a GPIO expander and routed
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* all these GPIO pins to the internal GPIO controller
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@ -139,14 +139,9 @@ static struct platform_device db8500_pmu_device = {
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.dev.platform_data = &db8500_pmu_platdata,
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};
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static struct platform_device db8500_prcmu_device = {
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.name = "db8500-prcmu",
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};
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static struct platform_device *platform_devs[] __initdata = {
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&u8500_dma40_device,
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&db8500_pmu_device,
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&db8500_prcmu_device,
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};
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static resource_size_t __initdata db8500_gpio_base[] = {
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@ -286,6 +281,8 @@ static struct of_dev_auxdata u8500_auxdata_lookup[] __initdata = {
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OF_DEV_AUXDATA("st,nomadik-i2c", 0x80128000, "nmk-i2c.2", NULL),
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OF_DEV_AUXDATA("st,nomadik-i2c", 0x80110000, "nmk-i2c.3", NULL),
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OF_DEV_AUXDATA("st,nomadik-i2c", 0x8012a000, "nmk-i2c.4", NULL),
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OF_DEV_AUXDATA("stericsson,db8500-prcmu", 0x80157000, "db8500-prcmu",
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&db8500_prcmu_pdata),
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/* Requires device name bindings. */
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OF_DEV_AUXDATA("stericsson,nmk_pinctrl", 0, "pinctrl-db8500", NULL),
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/* Requires clock name and DMA bindings. */
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@ -13,11 +13,13 @@
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#include <linux/amba/bus.h>
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#include <linux/amba/pl022.h>
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#include <linux/platform_data/dma-ste-dma40.h>
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#include <linux/mfd/dbx500-prcmu.h>
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#include <mach/hardware.h>
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#include <mach/setup.h>
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#include <mach/irqs.h>
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#include "devices-db8500.h"
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#include "ste-dma40-db8500.h"
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static struct resource dma40_resources[] = {
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@ -194,3 +196,45 @@ struct platform_device u8500_ske_keypad_device = {
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.num_resources = ARRAY_SIZE(keypad_resources),
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.resource = keypad_resources,
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};
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struct prcmu_pdata db8500_prcmu_pdata = {
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.ab_platdata = &ab8500_platdata,
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.version_offset = DB8500_PRCMU_FW_VERSION_OFFSET,
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.legacy_offset = DB8500_PRCMU_LEGACY_OFFSET,
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};
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static struct resource db8500_prcmu_res[] = {
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{
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.name = "prcmu",
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.start = U8500_PRCMU_BASE,
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.end = U8500_PRCMU_BASE + SZ_8K - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "prcmu-tcdm",
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.start = U8500_PRCMU_TCDM_BASE,
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.end = U8500_PRCMU_TCDM_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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{
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.name = "irq",
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.start = IRQ_DB8500_PRCMU1,
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.end = IRQ_DB8500_PRCMU1,
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.flags = IORESOURCE_IRQ,
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},
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{
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.name = "prcmu-tcpm",
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.start = U8500_PRCMU_TCPM_BASE,
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.end = U8500_PRCMU_TCPM_BASE + SZ_4K - 1,
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.flags = IORESOURCE_MEM,
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},
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};
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struct platform_device db8500_prcmu_device = {
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.name = "db8500-prcmu",
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.resource = db8500_prcmu_res,
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.num_resources = ARRAY_SIZE(db8500_prcmu_res),
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.dev = {
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.platform_data = &db8500_prcmu_pdata,
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},
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};
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@ -14,6 +14,11 @@
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struct ske_keypad_platform_data;
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struct pl022_ssp_controller;
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struct platform_device;
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extern struct ab8500_platform_data ab8500_platdata;
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extern struct prcmu_pdata db8500_prcmu_pdata;
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extern struct platform_device db8500_prcmu_device;
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static inline struct platform_device *
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db8500_add_ske_keypad(struct device *parent,
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@ -38,9 +38,6 @@
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#include <mach/db8500-regs.h>
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#include "dbx500-prcmu-regs.h"
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/* Offset for the firmware version within the TCPM */
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#define PRCMU_FW_VERSION_OFFSET 0xA4
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/* Index of different voltages to be used when accessing AVSData */
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#define PRCM_AVS_BASE 0x2FC
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#define PRCM_AVS_VBB_RET (PRCM_AVS_BASE + 0x0)
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@ -2704,21 +2701,43 @@ static struct irq_chip prcmu_irq_chip = {
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.irq_unmask = prcmu_irq_unmask,
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};
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static char *fw_project_name(u8 project)
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static __init char *fw_project_name(u32 project)
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{
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switch (project) {
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case PRCMU_FW_PROJECT_U8500:
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return "U8500";
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case PRCMU_FW_PROJECT_U8500_C2:
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return "U8500 C2";
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case PRCMU_FW_PROJECT_U8400:
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return "U8400";
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case PRCMU_FW_PROJECT_U9500:
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return "U9500";
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case PRCMU_FW_PROJECT_U9500_C2:
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return "U9500 C2";
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case PRCMU_FW_PROJECT_U8500_MBB:
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return "U8500 MBB";
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case PRCMU_FW_PROJECT_U8500_C1:
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return "U8500 C1";
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case PRCMU_FW_PROJECT_U8500_C2:
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return "U8500 C2";
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case PRCMU_FW_PROJECT_U8500_C3:
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return "U8500 C3";
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case PRCMU_FW_PROJECT_U8500_C4:
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return "U8500 C4";
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case PRCMU_FW_PROJECT_U9500_MBL:
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return "U9500 MBL";
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case PRCMU_FW_PROJECT_U8500_MBL:
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return "U8500 MBL";
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case PRCMU_FW_PROJECT_U8500_MBL2:
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return "U8500 MBL2";
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case PRCMU_FW_PROJECT_U8520:
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return "U8520";
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return "U8520 MBL";
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case PRCMU_FW_PROJECT_U8420:
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return "U8420";
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case PRCMU_FW_PROJECT_U9540:
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return "U9540";
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case PRCMU_FW_PROJECT_A9420:
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return "A9420";
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case PRCMU_FW_PROJECT_L8540:
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return "L8540";
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case PRCMU_FW_PROJECT_L8580:
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return "L8580";
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default:
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return "Unknown";
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}
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@ -2759,37 +2778,44 @@ static int db8500_irq_init(struct device_node *np)
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return 0;
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}
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static void dbx500_fw_version_init(struct platform_device *pdev,
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u32 version_offset)
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{
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struct resource *res;
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void __iomem *tcpm_base;
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res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
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"prcmu-tcpm");
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if (!res) {
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dev_err(&pdev->dev,
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"Error: no prcmu tcpm memory region provided\n");
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return;
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}
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tcpm_base = ioremap(res->start, resource_size(res));
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if (tcpm_base != NULL) {
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u32 version;
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version = readl(tcpm_base + version_offset);
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fw_info.version.project = (version & 0xFF);
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fw_info.version.api_version = (version >> 8) & 0xFF;
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fw_info.version.func_version = (version >> 16) & 0xFF;
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fw_info.version.errata = (version >> 24) & 0xFF;
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strncpy(fw_info.version.project_name,
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fw_project_name(fw_info.version.project),
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PRCMU_FW_PROJECT_NAME_LEN);
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fw_info.valid = true;
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pr_info("PRCMU firmware: %s(%d), version %d.%d.%d\n",
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fw_info.version.project_name,
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fw_info.version.project,
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fw_info.version.api_version,
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fw_info.version.func_version,
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fw_info.version.errata);
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iounmap(tcpm_base);
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}
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}
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void __init db8500_prcmu_early_init(void)
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{
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if (cpu_is_u8500v2() || cpu_is_u9540()) {
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void *tcpm_base = ioremap_nocache(U8500_PRCMU_TCPM_BASE, SZ_4K);
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if (tcpm_base != NULL) {
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u32 version;
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version = readl(tcpm_base + PRCMU_FW_VERSION_OFFSET);
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fw_info.version.project = version & 0xFF;
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fw_info.version.api_version = (version >> 8) & 0xFF;
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fw_info.version.func_version = (version >> 16) & 0xFF;
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fw_info.version.errata = (version >> 24) & 0xFF;
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fw_info.valid = true;
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pr_info("PRCMU firmware: %s, version %d.%d.%d\n",
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fw_project_name(fw_info.version.project),
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(version >> 8) & 0xFF, (version >> 16) & 0xFF,
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(version >> 24) & 0xFF);
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iounmap(tcpm_base);
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}
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if (cpu_is_u9540())
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tcdm_base = ioremap_nocache(U8500_PRCMU_TCDM_BASE,
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SZ_4K + SZ_8K) + SZ_8K;
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else
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tcdm_base = __io_address(U8500_PRCMU_TCDM_BASE);
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} else {
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pr_err("prcmu: Unsupported chip version\n");
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BUG();
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}
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tcdm_base = __io_address(U8500_PRCMU_TCDM_BASE);
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spin_lock_init(&mb0_transfer.lock);
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spin_lock_init(&mb0_transfer.dbb_irqs_lock);
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mutex_init(&mb0_transfer.ac_wake_lock);
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@ -3099,20 +3125,30 @@ static void db8500_prcmu_update_cpufreq(void)
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*/
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static int db8500_prcmu_probe(struct platform_device *pdev)
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{
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struct ab8500_platform_data *ab8500_platdata = pdev->dev.platform_data;
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struct device_node *np = pdev->dev.of_node;
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struct prcmu_pdata *pdata = dev_get_platdata(&pdev->dev);
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int irq = 0, err = 0, i;
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struct resource *res;
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init_prcm_registers();
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dbx500_fw_version_init(pdev, pdata->version_offset);
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res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "prcmu-tcdm");
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if (!res) {
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dev_err(&pdev->dev, "no prcmu tcdm region provided\n");
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return -ENOENT;
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}
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tcdm_base = devm_ioremap(&pdev->dev, res->start,
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resource_size(res));
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/* Clean up the mailbox interrupts after pre-kernel code. */
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writel(ALL_MBOX_BITS, PRCM_ARM_IT1_CLR);
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if (np)
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irq = platform_get_irq(pdev, 0);
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if (!np || irq <= 0)
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irq = IRQ_DB8500_PRCMU1;
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irq = platform_get_irq(pdev, 0);
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if (irq <= 0) {
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dev_err(&pdev->dev, "no prcmu irq provided\n");
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return -ENOENT;
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}
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err = request_threaded_irq(irq, prcmu_irq_handler,
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prcmu_irq_thread_fn, IRQF_NO_SUSPEND, "prcmu", NULL);
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@ -3126,7 +3162,7 @@ static int db8500_prcmu_probe(struct platform_device *pdev)
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for (i = 0; i < ARRAY_SIZE(db8500_prcmu_devs); i++) {
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if (!strcmp(db8500_prcmu_devs[i].name, "ab8500-core")) {
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db8500_prcmu_devs[i].platform_data = ab8500_platdata;
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db8500_prcmu_devs[i].platform_data = pdata->ab_platdata;
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db8500_prcmu_devs[i].pdata_size = sizeof(struct ab8500_platform_data);
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}
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}
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@ -487,20 +487,6 @@ struct prcmu_auto_pm_config {
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u8 sva_policy;
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};
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#define PRCMU_FW_PROJECT_U8500 2
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#define PRCMU_FW_PROJECT_U9500 4
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#define PRCMU_FW_PROJECT_U8500_C2 7
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#define PRCMU_FW_PROJECT_U9500_C2 11
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#define PRCMU_FW_PROJECT_U8520 13
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#define PRCMU_FW_PROJECT_U8420 14
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struct prcmu_fw_version {
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u8 project;
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u8 api_version;
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u8 func_version;
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u8 errata;
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};
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#ifdef CONFIG_MFD_DB8500_PRCMU
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void db8500_prcmu_early_init(void);
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@ -12,6 +12,10 @@
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#include <linux/notifier.h>
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#include <linux/err.h>
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/* Offset for the firmware version within the TCPM */
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#define DB8500_PRCMU_FW_VERSION_OFFSET 0xA4
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#define DBX540_PRCMU_FW_VERSION_OFFSET 0xA8
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/* PRCMU Wakeup defines */
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enum prcmu_wakeup_index {
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PRCMU_WAKEUP_INDEX_RTC,
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@ -214,6 +218,48 @@ enum ddr_pwrst {
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DDR_PWR_STATE_OFFHIGHLAT = 0x03
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};
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#define DB8500_PRCMU_LEGACY_OFFSET 0xDD4
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struct prcmu_pdata
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{
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bool enable_set_ddr_opp;
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bool enable_ape_opp_100_voltage;
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struct ab8500_platform_data *ab_platdata;
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u32 version_offset;
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u32 legacy_offset;
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u32 adt_offset;
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};
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#define PRCMU_FW_PROJECT_U8500 2
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#define PRCMU_FW_PROJECT_U8400 3
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#define PRCMU_FW_PROJECT_U9500 4 /* Customer specific */
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#define PRCMU_FW_PROJECT_U8500_MBB 5
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#define PRCMU_FW_PROJECT_U8500_C1 6
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#define PRCMU_FW_PROJECT_U8500_C2 7
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#define PRCMU_FW_PROJECT_U8500_C3 8
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#define PRCMU_FW_PROJECT_U8500_C4 9
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#define PRCMU_FW_PROJECT_U9500_MBL 10
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#define PRCMU_FW_PROJECT_U8500_MBL 11 /* Customer specific */
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#define PRCMU_FW_PROJECT_U8500_MBL2 12 /* Customer specific */
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#define PRCMU_FW_PROJECT_U8520 13
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#define PRCMU_FW_PROJECT_U8420 14
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#define PRCMU_FW_PROJECT_A9420 20
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/* [32..63] 9540 and derivatives */
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#define PRCMU_FW_PROJECT_U9540 32
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/* [64..95] 8540 and derivatives */
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#define PRCMU_FW_PROJECT_L8540 64
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/* [96..126] 8580 and derivatives */
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#define PRCMU_FW_PROJECT_L8580 96
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#define PRCMU_FW_PROJECT_NAME_LEN 20
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struct prcmu_fw_version {
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u32 project; /* Notice, project shifted with 8 on ux540 */
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u8 api_version;
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u8 func_version;
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u8 errata;
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char project_name[PRCMU_FW_PROJECT_NAME_LEN];
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};
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#include <linux/mfd/db8500-prcmu.h>
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#if defined(CONFIG_UX500_SOC_DB8500)
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