ARM: smp_scu: add a helper for powering on a specific CPU
To boot the secondary CPUs on the Amlogic Meson8/Meson8m2 (Cortex-A9) and Meson8b (Cortex-A5) SoCs we have to enable SCU mode SCU_PM_NORMAL, otherwise the secondary cores will not start. This patch adds a scu_cpu_power_enable() function which can be used to enable SCU_PM_NORMAL for a specific (logical) CPU. An internal helper function is also created, to avoid code duplication with scu_power_mode(). Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
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9c52aaf756
Коммит
0606326eff
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@ -27,6 +27,7 @@ static inline unsigned long scu_a9_get_base(void)
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#ifdef CONFIG_HAVE_ARM_SCU
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#ifdef CONFIG_HAVE_ARM_SCU
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unsigned int scu_get_core_count(void __iomem *);
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unsigned int scu_get_core_count(void __iomem *);
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int scu_power_mode(void __iomem *, unsigned int);
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int scu_power_mode(void __iomem *, unsigned int);
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int scu_cpu_power_enable(void __iomem *, unsigned int);
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#else
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#else
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static inline unsigned int scu_get_core_count(void __iomem *scu_base)
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static inline unsigned int scu_get_core_count(void __iomem *scu_base)
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{
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{
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@ -36,6 +37,11 @@ static inline int scu_power_mode(void __iomem *scu_base, unsigned int mode)
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{
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{
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return -EINVAL;
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return -EINVAL;
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}
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}
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static inline int scu_cpu_power_enable(void __iomem *scu_base,
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unsigned int mode)
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{
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return -EINVAL;
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}
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#endif
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#endif
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#if defined(CONFIG_SMP) && defined(CONFIG_HAVE_ARM_SCU)
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#if defined(CONFIG_SMP) && defined(CONFIG_HAVE_ARM_SCU)
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@ -72,18 +72,12 @@ void scu_enable(void __iomem *scu_base)
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}
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}
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#endif
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#endif
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/*
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static int scu_set_power_mode_internal(void __iomem *scu_base,
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* Set the executing CPUs power mode as defined. This will be in
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unsigned int logical_cpu,
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* preparation for it executing a WFI instruction.
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unsigned int mode)
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*
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* This function must be called with preemption disabled, and as it
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* has the side effect of disabling coherency, caches must have been
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* flushed. Interrupts must also have been disabled.
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*/
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int scu_power_mode(void __iomem *scu_base, unsigned int mode)
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{
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{
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unsigned int val;
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unsigned int val;
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int cpu = MPIDR_AFFINITY_LEVEL(cpu_logical_map(smp_processor_id()), 0);
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int cpu = MPIDR_AFFINITY_LEVEL(cpu_logical_map(logical_cpu), 0);
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if (mode > 3 || mode == 1 || cpu > 3)
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if (mode > 3 || mode == 1 || cpu > 3)
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return -EINVAL;
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return -EINVAL;
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@ -94,3 +88,24 @@ int scu_power_mode(void __iomem *scu_base, unsigned int mode)
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return 0;
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return 0;
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}
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}
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/*
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* Set the executing CPUs power mode as defined. This will be in
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* preparation for it executing a WFI instruction.
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*
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* This function must be called with preemption disabled, and as it
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* has the side effect of disabling coherency, caches must have been
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* flushed. Interrupts must also have been disabled.
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*/
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int scu_power_mode(void __iomem *scu_base, unsigned int mode)
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{
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return scu_set_power_mode_internal(scu_base, smp_processor_id(), mode);
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}
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/*
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* Set the given (logical) CPU's power mode to SCU_PM_NORMAL.
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*/
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int scu_cpu_power_enable(void __iomem *scu_base, unsigned int cpu)
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{
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return scu_set_power_mode_internal(scu_base, cpu, SCU_PM_NORMAL);
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}
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