Merge branch 'board-specific' of git://github.com/hzhuang1/linux into next/boards
* 'board-specific' of git://github.com/hzhuang1/linux: pxa/hx4700: Remove pcmcia platform_device structure ARM: pxa/hx4700: Reduce sleep mode battery discharge by 35% ARM: pxa/hx4700: Remove unwanted request for GPIO105 (update to 3.3-rc7) Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
Коммит
065319c229
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@ -7,9 +7,9 @@ Each LED is represented as a sub-node of the gpio-leds device. Each
|
|||
node's name represents the name of the corresponding LED.
|
||||
|
||||
LED sub-node properties:
|
||||
- gpios : Should specify the LED's GPIO, see "Specifying GPIO information
|
||||
for devices" in Documentation/devicetree/booting-without-of.txt. Active
|
||||
low LEDs should be indicated using flags in the GPIO specifier.
|
||||
- gpios : Should specify the LED's GPIO, see "gpios property" in
|
||||
Documentation/devicetree/gpio.txt. Active low LEDs should be
|
||||
indicated using flags in the GPIO specifier.
|
||||
- label : (optional) The label for this LED. If omitted, the label is
|
||||
taken from the node name (excluding the unit address).
|
||||
- linux,default-trigger : (optional) This parameter, if present, is a
|
||||
|
|
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|||
|
|
@ -30,6 +30,7 @@ national National Semiconductor
|
|||
nintendo Nintendo
|
||||
nvidia NVIDIA
|
||||
nxp NXP Semiconductors
|
||||
picochip Picochip Ltd
|
||||
powervr Imagination Technologies
|
||||
qcom Qualcomm, Inc.
|
||||
ramtron Ramtron International
|
||||
|
|
|
|||
|
|
@ -7,21 +7,29 @@ Supported chips:
|
|||
Addresses scanned: I2C 0x18 - 0x1f
|
||||
Datasheets:
|
||||
http://www.analog.com/static/imported-files/data_sheets/ADT7408.pdf
|
||||
* IDT TSE2002B3, TS3000B3
|
||||
Prefix: 'tse2002b3', 'ts3000b3'
|
||||
* Atmel AT30TS00
|
||||
Prefix: 'at30ts00'
|
||||
Addresses scanned: I2C 0x18 - 0x1f
|
||||
Datasheets:
|
||||
http://www.idt.com/products/getdoc.cfm?docid=18715691
|
||||
http://www.idt.com/products/getdoc.cfm?docid=18715692
|
||||
http://www.atmel.com/Images/doc8585.pdf
|
||||
* IDT TSE2002B3, TSE2002GB2, TS3000B3, TS3000GB2
|
||||
Prefix: 'tse2002', 'ts3000'
|
||||
Addresses scanned: I2C 0x18 - 0x1f
|
||||
Datasheets:
|
||||
http://www.idt.com/sites/default/files/documents/IDT_TSE2002B3C_DST_20100512_120303152056.pdf
|
||||
http://www.idt.com/sites/default/files/documents/IDT_TSE2002GB2A1_DST_20111107_120303145914.pdf
|
||||
http://www.idt.com/sites/default/files/documents/IDT_TS3000B3A_DST_20101129_120303152013.pdf
|
||||
http://www.idt.com/sites/default/files/documents/IDT_TS3000GB2A1_DST_20111104_120303151012.pdf
|
||||
* Maxim MAX6604
|
||||
Prefix: 'max6604'
|
||||
Addresses scanned: I2C 0x18 - 0x1f
|
||||
Datasheets:
|
||||
http://datasheets.maxim-ic.com/en/ds/MAX6604.pdf
|
||||
* Microchip MCP9805, MCP98242, MCP98243, MCP9843
|
||||
Prefixes: 'mcp9805', 'mcp98242', 'mcp98243', 'mcp9843'
|
||||
* Microchip MCP9804, MCP9805, MCP98242, MCP98243, MCP9843
|
||||
Prefixes: 'mcp9804', 'mcp9805', 'mcp98242', 'mcp98243', 'mcp9843'
|
||||
Addresses scanned: I2C 0x18 - 0x1f
|
||||
Datasheets:
|
||||
http://ww1.microchip.com/downloads/en/DeviceDoc/22203C.pdf
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||||
http://ww1.microchip.com/downloads/en/DeviceDoc/21977b.pdf
|
||||
http://ww1.microchip.com/downloads/en/DeviceDoc/21996a.pdf
|
||||
http://ww1.microchip.com/downloads/en/DeviceDoc/22153c.pdf
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||||
|
|
@ -48,6 +56,12 @@ Supported chips:
|
|||
Datasheets:
|
||||
http://www.st.com/stonline/products/literature/ds/13447/stts424.pdf
|
||||
http://www.st.com/stonline/products/literature/ds/13448/stts424e02.pdf
|
||||
* ST Microelectronics STTS2002, STTS3000
|
||||
Prefix: 'stts2002', 'stts3000'
|
||||
Addresses scanned: I2C 0x18 - 0x1f
|
||||
Datasheets:
|
||||
http://www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/DATASHEET/CD00225278.pdf
|
||||
http://www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/DATA_BRIEF/CD00270920.pdf
|
||||
* JEDEC JC 42.4 compliant temperature sensor chips
|
||||
Prefix: 'jc42'
|
||||
Addresses scanned: I2C 0x18 - 0x1f
|
||||
|
|
|
|||
|
|
@ -13,7 +13,8 @@ Detection
|
|||
|
||||
All ALPS touchpads should respond to the "E6 report" command sequence:
|
||||
E8-E6-E6-E6-E9. An ALPS touchpad should respond with either 00-00-0A or
|
||||
00-00-64.
|
||||
00-00-64 if no buttons are pressed. The bits 0-2 of the first byte will be 1s
|
||||
if some buttons are pressed.
|
||||
|
||||
If the E6 report is successful, the touchpad model is identified using the "E7
|
||||
report" sequence: E8-E7-E7-E7-E9. The response is the model signature and is
|
||||
|
|
|
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|
|
@ -2211,6 +2211,12 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
|
|||
|
||||
default: off.
|
||||
|
||||
printk.always_kmsg_dump=
|
||||
Trigger kmsg_dump for cases other than kernel oops or
|
||||
panics
|
||||
Format: <bool> (1/Y/y=enable, 0/N/n=disable)
|
||||
default: disabled
|
||||
|
||||
printk.time= Show timing data prefixed to each printk message line
|
||||
Format: <bool> (1/Y/y=enable, 0/N/n=disable)
|
||||
|
||||
|
|
|
|||
|
|
@ -962,7 +962,7 @@ F: drivers/tty/serial/msm_serial.c
|
|||
F: drivers/platform/msm/
|
||||
F: drivers/*/pm8???-*
|
||||
F: include/linux/mfd/pm8xxx/
|
||||
T: git git://codeaurora.org/quic/kernel/davidb/linux-msm.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/davidb/linux-msm.git
|
||||
S: Maintained
|
||||
|
||||
ARM/TOSA MACHINE SUPPORT
|
||||
|
|
@ -1310,7 +1310,7 @@ F: drivers/atm/
|
|||
F: include/linux/atm*
|
||||
|
||||
ATMEL AT91 MCI DRIVER
|
||||
M: Nicolas Ferre <nicolas.ferre@atmel.com>
|
||||
M: Ludovic Desroches <ludovic.desroches@atmel.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
W: http://www.atmel.com/products/AT91/
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||||
W: http://www.at91.com/
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||||
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|
@ -1318,7 +1318,7 @@ S: Maintained
|
|||
F: drivers/mmc/host/at91_mci.c
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||||
|
||||
ATMEL AT91 / AT32 MCI DRIVER
|
||||
M: Nicolas Ferre <nicolas.ferre@atmel.com>
|
||||
M: Ludovic Desroches <ludovic.desroches@atmel.com>
|
||||
S: Maintained
|
||||
F: drivers/mmc/host/atmel-mci.c
|
||||
F: drivers/mmc/host/atmel-mci-regs.h
|
||||
|
|
|
|||
2
Makefile
2
Makefile
|
|
@ -1,7 +1,7 @@
|
|||
VERSION = 3
|
||||
PATCHLEVEL = 3
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc6
|
||||
EXTRAVERSION = -rc7
|
||||
NAME = Saber-toothed Squirrel
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
|
|||
|
|
@ -108,7 +108,7 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
|
|||
" lda $31,3b-2b(%0)\n"
|
||||
" .previous\n"
|
||||
: "+r"(ret), "=&r"(prev), "=&r"(cmp)
|
||||
: "r"(uaddr), "r"((long)oldval), "r"(newval)
|
||||
: "r"(uaddr), "r"((long)(int)oldval), "r"(newval)
|
||||
: "memory");
|
||||
|
||||
*uval = prev;
|
||||
|
|
|
|||
|
|
@ -1280,7 +1280,7 @@ config ARM_ERRATA_743622
|
|||
depends on CPU_V7
|
||||
help
|
||||
This option enables the workaround for the 743622 Cortex-A9
|
||||
(r2p0..r2p2) erratum. Under very rare conditions, a faulty
|
||||
(r2p*) erratum. Under very rare conditions, a faulty
|
||||
optimisation in the Cortex-A9 Store Buffer may lead to data
|
||||
corruption. This workaround sets a specific bit in the diagnostic
|
||||
register of the Cortex-A9 which disables the Store Buffer
|
||||
|
|
|
|||
|
|
@ -3,3 +3,4 @@ zImage
|
|||
xipImage
|
||||
bootpImage
|
||||
uImage
|
||||
*.dtb
|
||||
|
|
|
|||
|
|
@ -134,7 +134,7 @@ int __init armpmu_register(struct arm_pmu *armpmu, char *name, int type);
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|||
|
||||
u64 armpmu_event_update(struct perf_event *event,
|
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struct hw_perf_event *hwc,
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||||
int idx, int overflow);
|
||||
int idx);
|
||||
|
||||
int armpmu_event_set_period(struct perf_event *event,
|
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struct hw_perf_event *hwc,
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|
|
|
|||
|
|
@ -242,6 +242,7 @@ static void ecard_init_pgtables(struct mm_struct *mm)
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|
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memcpy(dst_pgd, src_pgd, sizeof(pgd_t) * (EASI_SIZE / PGDIR_SIZE));
|
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|
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vma.vm_flags = VM_EXEC;
|
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vma.vm_mm = mm;
|
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|
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flush_tlb_range(&vma, IO_START, IO_START + IO_SIZE);
|
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|
|
|
|||
|
|
@ -180,7 +180,7 @@ armpmu_event_set_period(struct perf_event *event,
|
|||
u64
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armpmu_event_update(struct perf_event *event,
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struct hw_perf_event *hwc,
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int idx, int overflow)
|
||||
int idx)
|
||||
{
|
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struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
|
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u64 delta, prev_raw_count, new_raw_count;
|
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|
|
@ -193,13 +193,7 @@ again:
|
|||
new_raw_count) != prev_raw_count)
|
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goto again;
|
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|
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new_raw_count &= armpmu->max_period;
|
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prev_raw_count &= armpmu->max_period;
|
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|
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if (overflow)
|
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delta = armpmu->max_period - prev_raw_count + new_raw_count + 1;
|
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else
|
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delta = new_raw_count - prev_raw_count;
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delta = (new_raw_count - prev_raw_count) & armpmu->max_period;
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|
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local64_add(delta, &event->count);
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local64_sub(delta, &hwc->period_left);
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|
|
@ -216,7 +210,7 @@ armpmu_read(struct perf_event *event)
|
|||
if (hwc->idx < 0)
|
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return;
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|
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armpmu_event_update(event, hwc, hwc->idx, 0);
|
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armpmu_event_update(event, hwc, hwc->idx);
|
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}
|
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|
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static void
|
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|
|
@ -232,7 +226,7 @@ armpmu_stop(struct perf_event *event, int flags)
|
|||
if (!(hwc->state & PERF_HES_STOPPED)) {
|
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armpmu->disable(hwc, hwc->idx);
|
||||
barrier(); /* why? */
|
||||
armpmu_event_update(event, hwc, hwc->idx, 0);
|
||||
armpmu_event_update(event, hwc, hwc->idx);
|
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hwc->state |= PERF_HES_STOPPED | PERF_HES_UPTODATE;
|
||||
}
|
||||
}
|
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|
|
@ -518,7 +512,13 @@ __hw_perf_event_init(struct perf_event *event)
|
|||
hwc->config_base |= (unsigned long)mapping;
|
||||
|
||||
if (!hwc->sample_period) {
|
||||
hwc->sample_period = armpmu->max_period;
|
||||
/*
|
||||
* For non-sampling runs, limit the sample_period to half
|
||||
* of the counter width. That way, the new counter value
|
||||
* is far less likely to overtake the previous one unless
|
||||
* you have some serious IRQ latency issues.
|
||||
*/
|
||||
hwc->sample_period = armpmu->max_period >> 1;
|
||||
hwc->last_period = hwc->sample_period;
|
||||
local64_set(&hwc->period_left, hwc->sample_period);
|
||||
}
|
||||
|
|
@ -679,6 +679,28 @@ static void __init cpu_pmu_init(struct arm_pmu *armpmu)
|
|||
armpmu->type = ARM_PMU_DEVICE_CPU;
|
||||
}
|
||||
|
||||
/*
|
||||
* PMU hardware loses all context when a CPU goes offline.
|
||||
* When a CPU is hotplugged back in, since some hardware registers are
|
||||
* UNKNOWN at reset, the PMU must be explicitly reset to avoid reading
|
||||
* junk values out of them.
|
||||
*/
|
||||
static int __cpuinit pmu_cpu_notify(struct notifier_block *b,
|
||||
unsigned long action, void *hcpu)
|
||||
{
|
||||
if ((action & ~CPU_TASKS_FROZEN) != CPU_STARTING)
|
||||
return NOTIFY_DONE;
|
||||
|
||||
if (cpu_pmu && cpu_pmu->reset)
|
||||
cpu_pmu->reset(NULL);
|
||||
|
||||
return NOTIFY_OK;
|
||||
}
|
||||
|
||||
static struct notifier_block __cpuinitdata pmu_cpu_notifier = {
|
||||
.notifier_call = pmu_cpu_notify,
|
||||
};
|
||||
|
||||
/*
|
||||
* CPU PMU identification and registration.
|
||||
*/
|
||||
|
|
@ -730,6 +752,7 @@ init_hw_perf_events(void)
|
|||
pr_info("enabled with %s PMU driver, %d counters available\n",
|
||||
cpu_pmu->name, cpu_pmu->num_events);
|
||||
cpu_pmu_init(cpu_pmu);
|
||||
register_cpu_notifier(&pmu_cpu_notifier);
|
||||
armpmu_register(cpu_pmu, "cpu", PERF_TYPE_RAW);
|
||||
} else {
|
||||
pr_info("no hardware support available\n");
|
||||
|
|
|
|||
|
|
@ -467,23 +467,6 @@ armv6pmu_enable_event(struct hw_perf_event *hwc,
|
|||
raw_spin_unlock_irqrestore(&events->pmu_lock, flags);
|
||||
}
|
||||
|
||||
static int counter_is_active(unsigned long pmcr, int idx)
|
||||
{
|
||||
unsigned long mask = 0;
|
||||
if (idx == ARMV6_CYCLE_COUNTER)
|
||||
mask = ARMV6_PMCR_CCOUNT_IEN;
|
||||
else if (idx == ARMV6_COUNTER0)
|
||||
mask = ARMV6_PMCR_COUNT0_IEN;
|
||||
else if (idx == ARMV6_COUNTER1)
|
||||
mask = ARMV6_PMCR_COUNT1_IEN;
|
||||
|
||||
if (mask)
|
||||
return pmcr & mask;
|
||||
|
||||
WARN_ONCE(1, "invalid counter number (%d)\n", idx);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static irqreturn_t
|
||||
armv6pmu_handle_irq(int irq_num,
|
||||
void *dev)
|
||||
|
|
@ -513,7 +496,8 @@ armv6pmu_handle_irq(int irq_num,
|
|||
struct perf_event *event = cpuc->events[idx];
|
||||
struct hw_perf_event *hwc;
|
||||
|
||||
if (!counter_is_active(pmcr, idx))
|
||||
/* Ignore if we don't have an event. */
|
||||
if (!event)
|
||||
continue;
|
||||
|
||||
/*
|
||||
|
|
@ -524,7 +508,7 @@ armv6pmu_handle_irq(int irq_num,
|
|||
continue;
|
||||
|
||||
hwc = &event->hw;
|
||||
armpmu_event_update(event, hwc, idx, 1);
|
||||
armpmu_event_update(event, hwc, idx);
|
||||
data.period = event->hw.last_period;
|
||||
if (!armpmu_event_set_period(event, hwc, idx))
|
||||
continue;
|
||||
|
|
|
|||
|
|
@ -809,6 +809,11 @@ static inline int armv7_pmnc_disable_intens(int idx)
|
|||
|
||||
counter = ARMV7_IDX_TO_COUNTER(idx);
|
||||
asm volatile("mcr p15, 0, %0, c9, c14, 2" : : "r" (BIT(counter)));
|
||||
isb();
|
||||
/* Clear the overflow flag in case an interrupt is pending. */
|
||||
asm volatile("mcr p15, 0, %0, c9, c12, 3" : : "r" (BIT(counter)));
|
||||
isb();
|
||||
|
||||
return idx;
|
||||
}
|
||||
|
||||
|
|
@ -955,6 +960,10 @@ static irqreturn_t armv7pmu_handle_irq(int irq_num, void *dev)
|
|||
struct perf_event *event = cpuc->events[idx];
|
||||
struct hw_perf_event *hwc;
|
||||
|
||||
/* Ignore if we don't have an event. */
|
||||
if (!event)
|
||||
continue;
|
||||
|
||||
/*
|
||||
* We have a single interrupt for all counters. Check that
|
||||
* each counter has overflowed before we process it.
|
||||
|
|
@ -963,7 +972,7 @@ static irqreturn_t armv7pmu_handle_irq(int irq_num, void *dev)
|
|||
continue;
|
||||
|
||||
hwc = &event->hw;
|
||||
armpmu_event_update(event, hwc, idx, 1);
|
||||
armpmu_event_update(event, hwc, idx);
|
||||
data.period = event->hw.last_period;
|
||||
if (!armpmu_event_set_period(event, hwc, idx))
|
||||
continue;
|
||||
|
|
|
|||
|
|
@ -255,11 +255,14 @@ xscale1pmu_handle_irq(int irq_num, void *dev)
|
|||
struct perf_event *event = cpuc->events[idx];
|
||||
struct hw_perf_event *hwc;
|
||||
|
||||
if (!event)
|
||||
continue;
|
||||
|
||||
if (!xscale1_pmnc_counter_has_overflowed(pmnc, idx))
|
||||
continue;
|
||||
|
||||
hwc = &event->hw;
|
||||
armpmu_event_update(event, hwc, idx, 1);
|
||||
armpmu_event_update(event, hwc, idx);
|
||||
data.period = event->hw.last_period;
|
||||
if (!armpmu_event_set_period(event, hwc, idx))
|
||||
continue;
|
||||
|
|
@ -592,11 +595,14 @@ xscale2pmu_handle_irq(int irq_num, void *dev)
|
|||
struct perf_event *event = cpuc->events[idx];
|
||||
struct hw_perf_event *hwc;
|
||||
|
||||
if (!xscale2_pmnc_counter_has_overflowed(pmnc, idx))
|
||||
if (!event)
|
||||
continue;
|
||||
|
||||
if (!xscale2_pmnc_counter_has_overflowed(of_flags, idx))
|
||||
continue;
|
||||
|
||||
hwc = &event->hw;
|
||||
armpmu_event_update(event, hwc, idx, 1);
|
||||
armpmu_event_update(event, hwc, idx);
|
||||
data.period = event->hw.last_period;
|
||||
if (!armpmu_event_set_period(event, hwc, idx))
|
||||
continue;
|
||||
|
|
@ -663,7 +669,7 @@ xscale2pmu_enable_event(struct hw_perf_event *hwc, int idx)
|
|||
static void
|
||||
xscale2pmu_disable_event(struct hw_perf_event *hwc, int idx)
|
||||
{
|
||||
unsigned long flags, ien, evtsel;
|
||||
unsigned long flags, ien, evtsel, of_flags;
|
||||
struct pmu_hw_events *events = cpu_pmu->get_hw_events();
|
||||
|
||||
ien = xscale2pmu_read_int_enable();
|
||||
|
|
@ -672,26 +678,31 @@ xscale2pmu_disable_event(struct hw_perf_event *hwc, int idx)
|
|||
switch (idx) {
|
||||
case XSCALE_CYCLE_COUNTER:
|
||||
ien &= ~XSCALE2_CCOUNT_INT_EN;
|
||||
of_flags = XSCALE2_CCOUNT_OVERFLOW;
|
||||
break;
|
||||
case XSCALE_COUNTER0:
|
||||
ien &= ~XSCALE2_COUNT0_INT_EN;
|
||||
evtsel &= ~XSCALE2_COUNT0_EVT_MASK;
|
||||
evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT0_EVT_SHFT;
|
||||
of_flags = XSCALE2_COUNT0_OVERFLOW;
|
||||
break;
|
||||
case XSCALE_COUNTER1:
|
||||
ien &= ~XSCALE2_COUNT1_INT_EN;
|
||||
evtsel &= ~XSCALE2_COUNT1_EVT_MASK;
|
||||
evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT1_EVT_SHFT;
|
||||
of_flags = XSCALE2_COUNT1_OVERFLOW;
|
||||
break;
|
||||
case XSCALE_COUNTER2:
|
||||
ien &= ~XSCALE2_COUNT2_INT_EN;
|
||||
evtsel &= ~XSCALE2_COUNT2_EVT_MASK;
|
||||
evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT2_EVT_SHFT;
|
||||
of_flags = XSCALE2_COUNT2_OVERFLOW;
|
||||
break;
|
||||
case XSCALE_COUNTER3:
|
||||
ien &= ~XSCALE2_COUNT3_INT_EN;
|
||||
evtsel &= ~XSCALE2_COUNT3_EVT_MASK;
|
||||
evtsel |= XSCALE_PERFCTR_UNUSED << XSCALE2_COUNT3_EVT_SHFT;
|
||||
of_flags = XSCALE2_COUNT3_OVERFLOW;
|
||||
break;
|
||||
default:
|
||||
WARN_ONCE(1, "invalid counter number (%d)\n", idx);
|
||||
|
|
@ -701,6 +712,7 @@ xscale2pmu_disable_event(struct hw_perf_event *hwc, int idx)
|
|||
raw_spin_lock_irqsave(&events->pmu_lock, flags);
|
||||
xscale2pmu_write_event_select(evtsel);
|
||||
xscale2pmu_write_int_enable(ien);
|
||||
xscale2pmu_write_overflow_flags(of_flags);
|
||||
raw_spin_unlock_irqrestore(&events->pmu_lock, flags);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -38,10 +38,6 @@
|
|||
#if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE)
|
||||
static u64 hdmac_dmamask = DMA_BIT_MASK(32);
|
||||
|
||||
static struct at_dma_platform_data atdma_pdata = {
|
||||
.nr_channels = 8,
|
||||
};
|
||||
|
||||
static struct resource hdmac_resources[] = {
|
||||
[0] = {
|
||||
.start = AT91SAM9G45_BASE_DMA,
|
||||
|
|
@ -56,12 +52,11 @@ static struct resource hdmac_resources[] = {
|
|||
};
|
||||
|
||||
static struct platform_device at_hdmac_device = {
|
||||
.name = "at_hdmac",
|
||||
.name = "at91sam9g45_dma",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.dma_mask = &hdmac_dmamask,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
.platform_data = &atdma_pdata,
|
||||
},
|
||||
.resource = hdmac_resources,
|
||||
.num_resources = ARRAY_SIZE(hdmac_resources),
|
||||
|
|
@ -69,9 +64,15 @@ static struct platform_device at_hdmac_device = {
|
|||
|
||||
void __init at91_add_device_hdmac(void)
|
||||
{
|
||||
dma_cap_set(DMA_MEMCPY, atdma_pdata.cap_mask);
|
||||
dma_cap_set(DMA_SLAVE, atdma_pdata.cap_mask);
|
||||
platform_device_register(&at_hdmac_device);
|
||||
#if defined(CONFIG_OF)
|
||||
struct device_node *of_node =
|
||||
of_find_node_by_name(NULL, "dma-controller");
|
||||
|
||||
if (of_node)
|
||||
of_node_put(of_node);
|
||||
else
|
||||
#endif
|
||||
platform_device_register(&at_hdmac_device);
|
||||
}
|
||||
#else
|
||||
void __init at91_add_device_hdmac(void) {}
|
||||
|
|
|
|||
|
|
@ -33,10 +33,6 @@
|
|||
#if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE)
|
||||
static u64 hdmac_dmamask = DMA_BIT_MASK(32);
|
||||
|
||||
static struct at_dma_platform_data atdma_pdata = {
|
||||
.nr_channels = 2,
|
||||
};
|
||||
|
||||
static struct resource hdmac_resources[] = {
|
||||
[0] = {
|
||||
.start = AT91SAM9RL_BASE_DMA,
|
||||
|
|
@ -51,12 +47,11 @@ static struct resource hdmac_resources[] = {
|
|||
};
|
||||
|
||||
static struct platform_device at_hdmac_device = {
|
||||
.name = "at_hdmac",
|
||||
.name = "at91sam9rl_dma",
|
||||
.id = -1,
|
||||
.dev = {
|
||||
.dma_mask = &hdmac_dmamask,
|
||||
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||
.platform_data = &atdma_pdata,
|
||||
},
|
||||
.resource = hdmac_resources,
|
||||
.num_resources = ARRAY_SIZE(hdmac_resources),
|
||||
|
|
@ -64,7 +59,6 @@ static struct platform_device at_hdmac_device = {
|
|||
|
||||
void __init at91_add_device_hdmac(void)
|
||||
{
|
||||
dma_cap_set(DMA_MEMCPY, atdma_pdata.cap_mask);
|
||||
platform_device_register(&at_hdmac_device);
|
||||
}
|
||||
#else
|
||||
|
|
|
|||
|
|
@ -34,6 +34,7 @@
|
|||
#include <mach/ep93xx_spi.h>
|
||||
#include <mach/gpio-ep93xx.h>
|
||||
|
||||
#include <asm/hardware/vic.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/map.h>
|
||||
#include <asm/mach/arch.h>
|
||||
|
|
@ -361,6 +362,7 @@ MACHINE_START(VISION_EP9307, "Vision Engraving Systems EP9307")
|
|||
.atag_offset = 0x100,
|
||||
.map_io = vision_map_io,
|
||||
.init_irq = ep93xx_init_irq,
|
||||
.handle_irq = vic_handle_irq,
|
||||
.timer = &ep93xx_timer,
|
||||
.init_machine = vision_init_machine,
|
||||
.restart = ep93xx_restart,
|
||||
|
|
|
|||
|
|
@ -13,6 +13,7 @@
|
|||
#include <linux/i2c.h>
|
||||
#include <linux/gpio_keys.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/fb.h>
|
||||
#include <linux/mfd/max8998.h>
|
||||
#include <linux/regulator/machine.h>
|
||||
|
|
@ -604,6 +605,7 @@ static struct mxt_platform_data qt602240_platform_data = {
|
|||
.threshold = 0x28,
|
||||
.voltage = 2800000, /* 2.8V */
|
||||
.orient = MXT_DIAGONAL,
|
||||
.irqflags = IRQF_TRIGGER_FALLING,
|
||||
};
|
||||
|
||||
static struct i2c_board_info i2c3_devs[] __initdata = {
|
||||
|
|
|
|||
|
|
@ -343,6 +343,7 @@ static void __init omap3_check_revision(const char **cpu_rev)
|
|||
case 0xb944:
|
||||
omap_revision = AM335X_REV_ES1_0;
|
||||
*cpu_rev = "1.0";
|
||||
break;
|
||||
case 0xb8f2:
|
||||
switch (rev) {
|
||||
case 0:
|
||||
|
|
|
|||
|
|
@ -420,8 +420,7 @@ static void __exit omap2_mbox_exit(void)
|
|||
platform_driver_unregister(&omap2_mbox_driver);
|
||||
}
|
||||
|
||||
/* must be ready before omap3isp is probed */
|
||||
subsys_initcall(omap2_mbox_init);
|
||||
module_init(omap2_mbox_init);
|
||||
module_exit(omap2_mbox_exit);
|
||||
|
||||
MODULE_LICENSE("GPL v2");
|
||||
|
|
|
|||
|
|
@ -150,7 +150,8 @@ err_out:
|
|||
platform_device_put(omap_iommu_pdev[i]);
|
||||
return err;
|
||||
}
|
||||
module_init(omap_iommu_init);
|
||||
/* must be ready before omap3isp is probed */
|
||||
subsys_initcall(omap_iommu_init);
|
||||
|
||||
static void __exit omap_iommu_exit(void)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -31,6 +31,7 @@
|
|||
|
||||
#include "common.h"
|
||||
#include "omap4-sar-layout.h"
|
||||
#include <linux/export.h>
|
||||
|
||||
#ifdef CONFIG_CACHE_L2X0
|
||||
static void __iomem *l2cache_base;
|
||||
|
|
@ -55,6 +56,7 @@ void omap_bus_sync(void)
|
|||
isb();
|
||||
}
|
||||
}
|
||||
EXPORT_SYMBOL(omap_bus_sync);
|
||||
|
||||
/* Steal one page physical memory for barrier implementation */
|
||||
int __init omap_barrier_reserve_memblock(void)
|
||||
|
|
|
|||
|
|
@ -270,7 +270,6 @@ static struct regulator_init_data omap4_vusb_idata = {
|
|||
.constraints = {
|
||||
.min_uV = 3300000,
|
||||
.max_uV = 3300000,
|
||||
.apply_uV = true,
|
||||
.valid_modes_mask = REGULATOR_MODE_NORMAL
|
||||
| REGULATOR_MODE_STANDBY,
|
||||
.valid_ops_mask = REGULATOR_CHANGE_MODE
|
||||
|
|
|
|||
|
|
@ -49,7 +49,6 @@ extern unsigned pxa3xx_get_clk_frequency_khz(int);
|
|||
#endif
|
||||
|
||||
extern struct syscore_ops pxa_irq_syscore_ops;
|
||||
extern struct syscore_ops pxa_gpio_syscore_ops;
|
||||
extern struct syscore_ops pxa2xx_mfp_syscore_ops;
|
||||
extern struct syscore_ops pxa3xx_mfp_syscore_ops;
|
||||
|
||||
|
|
|
|||
|
|
@ -97,9 +97,9 @@ static unsigned long hx4700_pin_config[] __initdata = {
|
|||
|
||||
/* BTUART */
|
||||
GPIO42_BTUART_RXD,
|
||||
GPIO43_BTUART_TXD,
|
||||
GPIO43_BTUART_TXD_LPM_LOW,
|
||||
GPIO44_BTUART_CTS,
|
||||
GPIO45_BTUART_RTS,
|
||||
GPIO45_BTUART_RTS_LPM_LOW,
|
||||
|
||||
/* PWM 1 (Backlight) */
|
||||
GPIO17_PWM1_OUT,
|
||||
|
|
@ -802,17 +802,6 @@ static struct platform_device audio = {
|
|||
};
|
||||
|
||||
|
||||
/*
|
||||
* PCMCIA
|
||||
*/
|
||||
|
||||
static struct platform_device pcmcia = {
|
||||
.name = "hx4700-pcmcia",
|
||||
.dev = {
|
||||
.parent = &asic3.dev,
|
||||
},
|
||||
};
|
||||
|
||||
/*
|
||||
* Platform devices
|
||||
*/
|
||||
|
|
@ -829,7 +818,6 @@ static struct platform_device *devices[] __initdata = {
|
|||
&power_supply,
|
||||
&strataflash,
|
||||
&audio,
|
||||
&pcmcia,
|
||||
};
|
||||
|
||||
static struct gpio global_gpios[] = {
|
||||
|
|
@ -845,7 +833,6 @@ static struct gpio global_gpios[] = {
|
|||
{ GPIO32_HX4700_RS232_ON, GPIOF_OUT_INIT_HIGH, "RS232_ON" },
|
||||
{ GPIO71_HX4700_ASIC3_nRESET, GPIOF_OUT_INIT_HIGH, "ASIC3_nRESET" },
|
||||
{ GPIO82_HX4700_EUART_RESET, GPIOF_OUT_INIT_HIGH, "EUART_RESET" },
|
||||
{ GPIO105_HX4700_nIR_ON, GPIOF_OUT_INIT_HIGH, "nIR_EN" },
|
||||
};
|
||||
|
||||
static void __init hx4700_init(void)
|
||||
|
|
|
|||
|
|
@ -158,7 +158,9 @@
|
|||
#define GPIO44_BTUART_CTS MFP_CFG_IN(GPIO44, AF1)
|
||||
#define GPIO42_BTUART_RXD MFP_CFG_IN(GPIO42, AF1)
|
||||
#define GPIO45_BTUART_RTS MFP_CFG_OUT(GPIO45, AF2, DRIVE_HIGH)
|
||||
#define GPIO45_BTUART_RTS_LPM_LOW MFP_CFG_OUT(GPIO45, AF2, DRIVE_LOW)
|
||||
#define GPIO43_BTUART_TXD MFP_CFG_OUT(GPIO43, AF2, DRIVE_HIGH)
|
||||
#define GPIO43_BTUART_TXD_LPM_LOW MFP_CFG_OUT(GPIO43, AF2, DRIVE_LOW)
|
||||
|
||||
/* STUART */
|
||||
#define GPIO46_STUART_RXD MFP_CFG_IN(GPIO46, AF2)
|
||||
|
|
|
|||
|
|
@ -226,6 +226,12 @@ static void __init pxa25x_mfp_init(void)
|
|||
{
|
||||
int i;
|
||||
|
||||
/* running before pxa_gpio_probe() */
|
||||
#ifdef CONFIG_CPU_PXA26x
|
||||
pxa_last_gpio = 89;
|
||||
#else
|
||||
pxa_last_gpio = 84;
|
||||
#endif
|
||||
for (i = 0; i <= pxa_last_gpio; i++)
|
||||
gpio_desc[i].valid = 1;
|
||||
|
||||
|
|
@ -295,6 +301,7 @@ static void __init pxa27x_mfp_init(void)
|
|||
{
|
||||
int i, gpio;
|
||||
|
||||
pxa_last_gpio = 120; /* running before pxa_gpio_probe() */
|
||||
for (i = 0; i <= pxa_last_gpio; i++) {
|
||||
/* skip GPIO2, 5, 6, 7, 8, they are not
|
||||
* valid pins allow configuration
|
||||
|
|
|
|||
|
|
@ -368,7 +368,6 @@ static int __init pxa25x_init(void)
|
|||
|
||||
register_syscore_ops(&pxa_irq_syscore_ops);
|
||||
register_syscore_ops(&pxa2xx_mfp_syscore_ops);
|
||||
register_syscore_ops(&pxa_gpio_syscore_ops);
|
||||
register_syscore_ops(&pxa2xx_clock_syscore_ops);
|
||||
|
||||
ret = platform_add_devices(pxa25x_devices,
|
||||
|
|
|
|||
|
|
@ -456,7 +456,6 @@ static int __init pxa27x_init(void)
|
|||
|
||||
register_syscore_ops(&pxa_irq_syscore_ops);
|
||||
register_syscore_ops(&pxa2xx_mfp_syscore_ops);
|
||||
register_syscore_ops(&pxa_gpio_syscore_ops);
|
||||
register_syscore_ops(&pxa2xx_clock_syscore_ops);
|
||||
|
||||
ret = platform_add_devices(devices, ARRAY_SIZE(devices));
|
||||
|
|
|
|||
|
|
@ -462,7 +462,6 @@ static int __init pxa3xx_init(void)
|
|||
|
||||
register_syscore_ops(&pxa_irq_syscore_ops);
|
||||
register_syscore_ops(&pxa3xx_mfp_syscore_ops);
|
||||
register_syscore_ops(&pxa_gpio_syscore_ops);
|
||||
register_syscore_ops(&pxa3xx_clock_syscore_ops);
|
||||
|
||||
ret = platform_add_devices(devices, ARRAY_SIZE(devices));
|
||||
|
|
|
|||
|
|
@ -283,7 +283,6 @@ static int __init pxa95x_init(void)
|
|||
return ret;
|
||||
|
||||
register_syscore_ops(&pxa_irq_syscore_ops);
|
||||
register_syscore_ops(&pxa_gpio_syscore_ops);
|
||||
register_syscore_ops(&pxa3xx_clock_syscore_ops);
|
||||
|
||||
ret = platform_add_devices(devices, ARRAY_SIZE(devices));
|
||||
|
|
|
|||
|
|
@ -12,6 +12,6 @@
|
|||
#ifndef __ARCH_ARM_MACH_S3C2440_COMMON_H
|
||||
#define __ARCH_ARM_MACH_S3C2440_COMMON_H
|
||||
|
||||
void s3c2440_restart(char mode, const char *cmd);
|
||||
void s3c244x_restart(char mode, const char *cmd);
|
||||
|
||||
#endif /* __ARCH_ARM_MACH_S3C2440_COMMON_H */
|
||||
|
|
|
|||
|
|
@ -487,5 +487,5 @@ MACHINE_START(ANUBIS, "Simtec-Anubis")
|
|||
.init_machine = anubis_init,
|
||||
.init_irq = s3c24xx_init_irq,
|
||||
.timer = &s3c24xx_timer,
|
||||
.restart = s3c2440_restart,
|
||||
.restart = s3c244x_restart,
|
||||
MACHINE_END
|
||||
|
|
|
|||
|
|
@ -222,5 +222,5 @@ MACHINE_START(AT2440EVB, "AT2440EVB")
|
|||
.init_machine = at2440evb_init,
|
||||
.init_irq = s3c24xx_init_irq,
|
||||
.timer = &s3c24xx_timer,
|
||||
.restart = s3c2440_restart,
|
||||
.restart = s3c244x_restart,
|
||||
MACHINE_END
|
||||
|
|
|
|||
|
|
@ -601,5 +601,5 @@ MACHINE_START(NEO1973_GTA02, "GTA02")
|
|||
.init_irq = s3c24xx_init_irq,
|
||||
.init_machine = gta02_machine_init,
|
||||
.timer = &s3c24xx_timer,
|
||||
.restart = s3c2440_restart,
|
||||
.restart = s3c244x_restart,
|
||||
MACHINE_END
|
||||
|
|
|
|||
|
|
@ -701,5 +701,5 @@ MACHINE_START(MINI2440, "MINI2440")
|
|||
.init_machine = mini2440_init,
|
||||
.init_irq = s3c24xx_init_irq,
|
||||
.timer = &s3c24xx_timer,
|
||||
.restart = s3c2440_restart,
|
||||
.restart = s3c244x_restart,
|
||||
MACHINE_END
|
||||
|
|
|
|||
|
|
@ -158,5 +158,5 @@ MACHINE_START(NEXCODER_2440, "NexVision - Nexcoder 2440")
|
|||
.init_machine = nexcoder_init,
|
||||
.init_irq = s3c24xx_init_irq,
|
||||
.timer = &s3c24xx_timer,
|
||||
.restart = s3c2440_restart,
|
||||
.restart = s3c244x_restart,
|
||||
MACHINE_END
|
||||
|
|
|
|||
|
|
@ -436,5 +436,5 @@ MACHINE_START(OSIRIS, "Simtec-OSIRIS")
|
|||
.init_irq = s3c24xx_init_irq,
|
||||
.init_machine = osiris_init,
|
||||
.timer = &s3c24xx_timer,
|
||||
.restart = s3c2440_restart,
|
||||
.restart = s3c244x_restart,
|
||||
MACHINE_END
|
||||
|
|
|
|||
|
|
@ -822,5 +822,5 @@ MACHINE_START(RX1950, "HP iPAQ RX1950")
|
|||
.init_irq = s3c24xx_init_irq,
|
||||
.init_machine = rx1950_init_machine,
|
||||
.timer = &s3c24xx_timer,
|
||||
.restart = s3c2440_restart,
|
||||
.restart = s3c244x_restart,
|
||||
MACHINE_END
|
||||
|
|
|
|||
|
|
@ -213,5 +213,5 @@ MACHINE_START(RX3715, "IPAQ-RX3715")
|
|||
.init_irq = rx3715_init_irq,
|
||||
.init_machine = rx3715_init_machine,
|
||||
.timer = &s3c24xx_timer,
|
||||
.restart = s3c2440_restart,
|
||||
.restart = s3c244x_restart,
|
||||
MACHINE_END
|
||||
|
|
|
|||
|
|
@ -183,5 +183,5 @@ MACHINE_START(S3C2440, "SMDK2440")
|
|||
.map_io = smdk2440_map_io,
|
||||
.init_machine = smdk2440_machine_init,
|
||||
.timer = &s3c24xx_timer,
|
||||
.restart = s3c2440_restart,
|
||||
.restart = s3c244x_restart,
|
||||
MACHINE_END
|
||||
|
|
|
|||
|
|
@ -35,7 +35,6 @@
|
|||
#include <plat/cpu.h>
|
||||
#include <plat/s3c244x.h>
|
||||
#include <plat/pm.h>
|
||||
#include <plat/watchdog-reset.h>
|
||||
|
||||
#include <plat/gpio-core.h>
|
||||
#include <plat/gpio-cfg.h>
|
||||
|
|
@ -74,15 +73,3 @@ void __init s3c2440_map_io(void)
|
|||
s3c24xx_gpiocfg_default.set_pull = s3c24xx_gpio_setpull_1up;
|
||||
s3c24xx_gpiocfg_default.get_pull = s3c24xx_gpio_getpull_1up;
|
||||
}
|
||||
|
||||
void s3c2440_restart(char mode, const char *cmd)
|
||||
{
|
||||
if (mode == 's') {
|
||||
soft_restart(0);
|
||||
}
|
||||
|
||||
arch_wdt_reset();
|
||||
|
||||
/* we'll take a jump through zero as a poor second */
|
||||
soft_restart(0);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -46,6 +46,7 @@
|
|||
#include <plat/pm.h>
|
||||
#include <plat/pll.h>
|
||||
#include <plat/nand-core.h>
|
||||
#include <plat/watchdog-reset.h>
|
||||
|
||||
static struct map_desc s3c244x_iodesc[] __initdata = {
|
||||
IODESC_ENT(CLKPWR),
|
||||
|
|
@ -196,3 +197,14 @@ struct syscore_ops s3c244x_pm_syscore_ops = {
|
|||
.suspend = s3c244x_suspend,
|
||||
.resume = s3c244x_resume,
|
||||
};
|
||||
|
||||
void s3c244x_restart(char mode, const char *cmd)
|
||||
{
|
||||
if (mode == 's')
|
||||
soft_restart(0);
|
||||
|
||||
arch_wdt_reset();
|
||||
|
||||
/* we'll take a jump through zero as a poor second */
|
||||
soft_restart(0);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -5,7 +5,7 @@ config UX500_SOC_COMMON
|
|||
default y
|
||||
select ARM_GIC
|
||||
select HAS_MTU
|
||||
select ARM_ERRATA_753970
|
||||
select PL310_ERRATA_753970
|
||||
select ARM_ERRATA_754322
|
||||
select ARM_ERRATA_764369
|
||||
|
||||
|
|
|
|||
|
|
@ -7,7 +7,7 @@ config ARCH_VEXPRESS_CA9X4
|
|||
select ARM_GIC
|
||||
select ARM_ERRATA_720789
|
||||
select ARM_ERRATA_751472
|
||||
select ARM_ERRATA_753970
|
||||
select PL310_ERRATA_753970
|
||||
select HAVE_SMP
|
||||
select MIGHT_HAVE_CACHE_L2X0
|
||||
|
||||
|
|
|
|||
|
|
@ -230,9 +230,7 @@ __v7_setup:
|
|||
mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register
|
||||
#endif
|
||||
#ifdef CONFIG_ARM_ERRATA_743622
|
||||
teq r6, #0x20 @ present in r2p0
|
||||
teqne r6, #0x21 @ present in r2p1
|
||||
teqne r6, #0x22 @ present in r2p2
|
||||
teq r5, #0x00200000 @ only present in r2p*
|
||||
mrceq p15, 0, r10, c15, c0, 1 @ read diagnostic register
|
||||
orreq r10, r10, #1 << 6 @ set bit #6
|
||||
mcreq p15, 0, r10, c15, c0, 1 @ write diagnostic register
|
||||
|
|
|
|||
|
|
@ -428,8 +428,16 @@
|
|||
#define OMAP_GPMC_NR_IRQS 8
|
||||
#define OMAP_GPMC_IRQ_END (OMAP_GPMC_IRQ_BASE + OMAP_GPMC_NR_IRQS)
|
||||
|
||||
/* PRCM IRQ handler */
|
||||
#ifdef CONFIG_ARCH_OMAP2PLUS
|
||||
#define OMAP_PRCM_IRQ_BASE (OMAP_GPMC_IRQ_END)
|
||||
#define OMAP_PRCM_NR_IRQS 64
|
||||
#define OMAP_PRCM_IRQ_END (OMAP_PRCM_IRQ_BASE + OMAP_PRCM_NR_IRQS)
|
||||
#else
|
||||
#define OMAP_PRCM_IRQ_END OMAP_GPMC_IRQ_END
|
||||
#endif
|
||||
|
||||
#define NR_IRQS OMAP_GPMC_IRQ_END
|
||||
#define NR_IRQS OMAP_PRCM_IRQ_END
|
||||
|
||||
#define OMAP_IRQ_BIT(irq) (1 << ((irq) % 32))
|
||||
|
||||
|
|
|
|||
|
|
@ -1249,7 +1249,7 @@ static void s3c2410_dma_resume(void)
|
|||
struct s3c2410_dma_chan *cp = s3c2410_chans + dma_channels - 1;
|
||||
int channel;
|
||||
|
||||
for (channel = dma_channels - 1; channel >= 0; cp++, channel--)
|
||||
for (channel = dma_channels - 1; channel >= 0; cp--, channel--)
|
||||
s3c2410_dma_resume_chan(cp);
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -1409,7 +1409,7 @@ void __init s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd)
|
|||
|
||||
#ifdef CONFIG_S3C_DEV_USB_HSOTG
|
||||
static struct resource s3c_usb_hsotg_resources[] = {
|
||||
[0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_16K),
|
||||
[0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K),
|
||||
[1] = DEFINE_RES_IRQ(IRQ_OTG),
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -145,11 +145,13 @@ static void clockevent_set_mode(enum clock_event_mode mode,
|
|||
static int clockevent_next_event(unsigned long cycles,
|
||||
struct clock_event_device *clk_event_dev)
|
||||
{
|
||||
u16 val;
|
||||
u16 val = readw(gpt_base + CR(CLKEVT));
|
||||
|
||||
if (val & CTRL_ENABLE)
|
||||
writew(val & ~CTRL_ENABLE, gpt_base + CR(CLKEVT));
|
||||
|
||||
writew(cycles, gpt_base + LOAD(CLKEVT));
|
||||
|
||||
val = readw(gpt_base + CR(CLKEVT));
|
||||
val |= CTRL_ENABLE | CTRL_INT_ENABLE;
|
||||
writew(val, gpt_base + CR(CLKEVT));
|
||||
|
||||
|
|
|
|||
|
|
@ -122,8 +122,8 @@ extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
|
|||
|
||||
extern unsigned long get_wchan(struct task_struct *p);
|
||||
|
||||
#define KSTK_EIP(tsk) (task_pt_regs(task)->pc)
|
||||
#define KSTK_ESP(tsk) (task_pt_regs(task)->sp)
|
||||
#define KSTK_EIP(task) (task_pt_regs(task)->pc)
|
||||
#define KSTK_ESP(task) (task_pt_regs(task)->sp)
|
||||
|
||||
#define cpu_relax() do { } while (0)
|
||||
|
||||
|
|
|
|||
|
|
@ -146,7 +146,7 @@ static int __init alchemy_time_init(unsigned int m2int)
|
|||
cd->shift = 32;
|
||||
cd->mult = div_sc(32768, NSEC_PER_SEC, cd->shift);
|
||||
cd->max_delta_ns = clockevent_delta2ns(0xffffffff, cd);
|
||||
cd->min_delta_ns = clockevent_delta2ns(8, cd); /* ~0.25ms */
|
||||
cd->min_delta_ns = clockevent_delta2ns(9, cd); /* ~0.28ms */
|
||||
clockevents_register_device(cd);
|
||||
setup_irq(m2int, &au1x_rtcmatch2_irqaction);
|
||||
|
||||
|
|
|
|||
|
|
@ -96,7 +96,7 @@ void __init ath79_register_wmac(u8 *cal_data)
|
|||
{
|
||||
if (soc_is_ar913x())
|
||||
ar913x_wmac_setup();
|
||||
if (soc_is_ar933x())
|
||||
else if (soc_is_ar933x())
|
||||
ar933x_wmac_setup();
|
||||
else
|
||||
BUG();
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ CONFIG_HIGH_RES_TIMERS=y
|
|||
# CONFIG_SECCOMP is not set
|
||||
CONFIG_USE_OF=y
|
||||
CONFIG_EXPERIMENTAL=y
|
||||
CONFIG_CROSS_COMPILE="mips-linux-gnu-"
|
||||
CONFIG_CROSS_COMPILE=""
|
||||
# CONFIG_LOCALVERSION_AUTO is not set
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_POSIX_MQUEUE=y
|
||||
|
|
@ -22,7 +22,7 @@ CONFIG_AUDIT=y
|
|||
CONFIG_CGROUPS=y
|
||||
CONFIG_NAMESPACES=y
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_INITRAMFS_SOURCE="usr/dev_file_list usr/rootfs.xlp"
|
||||
CONFIG_INITRAMFS_SOURCE=""
|
||||
CONFIG_RD_BZIP2=y
|
||||
CONFIG_RD_LZMA=y
|
||||
CONFIG_INITRAMFS_COMPRESSION_LZMA=y
|
||||
|
|
|
|||
|
|
@ -8,7 +8,7 @@ CONFIG_HIGH_RES_TIMERS=y
|
|||
CONFIG_PREEMPT_VOLUNTARY=y
|
||||
CONFIG_KEXEC=y
|
||||
CONFIG_EXPERIMENTAL=y
|
||||
CONFIG_CROSS_COMPILE="mips-linux-gnu-"
|
||||
CONFIG_CROSS_COMPILE=""
|
||||
# CONFIG_LOCALVERSION_AUTO is not set
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_POSIX_MQUEUE=y
|
||||
|
|
@ -22,7 +22,7 @@ CONFIG_AUDIT=y
|
|||
CONFIG_NAMESPACES=y
|
||||
CONFIG_SCHED_AUTOGROUP=y
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_INITRAMFS_SOURCE="usr/dev_file_list usr/rootfs.xlr"
|
||||
CONFIG_INITRAMFS_SOURCE=""
|
||||
CONFIG_RD_BZIP2=y
|
||||
CONFIG_RD_LZMA=y
|
||||
CONFIG_INITRAMFS_COMPRESSION_GZIP=y
|
||||
|
|
|
|||
|
|
@ -6,7 +6,7 @@ CONFIG_HZ_1000=y
|
|||
CONFIG_PREEMPT=y
|
||||
# CONFIG_SECCOMP is not set
|
||||
CONFIG_EXPERIMENTAL=y
|
||||
CONFIG_CROSS_COMPILE="mips-linux-"
|
||||
CONFIG_CROSS_COMPILE=""
|
||||
# CONFIG_SWAP is not set
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_LOG_BUF_SHIFT=16
|
||||
|
|
|
|||
|
|
@ -11,6 +11,9 @@
|
|||
#include <asm/io.h>
|
||||
#include <asm/mach-au1x00/au1000.h>
|
||||
|
||||
struct gpio;
|
||||
struct gpio_chip;
|
||||
|
||||
/* with the current GPIC design, up to 128 GPIOs are possible.
|
||||
* The only implementation so far is in the Au1300, which has 75 externally
|
||||
* available GPIOs.
|
||||
|
|
@ -203,7 +206,22 @@ static inline int gpio_request(unsigned int gpio, const char *label)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static inline void gpio_free(unsigned int gpio)
|
||||
static inline int gpio_request_one(unsigned gpio,
|
||||
unsigned long flags, const char *label)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline int gpio_request_array(struct gpio *array, size_t num)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline void gpio_free(unsigned gpio)
|
||||
{
|
||||
}
|
||||
|
||||
static inline void gpio_free_array(struct gpio *array, size_t num)
|
||||
{
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -39,9 +39,6 @@
|
|||
#define HPAGE_MASK (~(HPAGE_SIZE - 1))
|
||||
#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT - PAGE_SHIFT)
|
||||
#else /* !CONFIG_HUGETLB_PAGE */
|
||||
# ifndef BUILD_BUG
|
||||
# define BUILD_BUG() do { extern void __build_bug(void); __build_bug(); } while (0)
|
||||
# endif
|
||||
#define HPAGE_SHIFT ({BUILD_BUG(); 0; })
|
||||
#define HPAGE_SIZE ({BUILD_BUG(); 0; })
|
||||
#define HPAGE_MASK ({BUILD_BUG(); 0; })
|
||||
|
|
|
|||
|
|
@ -8,7 +8,6 @@
|
|||
* SMP support for BMIPS
|
||||
*/
|
||||
|
||||
#include <linux/version.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/mm.h>
|
||||
|
|
|
|||
|
|
@ -1135,7 +1135,7 @@ asmlinkage void do_mt(struct pt_regs *regs)
|
|||
printk(KERN_DEBUG "YIELD Scheduler Exception\n");
|
||||
break;
|
||||
case 5:
|
||||
printk(KERN_DEBUG "Gating Storage Schedulier Exception\n");
|
||||
printk(KERN_DEBUG "Gating Storage Scheduler Exception\n");
|
||||
break;
|
||||
default:
|
||||
printk(KERN_DEBUG "*** UNKNOWN THREAD EXCEPTION %d ***\n",
|
||||
|
|
|
|||
|
|
@ -69,7 +69,6 @@ SECTIONS
|
|||
RODATA
|
||||
|
||||
/* writeable */
|
||||
_sdata = .; /* Start of data section */
|
||||
.data : { /* Data */
|
||||
. = . + DATAOFFSET; /* for CONFIG_MAPPED_KERNEL */
|
||||
|
||||
|
|
|
|||
|
|
@ -42,6 +42,8 @@ asmlinkage void __kprobes do_page_fault(struct pt_regs *regs, unsigned long writ
|
|||
const int field = sizeof(unsigned long) * 2;
|
||||
siginfo_t info;
|
||||
int fault;
|
||||
unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE |
|
||||
(write ? FAULT_FLAG_WRITE : 0);
|
||||
|
||||
#if 0
|
||||
printk("Cpu%d[%s:%d:%0*lx:%ld:%0*lx]\n", raw_smp_processor_id(),
|
||||
|
|
@ -91,6 +93,7 @@ asmlinkage void __kprobes do_page_fault(struct pt_regs *regs, unsigned long writ
|
|||
if (in_atomic() || !mm)
|
||||
goto bad_area_nosemaphore;
|
||||
|
||||
retry:
|
||||
down_read(&mm->mmap_sem);
|
||||
vma = find_vma(mm, address);
|
||||
if (!vma)
|
||||
|
|
@ -144,7 +147,11 @@ good_area:
|
|||
* make sure we exit gracefully rather than endlessly redo
|
||||
* the fault.
|
||||
*/
|
||||
fault = handle_mm_fault(mm, vma, address, write ? FAULT_FLAG_WRITE : 0);
|
||||
fault = handle_mm_fault(mm, vma, address, flags);
|
||||
|
||||
if ((fault & VM_FAULT_RETRY) && fatal_signal_pending(current))
|
||||
return;
|
||||
|
||||
perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, address);
|
||||
if (unlikely(fault & VM_FAULT_ERROR)) {
|
||||
if (fault & VM_FAULT_OOM)
|
||||
|
|
@ -153,12 +160,27 @@ good_area:
|
|||
goto do_sigbus;
|
||||
BUG();
|
||||
}
|
||||
if (fault & VM_FAULT_MAJOR) {
|
||||
perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1, regs, address);
|
||||
tsk->maj_flt++;
|
||||
} else {
|
||||
perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1, regs, address);
|
||||
tsk->min_flt++;
|
||||
if (flags & FAULT_FLAG_ALLOW_RETRY) {
|
||||
if (fault & VM_FAULT_MAJOR) {
|
||||
perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1,
|
||||
regs, address);
|
||||
tsk->maj_flt++;
|
||||
} else {
|
||||
perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1,
|
||||
regs, address);
|
||||
tsk->min_flt++;
|
||||
}
|
||||
if (fault & VM_FAULT_RETRY) {
|
||||
flags &= ~FAULT_FLAG_ALLOW_RETRY;
|
||||
|
||||
/*
|
||||
* No need to up_read(&mm->mmap_sem) as we would
|
||||
* have already released it in __lock_page_or_retry
|
||||
* in mm/filemap.c.
|
||||
*/
|
||||
|
||||
goto retry;
|
||||
}
|
||||
}
|
||||
|
||||
up_read(&mm->mmap_sem);
|
||||
|
|
|
|||
|
|
@ -279,7 +279,6 @@ void __devinit pcibios_fixup_bus(struct pci_bus *bus)
|
|||
{
|
||||
/* Propagate hose info into the subordinate devices. */
|
||||
|
||||
struct list_head *ln;
|
||||
struct pci_dev *dev = bus->self;
|
||||
|
||||
if (pci_probe_only && dev &&
|
||||
|
|
@ -288,9 +287,7 @@ void __devinit pcibios_fixup_bus(struct pci_bus *bus)
|
|||
pcibios_fixup_device_resources(dev, bus);
|
||||
}
|
||||
|
||||
for (ln = bus->devices.next; ln != &bus->devices; ln = ln->next) {
|
||||
dev = pci_dev_b(ln);
|
||||
|
||||
list_for_each_entry(dev, &bus->devices, bus_list) {
|
||||
if ((dev->class >> 8) != PCI_CLASS_BRIDGE_PCI)
|
||||
pcibios_fixup_device_resources(dev, bus);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -35,16 +35,6 @@
|
|||
*/
|
||||
void __init titan_ht_pcibios_fixup_bus(struct pci_bus *bus)
|
||||
{
|
||||
struct pci_bus *current_bus = bus;
|
||||
struct pci_dev *devices;
|
||||
struct list_head *devices_link;
|
||||
|
||||
list_for_each(devices_link, &(current_bus->devices)) {
|
||||
devices = pci_dev_b(devices_link);
|
||||
if (devices == NULL)
|
||||
continue;
|
||||
}
|
||||
|
||||
/*
|
||||
* PLX and SPKT related changes go here
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -102,7 +102,7 @@ static int __init tx_7segled_init_sysfs(void)
|
|||
break;
|
||||
}
|
||||
dev->id = i;
|
||||
dev->dev = &tx_7segled_subsys;
|
||||
dev->bus = &tx_7segled_subsys;
|
||||
error = device_register(dev);
|
||||
if (!error) {
|
||||
device_create_file(dev, &dev_attr_ascii);
|
||||
|
|
|
|||
|
|
@ -315,6 +315,13 @@ static int load_aout_binary(struct linux_binprm *bprm, struct pt_regs *regs)
|
|||
current->mm->free_area_cache = TASK_UNMAPPED_BASE;
|
||||
current->mm->cached_hole_size = 0;
|
||||
|
||||
retval = setup_arg_pages(bprm, IA32_STACK_TOP, EXSTACK_DEFAULT);
|
||||
if (retval < 0) {
|
||||
/* Someone check-me: is this error path enough? */
|
||||
send_sig(SIGKILL, current, 0);
|
||||
return retval;
|
||||
}
|
||||
|
||||
install_exec_creds(bprm);
|
||||
current->flags &= ~PF_FORKNOEXEC;
|
||||
|
||||
|
|
@ -410,13 +417,6 @@ beyond_if:
|
|||
|
||||
set_brk(current->mm->start_brk, current->mm->brk);
|
||||
|
||||
retval = setup_arg_pages(bprm, IA32_STACK_TOP, EXSTACK_DEFAULT);
|
||||
if (retval < 0) {
|
||||
/* Someone check-me: is this error path enough? */
|
||||
send_sig(SIGKILL, current, 0);
|
||||
return retval;
|
||||
}
|
||||
|
||||
current->mm->start_stack =
|
||||
(unsigned long)create_aout_tables((char __user *)bprm->p, bprm);
|
||||
/* start thread */
|
||||
|
|
|
|||
|
|
@ -48,9 +48,9 @@ static void delay_loop(unsigned long loops)
|
|||
}
|
||||
|
||||
/* TSC based delay: */
|
||||
static void delay_tsc(unsigned long loops)
|
||||
static void delay_tsc(unsigned long __loops)
|
||||
{
|
||||
unsigned long bclock, now;
|
||||
u32 bclock, now, loops = __loops;
|
||||
int cpu;
|
||||
|
||||
preempt_disable();
|
||||
|
|
|
|||
|
|
@ -333,13 +333,15 @@ try_again:
|
|||
* Lookup failure means no vma is above this address,
|
||||
* i.e. return with success:
|
||||
*/
|
||||
if (!(vma = find_vma_prev(mm, addr, &prev_vma)))
|
||||
vma = find_vma(mm, addr);
|
||||
if (!vma)
|
||||
return addr;
|
||||
|
||||
/*
|
||||
* new region fits between prev_vma->vm_end and
|
||||
* vma->vm_start, use it:
|
||||
*/
|
||||
prev_vma = vma->vm_prev;
|
||||
if (addr + len <= vma->vm_start &&
|
||||
(!prev_vma || (addr >= prev_vma->vm_end))) {
|
||||
/* remember the address as a hint for next time */
|
||||
|
|
|
|||
|
|
@ -60,6 +60,16 @@ static const struct dmi_system_id pci_use_crs_table[] __initconst = {
|
|||
DMI_MATCH(DMI_BIOS_VENDOR, "American Megatrends Inc."),
|
||||
},
|
||||
},
|
||||
/* https://bugzilla.kernel.org/show_bug.cgi?id=42619 */
|
||||
{
|
||||
.callback = set_use_crs,
|
||||
.ident = "MSI MS-7253",
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_BOARD_VENDOR, "MICRO-STAR INTERNATIONAL CO., LTD"),
|
||||
DMI_MATCH(DMI_BOARD_NAME, "MS-7253"),
|
||||
DMI_MATCH(DMI_BIOS_VENDOR, "Phoenix Technologies, LTD"),
|
||||
},
|
||||
},
|
||||
|
||||
/* Now for the blacklist.. */
|
||||
|
||||
|
|
@ -282,9 +292,6 @@ static void add_resources(struct pci_root_info *info)
|
|||
int i;
|
||||
struct resource *res, *root, *conflict;
|
||||
|
||||
if (!pci_use_crs)
|
||||
return;
|
||||
|
||||
coalesce_windows(info, IORESOURCE_MEM);
|
||||
coalesce_windows(info, IORESOURCE_IO);
|
||||
|
||||
|
|
@ -336,8 +343,13 @@ get_current_resources(struct acpi_device *device, int busnum,
|
|||
acpi_walk_resources(device->handle, METHOD_NAME__CRS, setup_resource,
|
||||
&info);
|
||||
|
||||
add_resources(&info);
|
||||
return;
|
||||
if (pci_use_crs) {
|
||||
add_resources(&info);
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
kfree(info.name);
|
||||
|
||||
name_alloc_fail:
|
||||
kfree(info.res);
|
||||
|
|
|
|||
|
|
@ -3832,7 +3832,7 @@ static int __floppy_read_block_0(struct block_device *bdev)
|
|||
bio.bi_size = size;
|
||||
bio.bi_bdev = bdev;
|
||||
bio.bi_sector = 0;
|
||||
bio.bi_flags = BIO_QUIET;
|
||||
bio.bi_flags = (1 << BIO_QUIET);
|
||||
init_completion(&complete);
|
||||
bio.bi_private = &complete;
|
||||
bio.bi_end_io = floppy_rb0_complete;
|
||||
|
|
|
|||
|
|
@ -321,6 +321,8 @@ static int cdv_chip_setup(struct drm_device *dev)
|
|||
cdv_get_core_freq(dev);
|
||||
gma_intel_opregion_init(dev);
|
||||
psb_intel_init_bios(dev);
|
||||
REG_WRITE(PORT_HOTPLUG_EN, 0);
|
||||
REG_WRITE(PORT_HOTPLUG_STAT, REG_READ(PORT_HOTPLUG_STAT));
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -247,7 +247,6 @@ static struct fb_ops psbfb_roll_ops = {
|
|||
.fb_imageblit = cfb_imageblit,
|
||||
.fb_pan_display = psbfb_pan,
|
||||
.fb_mmap = psbfb_mmap,
|
||||
.fb_sync = psbfb_sync,
|
||||
.fb_ioctl = psbfb_ioctl,
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -446,10 +446,9 @@ int psb_gtt_init(struct drm_device *dev, int resume)
|
|||
pg->gtt_start = pci_resource_start(dev->pdev, PSB_GTT_RESOURCE);
|
||||
gtt_pages = pci_resource_len(dev->pdev, PSB_GTT_RESOURCE)
|
||||
>> PAGE_SHIFT;
|
||||
/* Some CDV firmware doesn't report this currently. In which case the
|
||||
system has 64 gtt pages */
|
||||
/* CDV doesn't report this. In which case the system has 64 gtt pages */
|
||||
if (pg->gtt_start == 0 || gtt_pages == 0) {
|
||||
dev_err(dev->dev, "GTT PCI BAR not initialized.\n");
|
||||
dev_dbg(dev->dev, "GTT PCI BAR not initialized.\n");
|
||||
gtt_pages = 64;
|
||||
pg->gtt_start = dev_priv->pge_ctl;
|
||||
}
|
||||
|
|
@ -461,10 +460,10 @@ int psb_gtt_init(struct drm_device *dev, int resume)
|
|||
|
||||
if (pg->gatt_pages == 0 || pg->gatt_start == 0) {
|
||||
static struct resource fudge; /* Preferably peppermint */
|
||||
/* This can occur on CDV SDV systems. Fudge it in this case.
|
||||
/* This can occur on CDV systems. Fudge it in this case.
|
||||
We really don't care what imaginary space is being allocated
|
||||
at this point */
|
||||
dev_err(dev->dev, "GATT PCI BAR not initialized.\n");
|
||||
dev_dbg(dev->dev, "GATT PCI BAR not initialized.\n");
|
||||
pg->gatt_start = 0x40000000;
|
||||
pg->gatt_pages = (128 * 1024 * 1024) >> PAGE_SHIFT;
|
||||
/* This is a little confusing but in fact the GTT is providing
|
||||
|
|
|
|||
|
|
@ -2362,6 +2362,9 @@ void r600_semaphore_ring_emit(struct radeon_device *rdev,
|
|||
uint64_t addr = semaphore->gpu_addr;
|
||||
unsigned sel = emit_wait ? PACKET3_SEM_SEL_WAIT : PACKET3_SEM_SEL_SIGNAL;
|
||||
|
||||
if (rdev->family < CHIP_CAYMAN)
|
||||
sel |= PACKET3_SEM_WAIT_ON_SIGNAL;
|
||||
|
||||
radeon_ring_write(ring, PACKET3(PACKET3_MEM_SEMAPHORE, 1));
|
||||
radeon_ring_write(ring, addr & 0xffffffff);
|
||||
radeon_ring_write(ring, (upper_32_bits(addr) & 0xff) | sel);
|
||||
|
|
|
|||
|
|
@ -313,6 +313,10 @@ const u32 r6xx_default_state[] =
|
|||
0x00000000, /* VGT_REUSE_OFF */
|
||||
0x00000000, /* VGT_VTX_CNT_EN */
|
||||
|
||||
0xc0016900,
|
||||
0x000000d4,
|
||||
0x00000000, /* SX_MISC */
|
||||
|
||||
0xc0016900,
|
||||
0x000002c8,
|
||||
0x00000000, /* VGT_STRMOUT_BUFFER_EN */
|
||||
|
|
@ -625,6 +629,10 @@ const u32 r7xx_default_state[] =
|
|||
0x00000000, /* VGT_REUSE_OFF */
|
||||
0x00000000, /* VGT_VTX_CNT_EN */
|
||||
|
||||
0xc0016900,
|
||||
0x000000d4,
|
||||
0x00000000, /* SX_MISC */
|
||||
|
||||
0xc0016900,
|
||||
0x000002c8,
|
||||
0x00000000, /* VGT_STRMOUT_BUFFER_EN */
|
||||
|
|
|
|||
|
|
@ -831,6 +831,7 @@
|
|||
#define PACKET3_STRMOUT_BUFFER_UPDATE 0x34
|
||||
#define PACKET3_INDIRECT_BUFFER_MP 0x38
|
||||
#define PACKET3_MEM_SEMAPHORE 0x39
|
||||
# define PACKET3_SEM_WAIT_ON_SIGNAL (0x1 << 12)
|
||||
# define PACKET3_SEM_SEL_SIGNAL (0x6 << 29)
|
||||
# define PACKET3_SEM_SEL_WAIT (0x7 << 29)
|
||||
#define PACKET3_MPEG_INDEX 0x3A
|
||||
|
|
|
|||
|
|
@ -1057,7 +1057,7 @@ static int radeon_dvi_mode_valid(struct drm_connector *connector,
|
|||
(radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_B))
|
||||
return MODE_OK;
|
||||
else if (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_A) {
|
||||
if (ASIC_IS_DCE3(rdev)) {
|
||||
if (0) {
|
||||
/* HDMI 1.3+ supports max clock of 340 Mhz */
|
||||
if (mode->clock > 340000)
|
||||
return MODE_CLOCK_HIGH;
|
||||
|
|
|
|||
|
|
@ -1078,15 +1078,21 @@ static const struct drm_framebuffer_funcs radeon_fb_funcs = {
|
|||
.create_handle = radeon_user_framebuffer_create_handle,
|
||||
};
|
||||
|
||||
void
|
||||
int
|
||||
radeon_framebuffer_init(struct drm_device *dev,
|
||||
struct radeon_framebuffer *rfb,
|
||||
struct drm_mode_fb_cmd2 *mode_cmd,
|
||||
struct drm_gem_object *obj)
|
||||
{
|
||||
int ret;
|
||||
rfb->obj = obj;
|
||||
drm_framebuffer_init(dev, &rfb->base, &radeon_fb_funcs);
|
||||
ret = drm_framebuffer_init(dev, &rfb->base, &radeon_fb_funcs);
|
||||
if (ret) {
|
||||
rfb->obj = NULL;
|
||||
return ret;
|
||||
}
|
||||
drm_helper_mode_fill_fb_struct(&rfb->base, mode_cmd);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct drm_framebuffer *
|
||||
|
|
@ -1096,6 +1102,7 @@ radeon_user_framebuffer_create(struct drm_device *dev,
|
|||
{
|
||||
struct drm_gem_object *obj;
|
||||
struct radeon_framebuffer *radeon_fb;
|
||||
int ret;
|
||||
|
||||
obj = drm_gem_object_lookup(dev, file_priv, mode_cmd->handles[0]);
|
||||
if (obj == NULL) {
|
||||
|
|
@ -1108,7 +1115,12 @@ radeon_user_framebuffer_create(struct drm_device *dev,
|
|||
if (radeon_fb == NULL)
|
||||
return ERR_PTR(-ENOMEM);
|
||||
|
||||
radeon_framebuffer_init(dev, radeon_fb, mode_cmd, obj);
|
||||
ret = radeon_framebuffer_init(dev, radeon_fb, mode_cmd, obj);
|
||||
if (ret) {
|
||||
kfree(radeon_fb);
|
||||
drm_gem_object_unreference_unlocked(obj);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
return &radeon_fb->base;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -307,8 +307,6 @@ void radeon_panel_mode_fixup(struct drm_encoder *encoder,
|
|||
bool radeon_dig_monitor_is_duallink(struct drm_encoder *encoder,
|
||||
u32 pixel_clock)
|
||||
{
|
||||
struct drm_device *dev = encoder->dev;
|
||||
struct radeon_device *rdev = dev->dev_private;
|
||||
struct drm_connector *connector;
|
||||
struct radeon_connector *radeon_connector;
|
||||
struct radeon_connector_atom_dig *dig_connector;
|
||||
|
|
@ -326,7 +324,7 @@ bool radeon_dig_monitor_is_duallink(struct drm_encoder *encoder,
|
|||
case DRM_MODE_CONNECTOR_HDMIB:
|
||||
if (radeon_connector->use_digital) {
|
||||
/* HDMI 1.3 supports up to 340 Mhz over single link */
|
||||
if (ASIC_IS_DCE3(rdev) && drm_detect_hdmi_monitor(radeon_connector->edid)) {
|
||||
if (0 && drm_detect_hdmi_monitor(radeon_connector->edid)) {
|
||||
if (pixel_clock > 340000)
|
||||
return true;
|
||||
else
|
||||
|
|
@ -348,7 +346,7 @@ bool radeon_dig_monitor_is_duallink(struct drm_encoder *encoder,
|
|||
return false;
|
||||
else {
|
||||
/* HDMI 1.3 supports up to 340 Mhz over single link */
|
||||
if (ASIC_IS_DCE3(rdev) && drm_detect_hdmi_monitor(radeon_connector->edid)) {
|
||||
if (0 && drm_detect_hdmi_monitor(radeon_connector->edid)) {
|
||||
if (pixel_clock > 340000)
|
||||
return true;
|
||||
else
|
||||
|
|
|
|||
|
|
@ -209,6 +209,11 @@ static int radeonfb_create(struct radeon_fbdev *rfbdev,
|
|||
sizes->surface_depth);
|
||||
|
||||
ret = radeonfb_create_pinned_object(rfbdev, &mode_cmd, &gobj);
|
||||
if (ret) {
|
||||
DRM_ERROR("failed to create fbcon object %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
rbo = gem_to_radeon_bo(gobj);
|
||||
|
||||
/* okay we have an object now allocate the framebuffer */
|
||||
|
|
@ -220,7 +225,11 @@ static int radeonfb_create(struct radeon_fbdev *rfbdev,
|
|||
|
||||
info->par = rfbdev;
|
||||
|
||||
radeon_framebuffer_init(rdev->ddev, &rfbdev->rfb, &mode_cmd, gobj);
|
||||
ret = radeon_framebuffer_init(rdev->ddev, &rfbdev->rfb, &mode_cmd, gobj);
|
||||
if (ret) {
|
||||
DRM_ERROR("failed to initalise framebuffer %d\n", ret);
|
||||
goto out_unref;
|
||||
}
|
||||
|
||||
fb = &rfbdev->rfb.base;
|
||||
|
||||
|
|
|
|||
|
|
@ -649,7 +649,7 @@ extern void radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
|
|||
u16 blue, int regno);
|
||||
extern void radeon_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green,
|
||||
u16 *blue, int regno);
|
||||
void radeon_framebuffer_init(struct drm_device *dev,
|
||||
int radeon_framebuffer_init(struct drm_device *dev,
|
||||
struct radeon_framebuffer *rfb,
|
||||
struct drm_mode_fb_cmd2 *mode_cmd,
|
||||
struct drm_gem_object *obj);
|
||||
|
|
|
|||
|
|
@ -59,6 +59,9 @@
|
|||
#define USB_VENDOR_ID_AIRCABLE 0x16CA
|
||||
#define USB_DEVICE_ID_AIRCABLE1 0x1502
|
||||
|
||||
#define USB_VENDOR_ID_AIREN 0x1a2c
|
||||
#define USB_DEVICE_ID_AIREN_SLIMPLUS 0x0002
|
||||
|
||||
#define USB_VENDOR_ID_ALCOR 0x058f
|
||||
#define USB_DEVICE_ID_ALCOR_USBRS232 0x9720
|
||||
|
||||
|
|
|
|||
|
|
@ -986,8 +986,13 @@ void hidinput_hid_event(struct hid_device *hid, struct hid_field *field, struct
|
|||
return;
|
||||
}
|
||||
|
||||
/* Ignore out-of-range values as per HID specification, section 5.10 */
|
||||
if (value < field->logical_minimum || value > field->logical_maximum) {
|
||||
/*
|
||||
* Ignore out-of-range values as per HID specification,
|
||||
* section 5.10 and 6.2.25
|
||||
*/
|
||||
if ((field->flags & HID_MAIN_ITEM_VARIABLE) &&
|
||||
(value < field->logical_minimum ||
|
||||
value > field->logical_maximum)) {
|
||||
dbg_hid("Ignoring out-of-range value %x\n", value);
|
||||
return;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -54,6 +54,7 @@ static const struct hid_blacklist {
|
|||
{ USB_VENDOR_ID_PLAYDOTCOM, USB_DEVICE_ID_PLAYDOTCOM_EMS_USBII, HID_QUIRK_MULTI_INPUT },
|
||||
{ USB_VENDOR_ID_TOUCHPACK, USB_DEVICE_ID_TOUCHPACK_RTS, HID_QUIRK_MULTI_INPUT },
|
||||
|
||||
{ USB_VENDOR_ID_AIREN, USB_DEVICE_ID_AIREN_SLIMPLUS, HID_QUIRK_NOGET },
|
||||
{ USB_VENDOR_ID_ATEN, USB_DEVICE_ID_ATEN_UC100KM, HID_QUIRK_NOGET },
|
||||
{ USB_VENDOR_ID_ATEN, USB_DEVICE_ID_ATEN_CS124U, HID_QUIRK_NOGET },
|
||||
{ USB_VENDOR_ID_ATEN, USB_DEVICE_ID_ATEN_2PORTKVM, HID_QUIRK_NOGET },
|
||||
|
|
|
|||
|
|
@ -497,8 +497,9 @@ config SENSORS_JC42
|
|||
If you say yes here, you get support for JEDEC JC42.4 compliant
|
||||
temperature sensors, which are used on many DDR3 memory modules for
|
||||
mobile devices and servers. Support will include, but not be limited
|
||||
to, ADT7408, CAT34TS02, CAT6095, MAX6604, MCP9805, MCP98242, MCP98243,
|
||||
MCP9843, SE97, SE98, STTS424(E), TSE2002B3, and TS3000B3.
|
||||
to, ADT7408, AT30TS00, CAT34TS02, CAT6095, MAX6604, MCP9804, MCP9805,
|
||||
MCP98242, MCP98243, MCP9843, SE97, SE98, STTS424(E), STTS2002,
|
||||
STTS3000, TSE2002B3, TSE2002GB2, TS3000B3, and TS3000GB2.
|
||||
|
||||
This driver can also be built as a module. If so, the module
|
||||
will be called jc42.
|
||||
|
|
|
|||
|
|
@ -64,6 +64,7 @@ static const unsigned short normal_i2c[] = {
|
|||
|
||||
/* Manufacturer IDs */
|
||||
#define ADT_MANID 0x11d4 /* Analog Devices */
|
||||
#define ATMEL_MANID 0x001f /* Atmel */
|
||||
#define MAX_MANID 0x004d /* Maxim */
|
||||
#define IDT_MANID 0x00b3 /* IDT */
|
||||
#define MCP_MANID 0x0054 /* Microchip */
|
||||
|
|
@ -77,15 +78,25 @@ static const unsigned short normal_i2c[] = {
|
|||
#define ADT7408_DEVID 0x0801
|
||||
#define ADT7408_DEVID_MASK 0xffff
|
||||
|
||||
/* Atmel */
|
||||
#define AT30TS00_DEVID 0x8201
|
||||
#define AT30TS00_DEVID_MASK 0xffff
|
||||
|
||||
/* IDT */
|
||||
#define TS3000B3_DEVID 0x2903 /* Also matches TSE2002B3 */
|
||||
#define TS3000B3_DEVID_MASK 0xffff
|
||||
|
||||
#define TS3000GB2_DEVID 0x2912 /* Also matches TSE2002GB2 */
|
||||
#define TS3000GB2_DEVID_MASK 0xffff
|
||||
|
||||
/* Maxim */
|
||||
#define MAX6604_DEVID 0x3e00
|
||||
#define MAX6604_DEVID_MASK 0xffff
|
||||
|
||||
/* Microchip */
|
||||
#define MCP9804_DEVID 0x0200
|
||||
#define MCP9804_DEVID_MASK 0xfffc
|
||||
|
||||
#define MCP98242_DEVID 0x2000
|
||||
#define MCP98242_DEVID_MASK 0xfffc
|
||||
|
||||
|
|
@ -113,6 +124,12 @@ static const unsigned short normal_i2c[] = {
|
|||
#define STTS424E_DEVID 0x0000
|
||||
#define STTS424E_DEVID_MASK 0xfffe
|
||||
|
||||
#define STTS2002_DEVID 0x0300
|
||||
#define STTS2002_DEVID_MASK 0xffff
|
||||
|
||||
#define STTS3000_DEVID 0x0200
|
||||
#define STTS3000_DEVID_MASK 0xffff
|
||||
|
||||
static u16 jc42_hysteresis[] = { 0, 1500, 3000, 6000 };
|
||||
|
||||
struct jc42_chips {
|
||||
|
|
@ -123,8 +140,11 @@ struct jc42_chips {
|
|||
|
||||
static struct jc42_chips jc42_chips[] = {
|
||||
{ ADT_MANID, ADT7408_DEVID, ADT7408_DEVID_MASK },
|
||||
{ ATMEL_MANID, AT30TS00_DEVID, AT30TS00_DEVID_MASK },
|
||||
{ IDT_MANID, TS3000B3_DEVID, TS3000B3_DEVID_MASK },
|
||||
{ IDT_MANID, TS3000GB2_DEVID, TS3000GB2_DEVID_MASK },
|
||||
{ MAX_MANID, MAX6604_DEVID, MAX6604_DEVID_MASK },
|
||||
{ MCP_MANID, MCP9804_DEVID, MCP9804_DEVID_MASK },
|
||||
{ MCP_MANID, MCP98242_DEVID, MCP98242_DEVID_MASK },
|
||||
{ MCP_MANID, MCP98243_DEVID, MCP98243_DEVID_MASK },
|
||||
{ MCP_MANID, MCP9843_DEVID, MCP9843_DEVID_MASK },
|
||||
|
|
@ -133,6 +153,8 @@ static struct jc42_chips jc42_chips[] = {
|
|||
{ NXP_MANID, SE98_DEVID, SE98_DEVID_MASK },
|
||||
{ STM_MANID, STTS424_DEVID, STTS424_DEVID_MASK },
|
||||
{ STM_MANID, STTS424E_DEVID, STTS424E_DEVID_MASK },
|
||||
{ STM_MANID, STTS2002_DEVID, STTS2002_DEVID_MASK },
|
||||
{ STM_MANID, STTS3000_DEVID, STTS3000_DEVID_MASK },
|
||||
};
|
||||
|
||||
/* Each client has this additional data */
|
||||
|
|
@ -159,10 +181,12 @@ static struct jc42_data *jc42_update_device(struct device *dev);
|
|||
|
||||
static const struct i2c_device_id jc42_id[] = {
|
||||
{ "adt7408", 0 },
|
||||
{ "at30ts00", 0 },
|
||||
{ "cat94ts02", 0 },
|
||||
{ "cat6095", 0 },
|
||||
{ "jc42", 0 },
|
||||
{ "max6604", 0 },
|
||||
{ "mcp9804", 0 },
|
||||
{ "mcp9805", 0 },
|
||||
{ "mcp98242", 0 },
|
||||
{ "mcp98243", 0 },
|
||||
|
|
@ -171,8 +195,10 @@ static const struct i2c_device_id jc42_id[] = {
|
|||
{ "se97b", 0 },
|
||||
{ "se98", 0 },
|
||||
{ "stts424", 0 },
|
||||
{ "tse2002b3", 0 },
|
||||
{ "ts3000b3", 0 },
|
||||
{ "stts2002", 0 },
|
||||
{ "stts3000", 0 },
|
||||
{ "tse2002", 0 },
|
||||
{ "ts3000", 0 },
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(i2c, jc42_id);
|
||||
|
|
|
|||
|
|
@ -54,7 +54,8 @@
|
|||
lcrit_alarm, crit_alarm */
|
||||
#define PMBUS_IOUT_BOOLEANS_PER_PAGE 3 /* alarm, lcrit_alarm,
|
||||
crit_alarm */
|
||||
#define PMBUS_POUT_BOOLEANS_PER_PAGE 2 /* alarm, crit_alarm */
|
||||
#define PMBUS_POUT_BOOLEANS_PER_PAGE 3 /* cap_alarm, alarm, crit_alarm
|
||||
*/
|
||||
#define PMBUS_MAX_BOOLEANS_PER_FAN 2 /* alarm, fault */
|
||||
#define PMBUS_MAX_BOOLEANS_PER_TEMP 4 /* min_alarm, max_alarm,
|
||||
lcrit_alarm, crit_alarm */
|
||||
|
|
|
|||
|
|
@ -33,6 +33,7 @@ enum chips { zl2004, zl2005, zl2006, zl2008, zl2105, zl2106, zl6100, zl6105 };
|
|||
struct zl6100_data {
|
||||
int id;
|
||||
ktime_t access; /* chip access time */
|
||||
int delay; /* Delay between chip accesses in uS */
|
||||
struct pmbus_driver_info info;
|
||||
};
|
||||
|
||||
|
|
@ -52,10 +53,10 @@ MODULE_PARM_DESC(delay, "Delay between chip accesses in uS");
|
|||
/* Some chips need a delay between accesses */
|
||||
static inline void zl6100_wait(const struct zl6100_data *data)
|
||||
{
|
||||
if (delay) {
|
||||
if (data->delay) {
|
||||
s64 delta = ktime_us_delta(ktime_get(), data->access);
|
||||
if (delta < delay)
|
||||
udelay(delay - delta);
|
||||
if (delta < data->delay)
|
||||
udelay(data->delay - delta);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -207,8 +208,9 @@ static int zl6100_probe(struct i2c_client *client,
|
|||
* can be cleared later for additional chips if tests show that it
|
||||
* is not needed (in other words, better be safe than sorry).
|
||||
*/
|
||||
data->delay = delay;
|
||||
if (data->id == zl2004 || data->id == zl6105)
|
||||
delay = 0;
|
||||
data->delay = 0;
|
||||
|
||||
/*
|
||||
* Since there was a direct I2C device access above, wait before
|
||||
|
|
|
|||
|
|
@ -332,7 +332,7 @@ static ssize_t evdev_write(struct file *file, const char __user *buffer,
|
|||
struct evdev_client *client = file->private_data;
|
||||
struct evdev *evdev = client->evdev;
|
||||
struct input_event event;
|
||||
int retval;
|
||||
int retval = 0;
|
||||
|
||||
if (count < input_event_size())
|
||||
return -EINVAL;
|
||||
|
|
|
|||
|
|
@ -172,7 +172,7 @@ static void twl4030_vibra_close(struct input_dev *input)
|
|||
}
|
||||
|
||||
/*** Module ***/
|
||||
#if CONFIG_PM
|
||||
#if CONFIG_PM_SLEEP
|
||||
static int twl4030_vibra_suspend(struct device *dev)
|
||||
{
|
||||
struct platform_device *pdev = to_platform_device(dev);
|
||||
|
|
@ -189,10 +189,10 @@ static int twl4030_vibra_resume(struct device *dev)
|
|||
vibra_disable_leds();
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static SIMPLE_DEV_PM_OPS(twl4030_vibra_pm_ops,
|
||||
twl4030_vibra_suspend, twl4030_vibra_resume);
|
||||
#endif
|
||||
|
||||
static int __devinit twl4030_vibra_probe(struct platform_device *pdev)
|
||||
{
|
||||
|
|
@ -273,9 +273,7 @@ static struct platform_driver twl4030_vibra_driver = {
|
|||
.driver = {
|
||||
.name = "twl4030-vibra",
|
||||
.owner = THIS_MODULE,
|
||||
#ifdef CONFIG_PM
|
||||
.pm = &twl4030_vibra_pm_ops,
|
||||
#endif
|
||||
},
|
||||
};
|
||||
module_platform_driver(twl4030_vibra_driver);
|
||||
|
|
|
|||
|
|
@ -952,7 +952,9 @@ static const struct alps_model_info *alps_get_model(struct psmouse *psmouse, int
|
|||
|
||||
/*
|
||||
* First try "E6 report".
|
||||
* ALPS should return 0,0,10 or 0,0,100
|
||||
* ALPS should return 0,0,10 or 0,0,100 if no buttons are pressed.
|
||||
* The bits 0-2 of the first byte will be 1s if some buttons are
|
||||
* pressed.
|
||||
*/
|
||||
param[0] = 0;
|
||||
if (ps2_command(ps2dev, param, PSMOUSE_CMD_SETRES) ||
|
||||
|
|
@ -968,7 +970,8 @@ static const struct alps_model_info *alps_get_model(struct psmouse *psmouse, int
|
|||
psmouse_dbg(psmouse, "E6 report: %2.2x %2.2x %2.2x",
|
||||
param[0], param[1], param[2]);
|
||||
|
||||
if (param[0] != 0 || param[1] != 0 || (param[2] != 10 && param[2] != 100))
|
||||
if ((param[0] & 0xf8) != 0 || param[1] != 0 ||
|
||||
(param[2] != 10 && param[2] != 100))
|
||||
return NULL;
|
||||
|
||||
/*
|
||||
|
|
|
|||
|
|
@ -77,6 +77,8 @@ config TABLET_USB_WACOM
|
|||
tristate "Wacom Intuos/Graphire tablet support (USB)"
|
||||
depends on USB_ARCH_HAS_HCD
|
||||
select USB
|
||||
select NEW_LEDS
|
||||
select LEDS_CLASS
|
||||
help
|
||||
Say Y here if you want to use the USB version of the Wacom Intuos
|
||||
or Graphire tablet. Make sure to say Y to "Mouse support"
|
||||
|
|
|
|||
|
|
@ -926,7 +926,7 @@ static int wacom_bpt3_touch(struct wacom_wac *wacom)
|
|||
{
|
||||
struct input_dev *input = wacom->input;
|
||||
unsigned char *data = wacom->data;
|
||||
int count = data[1] & 0x03;
|
||||
int count = data[1] & 0x07;
|
||||
int i;
|
||||
|
||||
if (data[0] != 0x02)
|
||||
|
|
|
|||
|
|
@ -275,7 +275,7 @@ static void iommu_set_exclusion_range(struct amd_iommu *iommu)
|
|||
}
|
||||
|
||||
/* Programs the physical address of the device table into the IOMMU hardware */
|
||||
static void __init iommu_set_device_table(struct amd_iommu *iommu)
|
||||
static void iommu_set_device_table(struct amd_iommu *iommu)
|
||||
{
|
||||
u64 entry;
|
||||
|
||||
|
|
|
|||
|
|
@ -323,7 +323,7 @@ static int flakey_end_io(struct dm_target *ti, struct bio *bio,
|
|||
* Corrupt successful READs while in down state.
|
||||
* If flags were specified, only corrupt those that match.
|
||||
*/
|
||||
if (!error && bio_submitted_while_down &&
|
||||
if (fc->corrupt_bio_byte && !error && bio_submitted_while_down &&
|
||||
(bio_data_dir(bio) == READ) && (fc->corrupt_bio_rw == READ) &&
|
||||
all_corrupt_bio_flags_match(bio, fc))
|
||||
corrupt_bio_data(bio, fc);
|
||||
|
|
|
|||
|
|
@ -296,6 +296,8 @@ static void do_region(int rw, unsigned region, struct dm_io_region *where,
|
|||
unsigned offset;
|
||||
unsigned num_bvecs;
|
||||
sector_t remaining = where->count;
|
||||
struct request_queue *q = bdev_get_queue(where->bdev);
|
||||
sector_t discard_sectors;
|
||||
|
||||
/*
|
||||
* where->count may be zero if rw holds a flush and we need to
|
||||
|
|
@ -305,9 +307,12 @@ static void do_region(int rw, unsigned region, struct dm_io_region *where,
|
|||
/*
|
||||
* Allocate a suitably sized-bio.
|
||||
*/
|
||||
num_bvecs = dm_sector_div_up(remaining,
|
||||
(PAGE_SIZE >> SECTOR_SHIFT));
|
||||
num_bvecs = min_t(int, bio_get_nr_vecs(where->bdev), num_bvecs);
|
||||
if (rw & REQ_DISCARD)
|
||||
num_bvecs = 1;
|
||||
else
|
||||
num_bvecs = min_t(int, bio_get_nr_vecs(where->bdev),
|
||||
dm_sector_div_up(remaining, (PAGE_SIZE >> SECTOR_SHIFT)));
|
||||
|
||||
bio = bio_alloc_bioset(GFP_NOIO, num_bvecs, io->client->bios);
|
||||
bio->bi_sector = where->sector + (where->count - remaining);
|
||||
bio->bi_bdev = where->bdev;
|
||||
|
|
@ -315,10 +320,14 @@ static void do_region(int rw, unsigned region, struct dm_io_region *where,
|
|||
bio->bi_destructor = dm_bio_destructor;
|
||||
store_io_and_region_in_bio(bio, io, region);
|
||||
|
||||
/*
|
||||
* Try and add as many pages as possible.
|
||||
*/
|
||||
while (remaining) {
|
||||
if (rw & REQ_DISCARD) {
|
||||
discard_sectors = min_t(sector_t, q->limits.max_discard_sectors, remaining);
|
||||
bio->bi_size = discard_sectors << SECTOR_SHIFT;
|
||||
remaining -= discard_sectors;
|
||||
} else while (remaining) {
|
||||
/*
|
||||
* Try and add as many pages as possible.
|
||||
*/
|
||||
dp->get_page(dp, &page, &len, &offset);
|
||||
len = min(len, to_bytes(remaining));
|
||||
if (!bio_add_page(bio, page, len, offset))
|
||||
|
|
|
|||
|
|
@ -1437,7 +1437,7 @@ static int target_message(struct dm_ioctl *param, size_t param_size)
|
|||
|
||||
if (!argc) {
|
||||
DMWARN("Empty message received.");
|
||||
goto out;
|
||||
goto out_argv;
|
||||
}
|
||||
|
||||
table = dm_get_live_table(md);
|
||||
|
|
|
|||
|
|
@ -668,7 +668,14 @@ static int super_load(struct md_rdev *rdev, struct md_rdev *refdev)
|
|||
return ret;
|
||||
|
||||
sb = page_address(rdev->sb_page);
|
||||
if (sb->magic != cpu_to_le32(DM_RAID_MAGIC)) {
|
||||
|
||||
/*
|
||||
* Two cases that we want to write new superblocks and rebuild:
|
||||
* 1) New device (no matching magic number)
|
||||
* 2) Device specified for rebuild (!In_sync w/ offset == 0)
|
||||
*/
|
||||
if ((sb->magic != cpu_to_le32(DM_RAID_MAGIC)) ||
|
||||
(!test_bit(In_sync, &rdev->flags) && !rdev->recovery_offset)) {
|
||||
super_sync(rdev->mddev, rdev);
|
||||
|
||||
set_bit(FirstUse, &rdev->flags);
|
||||
|
|
@ -745,11 +752,8 @@ static int super_init_validation(struct mddev *mddev, struct md_rdev *rdev)
|
|||
*/
|
||||
rdev_for_each(r, t, mddev) {
|
||||
if (!test_bit(In_sync, &r->flags)) {
|
||||
if (!test_bit(FirstUse, &r->flags))
|
||||
DMERR("Superblock area of "
|
||||
"rebuild device %d should have been "
|
||||
"cleared.", r->raid_disk);
|
||||
set_bit(FirstUse, &r->flags);
|
||||
DMINFO("Device %d specified for rebuild: "
|
||||
"Clearing superblock", r->raid_disk);
|
||||
rebuilds++;
|
||||
} else if (test_bit(FirstUse, &r->flags))
|
||||
new_devs++;
|
||||
|
|
@ -971,6 +975,7 @@ static int raid_ctr(struct dm_target *ti, unsigned argc, char **argv)
|
|||
|
||||
INIT_WORK(&rs->md.event_work, do_table_event);
|
||||
ti->private = rs;
|
||||
ti->num_flush_requests = 1;
|
||||
|
||||
mutex_lock(&rs->md.reconfig_mutex);
|
||||
ret = md_run(&rs->md);
|
||||
|
|
|
|||
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