bus: omap_l3_noc: use of_match_data to pick up SoC information
DRA7xx SoC has the same l3-noc interconnect ip (as OMAP4 and OMAP5), but AM437x SoC has just 2 modules instead of 3 which other SoCs have. So, stop using direct access of array indices and use of->match data and simplify implementation to benefit future usage. While at it, rename a few very generic variables to make them omap specific. This helps us differentiate from DRA7 and AM43xx data in the future. NOTE: None of the platforms that use omap_l3_noc are non-device tree anymore. So, it is safe to assume OF match here. Signed-off-by: Sricharan R <r.sricharan@ti.com> Signed-off-by: Rajendra Nayak <rnayak@ti.com> [nm@ti.com: split, refactor and optimize logic] Signed-off-by: Nishanth Menon <nm@ti.com> Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Tested-by: Darren Etheridge <detheridge@ti.com> Tested-by: Sekhar Nori <nsekhar@ti.com>
This commit is contained in:
Sricharan R
Nishanth Menon
Родитель
3340d739f8
Коммит
0659452dd2
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@ -14,12 +14,14 @@
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* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/platform_device.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of_device.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include "omap_l3_noc.h"
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@ -58,17 +60,18 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
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void __iomem *l3_targ_stderr, *l3_targ_slvofslsb, *l3_targ_mstaddr;
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char *target_name, *master_name = "UN IDENTIFIED";
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struct l3_target_data *l3_targ_inst;
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struct l3_masters_data *master;
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/* Get the Type of interrupt */
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inttype = irq == l3->app_irq ? L3_APPLICATION_ERROR : L3_DEBUG_ERROR;
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for (i = 0; i < L3_MODULES; i++) {
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for (i = 0; i < l3->num_modules; i++) {
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/*
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* Read the regerr register of the clock domain
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* to determine the source
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*/
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base = l3->l3_base[i];
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err_reg = readl_relaxed(base + l3_flagmux[i] +
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err_reg = readl_relaxed(base + l3->l3_flagmux[i] +
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L3_FLAGMUX_REGERR0 + (inttype << 3));
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/* Get the corresponding error and analyse */
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@ -79,7 +82,7 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
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/* We DONOT expect err_src to go out of bounds */
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BUG_ON(err_src > MAX_CLKDM_TARGETS);
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l3_targ_inst = &l3_targ[i][err_src];
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l3_targ_inst = &l3->l3_targ[i][err_src];
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target_name = l3_targ_inst->name;
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l3_targ_base = base + l3_targ_inst->offset;
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@ -101,7 +104,7 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
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inttype ? "debug" : "application",
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err_src, i, "(unclearable)");
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mask_reg = base + l3_flagmux[i] +
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mask_reg = base + l3->l3_flagmux[i] +
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L3_FLAGMUX_MASK0 + (inttype << 3);
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mask_val = readl_relaxed(mask_reg);
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mask_val &= ~(1 << err_src);
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@ -131,10 +134,12 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
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break;
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case CUSTOM_ERROR:
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for (k = 0; k < NUM_OF_L3_MASTERS; k++) {
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if (masterid == l3_masters[k].id)
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master_name =
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l3_masters[k].name;
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for (k = 0, master = l3->l3_masters;
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k < l3->num_masters; k++, master++) {
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if (masterid == master->id) {
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master_name = master->name;
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break;
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}
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}
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WARN(true, "L3 custom error: MASTER:%s TARGET:%s\n",
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master_name, target_name);
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@ -154,20 +159,34 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
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return IRQ_HANDLED;
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}
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static const struct of_device_id l3_noc_match[] = {
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{.compatible = "ti,omap4-l3-noc", .data = &omap_l3_data},
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{},
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};
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MODULE_DEVICE_TABLE(of, l3_noc_match);
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static int omap_l3_probe(struct platform_device *pdev)
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{
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const struct of_device_id *of_id;
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static struct omap_l3 *l3;
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int ret, i;
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of_id = of_match_device(l3_noc_match, &pdev->dev);
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if (!of_id) {
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dev_err(&pdev->dev, "OF data missing\n");
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return -EINVAL;
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}
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l3 = devm_kzalloc(&pdev->dev, sizeof(*l3), GFP_KERNEL);
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if (!l3)
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return -ENOMEM;
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memcpy(l3, of_id->data, sizeof(*l3));
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l3->dev = &pdev->dev;
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platform_set_drvdata(pdev, l3);
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/* Get mem resources */
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for (i = 0; i < L3_MODULES; i++) {
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for (i = 0; i < l3->num_modules; i++) {
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struct resource *res = platform_get_resource(pdev,
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IORESOURCE_MEM, i);
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@ -199,22 +218,12 @@ static int omap_l3_probe(struct platform_device *pdev)
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return ret;
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}
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#if defined(CONFIG_OF)
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static const struct of_device_id l3_noc_match[] = {
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{.compatible = "ti,omap4-l3-noc", },
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{},
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};
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MODULE_DEVICE_TABLE(of, l3_noc_match);
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#else
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#define l3_noc_match NULL
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#endif
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static struct platform_driver omap_l3_driver = {
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.probe = omap_l3_probe,
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.driver = {
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.name = "omap_l3_noc",
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.owner = THIS_MODULE,
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.of_match_table = l3_noc_match,
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.of_match_table = of_match_ptr(l3_noc_match),
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},
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};
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@ -17,7 +17,9 @@
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#ifndef __OMAP_L3_NOC_H
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#define __OMAP_L3_NOC_H
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#define L3_MODULES 3
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#define OMAP_L3_MODULES 3
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#define MAX_L3_MODULES 3
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#define CLEAR_STDERR_LOG (1 << 31)
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#define CUSTOM_ERROR 0x2
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#define STANDARD_ERROR 0x0
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@ -36,8 +38,6 @@
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#define MAX_CLKDM_TARGETS 31
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#define NUM_OF_L3_MASTERS (sizeof(l3_masters)/sizeof(l3_masters[0]))
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/**
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* struct l3_masters_data - L3 Master information
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* @id: ID of the L3 Master
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@ -60,13 +60,47 @@ struct l3_target_data {
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char *name;
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};
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static u32 l3_flagmux[L3_MODULES] = {
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/**
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* struct omap_l3 - Description of data relevant for L3 bus.
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* @dev: device representing the bus (populated runtime)
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* @l3_base: base addresses of modules (populated runtime)
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* @l3_flag_mux: array containing offsets to flag mux per module
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* offset from corresponding module base indexed per
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* module.
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* @num_modules: number of clock domains / modules.
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* @l3_masters: array pointing to master data containing name and register
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* offset for the master.
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* @num_master: number of masters
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* @l3_targ: array indexed by flagmux index (bit offset) pointing to the
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* target data. unsupported ones are marked with
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* L3_TARGET_NOT_SUPPORTED
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* @debug_irq: irq number of the debug interrupt (populated runtime)
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* @app_irq: irq number of the application interrupt (populated runtime)
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*/
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struct omap_l3 {
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struct device *dev;
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void __iomem *l3_base[MAX_L3_MODULES];
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u32 *l3_flagmux;
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int num_modules;
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struct l3_masters_data *l3_masters;
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int num_masters;
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struct l3_target_data **l3_targ;
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int debug_irq;
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int app_irq;
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};
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static u32 omap_l3_flagmux[OMAP_L3_MODULES] = {
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0x500,
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0x1000,
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0X0200
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};
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static struct l3_target_data l3_target_inst_data_clk1[MAX_CLKDM_TARGETS] = {
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static struct l3_target_data omap_l3_target_data_clk1[MAX_CLKDM_TARGETS] = {
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{0x100, "DMM1",},
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{0x200, "DMM2",},
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{0x300, "ABE",},
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@ -76,7 +110,7 @@ static struct l3_target_data l3_target_inst_data_clk1[MAX_CLKDM_TARGETS] = {
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{0x900, "L4WAKEUP",},
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};
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static struct l3_target_data l3_target_inst_data_clk2[MAX_CLKDM_TARGETS] = {
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static struct l3_target_data omap_l3_target_data_clk2[MAX_CLKDM_TARGETS] = {
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{0x500, "CORTEXM3",},
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{0x300, "DSS",},
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{0x100, "GPMC",},
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@ -100,13 +134,13 @@ static struct l3_target_data l3_target_inst_data_clk2[MAX_CLKDM_TARGETS] = {
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{0x1700, "LLI",},
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};
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static struct l3_target_data l3_target_inst_data_clk3[MAX_CLKDM_TARGETS] = {
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static struct l3_target_data omap_l3_target_data_clk3[MAX_CLKDM_TARGETS] = {
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{0x0100, "EMUSS",},
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{0x0300, "DEBUG SOURCE",},
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{0x0, "HOST CLK3",},
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};
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static struct l3_masters_data l3_masters[] = {
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static struct l3_masters_data omap_l3_masters[] = {
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{ 0x0 , "MPU"},
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{ 0x10, "CS_ADP"},
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{ 0x14, "xxx"},
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@ -134,20 +168,18 @@ static struct l3_masters_data l3_masters[] = {
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{ 0xC8, "USBHOSTFS"}
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};
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static struct l3_target_data *l3_targ[L3_MODULES] = {
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l3_target_inst_data_clk1,
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l3_target_inst_data_clk2,
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l3_target_inst_data_clk3,
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static struct l3_target_data *omap_l3_targ[OMAP_L3_MODULES] = {
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omap_l3_target_data_clk1,
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omap_l3_target_data_clk2,
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omap_l3_target_data_clk3,
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};
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struct omap_l3 {
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struct device *dev;
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/* memory base */
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void __iomem *l3_base[L3_MODULES];
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int debug_irq;
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int app_irq;
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static const struct omap_l3 omap_l3_data = {
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.l3_flagmux = omap_l3_flagmux,
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.num_modules = OMAP_L3_MODULES,
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.l3_masters = omap_l3_masters,
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.num_masters = ARRAY_SIZE(omap_l3_masters),
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.l3_targ = omap_l3_targ,
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};
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#endif /* __OMAP_L3_NOC_H */
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