ARM: mx3/lilly1131: add USB support
Signed-off-by: Daniel Mack <daniel@caiaq.de> Cc: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Daniel Mack
Sascha Hauer
Родитель
63f4079b6a
Коммит
066fb84720
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@ -82,6 +82,7 @@ config MACH_MX31MOBOARD
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config MACH_MX31LILLY
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bool "Support MX31 LILLY-1131 platforms (INCO startec)"
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select ARCH_MX31
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select MXC_ULPI if USB_ULPI
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help
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Include support for mx31 based LILLY1131 modules. This includes
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specific configurations for the board and its peripherals.
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@ -27,12 +27,15 @@
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/clk.h>
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#include <linux/gpio.h>
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#include <linux/platform_device.h>
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#include <linux/interrupt.h>
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#include <linux/smsc911x.h>
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#include <linux/mtd/physmap.h>
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#include <linux/spi/spi.h>
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#include <linux/mfd/mc13783.h>
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#include <linux/usb/otg.h>
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#include <linux/usb/ulpi.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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@ -44,6 +47,8 @@
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#include <mach/iomux-mx3.h>
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#include <mach/board-mx31lilly.h>
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#include <mach/spi.h>
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#include <mach/mxc_ehci.h>
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#include <mach/ulpi.h>
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#include "devices.h"
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@ -108,6 +113,137 @@ static struct platform_device physmap_flash_device = {
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.num_resources = 1,
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};
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/* USB */
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#define USB_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \
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PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)
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static int usbotg_init(struct platform_device *pdev)
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{
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unsigned int pins[] = {
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MX31_PIN_USBOTG_DATA0__USBOTG_DATA0,
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MX31_PIN_USBOTG_DATA1__USBOTG_DATA1,
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MX31_PIN_USBOTG_DATA2__USBOTG_DATA2,
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MX31_PIN_USBOTG_DATA3__USBOTG_DATA3,
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MX31_PIN_USBOTG_DATA4__USBOTG_DATA4,
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MX31_PIN_USBOTG_DATA5__USBOTG_DATA5,
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MX31_PIN_USBOTG_DATA6__USBOTG_DATA6,
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MX31_PIN_USBOTG_DATA7__USBOTG_DATA7,
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MX31_PIN_USBOTG_CLK__USBOTG_CLK,
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MX31_PIN_USBOTG_DIR__USBOTG_DIR,
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MX31_PIN_USBOTG_NXT__USBOTG_NXT,
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MX31_PIN_USBOTG_STP__USBOTG_STP,
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};
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mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB OTG");
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mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA0, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA1, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA2, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA3, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA4, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA5, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA6, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBOTG_DATA7, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBOTG_CLK, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBOTG_DIR, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBOTG_NXT, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBOTG_STP, USB_PAD_CFG);
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mxc_iomux_set_gpr(MUX_PGP_USB_4WIRE, true);
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mxc_iomux_set_gpr(MUX_PGP_USB_COMMON, true);
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/* chip select */
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mxc_iomux_alloc_pin(IOMUX_MODE(MX31_PIN_DTR_DCE2, IOMUX_CONFIG_GPIO),
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"USBOTG_CS");
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gpio_request(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE2), "USBH1 CS");
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gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE2), 0);
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return 0;
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}
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static int usbh1_init(struct platform_device *pdev)
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{
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int pins[] = {
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MX31_PIN_CSPI1_MOSI__USBH1_RXDM,
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MX31_PIN_CSPI1_MISO__USBH1_RXDP,
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MX31_PIN_CSPI1_SS0__USBH1_TXDM,
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MX31_PIN_CSPI1_SS1__USBH1_TXDP,
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MX31_PIN_CSPI1_SS2__USBH1_RCV,
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MX31_PIN_CSPI1_SCLK__USBH1_OEB,
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MX31_PIN_CSPI1_SPI_RDY__USBH1_FS,
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};
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mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB H1");
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mxc_iomux_set_pad(MX31_PIN_CSPI1_MOSI, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_CSPI1_MISO, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_CSPI1_SS0, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_CSPI1_SS1, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_CSPI1_SS2, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_CSPI1_SCLK, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_CSPI1_SPI_RDY, USB_PAD_CFG);
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mxc_iomux_set_gpr(MUX_PGP_USB_SUSPEND, true);
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return 0;
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}
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static int usbh2_init(struct platform_device *pdev)
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{
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int pins[] = {
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MX31_PIN_USBH2_DATA0__USBH2_DATA0,
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MX31_PIN_USBH2_DATA1__USBH2_DATA1,
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MX31_PIN_USBH2_CLK__USBH2_CLK,
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MX31_PIN_USBH2_DIR__USBH2_DIR,
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MX31_PIN_USBH2_NXT__USBH2_NXT,
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MX31_PIN_USBH2_STP__USBH2_STP,
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};
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mxc_iomux_setup_multiple_pins(pins, ARRAY_SIZE(pins), "USB H2");
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mxc_iomux_set_pad(MX31_PIN_USBH2_CLK, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBH2_DIR, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBH2_NXT, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBH2_STP, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBH2_DATA0, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_USBH2_DATA1, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_SRXD6, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_STXD6, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_SFS3, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_SCK3, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_SRXD3, USB_PAD_CFG);
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mxc_iomux_set_pad(MX31_PIN_STXD3, USB_PAD_CFG);
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mxc_iomux_set_gpr(MUX_PGP_UH2, true);
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/* chip select */
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mxc_iomux_alloc_pin(IOMUX_MODE(MX31_PIN_DTR_DCE1, IOMUX_CONFIG_GPIO),
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"USBH2_CS");
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gpio_request(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), "USBH2 CS");
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gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_DTR_DCE1), 0);
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return 0;
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}
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static struct mxc_usbh_platform_data usbotg_pdata = {
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.init = usbotg_init,
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.portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
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.flags = MXC_EHCI_POWER_PINS_ENABLED,
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};
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static struct mxc_usbh_platform_data usbh1_pdata = {
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.init = usbh1_init,
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.portsc = MXC_EHCI_MODE_UTMI | MXC_EHCI_SERIAL,
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.flags = MXC_EHCI_POWER_PINS_ENABLED | MXC_EHCI_INTERFACE_SINGLE_UNI,
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};
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static struct mxc_usbh_platform_data usbh2_pdata = {
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.init = usbh2_init,
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.portsc = MXC_EHCI_MODE_ULPI | MXC_EHCI_UTMI_8BIT,
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.flags = MXC_EHCI_POWER_PINS_ENABLED,
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};
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static struct platform_device *devices[] __initdata = {
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&smsc91x_device,
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&physmap_flash_device,
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@ -183,6 +319,15 @@ static void __init mx31lilly_board_init(void)
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spi_register_board_info(&mc13783_dev, 1);
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platform_add_devices(devices, ARRAY_SIZE(devices));
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/* USB */
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usbotg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
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USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
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usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops,
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USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT);
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mxc_register_device(&mxc_usbh1, &usbh1_pdata);
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mxc_register_device(&mxc_usbh2, &usbh2_pdata);
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}
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static void __init mx31lilly_timer_init(void)
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