Merge branch 'for-3.4-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/rw/uml
Pull UML fixes from Richard Weinberger. * 'for-3.4-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/rw/uml: um: uml_setup_stubs': warning: unused variable 'pages' um: Use asm-generic/switch_to.h um: Disintegrate asm/system.h um: switch cow_user.h to htobe{32,64}/betoh{32,64} um: several x86 hw-dependent crypto modules won't build on uml um: fix linker script generation
This commit is contained in:
Коммит
0682490d5f
|
@ -3,41 +3,6 @@
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|||
|
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#include <asm/types.h>
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#if defined(__KERNEL__)
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# include <asm/byteorder.h>
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# if defined(__BIG_ENDIAN)
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# define ntohll(x) (x)
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# define htonll(x) (x)
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# elif defined(__LITTLE_ENDIAN)
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# define ntohll(x) be64_to_cpu(x)
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# define htonll(x) cpu_to_be64(x)
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# else
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# error "Could not determine byte order"
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# endif
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#else
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/* For the definition of ntohl, htonl and __BYTE_ORDER */
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#include <endian.h>
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#include <netinet/in.h>
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#if defined(__BYTE_ORDER)
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# if __BYTE_ORDER == __BIG_ENDIAN
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# define ntohll(x) (x)
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# define htonll(x) (x)
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# elif __BYTE_ORDER == __LITTLE_ENDIAN
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# define ntohll(x) bswap_64(x)
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# define htonll(x) bswap_64(x)
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# else
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# error "Could not determine byte order: __BYTE_ORDER uncorrectly defined"
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# endif
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#else /* ! defined(__BYTE_ORDER) */
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# error "Could not determine byte order: __BYTE_ORDER not defined"
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#endif
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#endif /* ! defined(__KERNEL__) */
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extern int init_cow_file(int fd, char *cow_file, char *backing_file,
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int sectorsize, int alignment, int *bitmap_offset_out,
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unsigned long *bitmap_len_out, int *data_offset_out);
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|
|
|
@ -8,11 +8,10 @@
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* that.
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*/
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#include <unistd.h>
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#include <byteswap.h>
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#include <errno.h>
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#include <string.h>
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#include <arpa/inet.h>
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#include <asm/types.h>
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#include <endian.h>
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#include "cow.h"
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#include "cow_sys.h"
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|
@ -214,8 +213,8 @@ int write_cow_header(char *cow_file, int fd, char *backing_file,
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"header\n");
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goto out;
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}
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header->magic = htonl(COW_MAGIC);
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header->version = htonl(COW_VERSION);
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header->magic = htobe32(COW_MAGIC);
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header->version = htobe32(COW_VERSION);
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err = -EINVAL;
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if (strlen(backing_file) > sizeof(header->backing_file) - 1) {
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|
@ -246,10 +245,10 @@ int write_cow_header(char *cow_file, int fd, char *backing_file,
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goto out_free;
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}
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header->mtime = htonl(modtime);
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header->size = htonll(*size);
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header->sectorsize = htonl(sectorsize);
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header->alignment = htonl(alignment);
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header->mtime = htobe32(modtime);
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header->size = htobe64(*size);
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header->sectorsize = htobe32(sectorsize);
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header->alignment = htobe32(alignment);
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header->cow_format = COW_BITMAP;
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err = cow_write_file(fd, header, sizeof(*header));
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|
@ -301,8 +300,8 @@ int read_cow_header(int (*reader)(__u64, char *, int, void *), void *arg,
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magic = header->v1.magic;
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if (magic == COW_MAGIC)
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version = header->v1.version;
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else if (magic == ntohl(COW_MAGIC))
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version = ntohl(header->v1.version);
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else if (magic == be32toh(COW_MAGIC))
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version = be32toh(header->v1.version);
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/* No error printed because the non-COW case comes through here */
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else goto out;
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|
@ -327,9 +326,9 @@ int read_cow_header(int (*reader)(__u64, char *, int, void *), void *arg,
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"header\n");
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goto out;
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}
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*mtime_out = ntohl(header->v2.mtime);
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*size_out = ntohll(header->v2.size);
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*sectorsize_out = ntohl(header->v2.sectorsize);
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*mtime_out = be32toh(header->v2.mtime);
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*size_out = be64toh(header->v2.size);
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*sectorsize_out = be32toh(header->v2.sectorsize);
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*bitmap_offset_out = sizeof(header->v2);
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*align_out = *sectorsize_out;
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file = header->v2.backing_file;
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|
@ -341,10 +340,10 @@ int read_cow_header(int (*reader)(__u64, char *, int, void *), void *arg,
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"header\n");
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goto out;
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}
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*mtime_out = ntohl(header->v3.mtime);
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*size_out = ntohll(header->v3.size);
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*sectorsize_out = ntohl(header->v3.sectorsize);
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*align_out = ntohl(header->v3.alignment);
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*mtime_out = be32toh(header->v3.mtime);
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*size_out = be64toh(header->v3.size);
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*sectorsize_out = be32toh(header->v3.sectorsize);
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*align_out = be32toh(header->v3.alignment);
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if (*align_out == 0) {
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cow_printf("read_cow_header - invalid COW header, "
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"align == 0\n");
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|
@ -366,16 +365,16 @@ int read_cow_header(int (*reader)(__u64, char *, int, void *), void *arg,
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* this was used until Dec2005 - 64bits are needed to represent
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* 2038+. I.e. we can safely do this truncating cast.
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*
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* Additionally, we must use ntohl() instead of ntohll(), since
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* Additionally, we must use be32toh() instead of be64toh(), since
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* the program used to use the former (tested - I got mtime
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* mismatch "0 vs whatever").
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*
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* Ever heard about bug-to-bug-compatibility ? ;-) */
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*mtime_out = (time32_t) ntohl(header->v3_b.mtime);
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*mtime_out = (time32_t) be32toh(header->v3_b.mtime);
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|
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*size_out = ntohll(header->v3_b.size);
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*sectorsize_out = ntohl(header->v3_b.sectorsize);
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*align_out = ntohl(header->v3_b.alignment);
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*size_out = be64toh(header->v3_b.size);
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*sectorsize_out = be32toh(header->v3_b.sectorsize);
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*align_out = be32toh(header->v3_b.alignment);
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if (*align_out == 0) {
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cow_printf("read_cow_header - invalid COW header, "
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"align == 0\n");
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|
|
|
@ -22,6 +22,7 @@
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#include <linux/workqueue.h>
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#include <linux/mutex.h>
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#include <asm/uaccess.h>
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#include <asm/switch_to.h>
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|
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#include "init.h"
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#include "irq_kern.h"
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|
|
|
@ -1,3 +1,4 @@
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|||
generic-y += bug.h cputime.h device.h emergency-restart.h futex.h hardirq.h
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generic-y += hw_irq.h irq_regs.h kdebug.h percpu.h sections.h topology.h xor.h
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generic-y += ftrace.h pci.h io.h param.h delay.h mutex.h current.h
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generic-y += ftrace.h pci.h io.h param.h delay.h mutex.h current.h exec.h
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generic-y += switch_to.h
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|
|
|
@ -5,7 +5,8 @@
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|||
|
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CPPFLAGS_vmlinux.lds := -DSTART=$(LDS_START) \
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-DELF_ARCH=$(LDS_ELF_ARCH) \
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-DELF_FORMAT=$(LDS_ELF_FORMAT)
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-DELF_FORMAT=$(LDS_ELF_FORMAT) \
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$(LDS_EXTRA)
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extra-y := vmlinux.lds
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clean-files :=
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||||
|
||||
|
|
|
@ -88,11 +88,8 @@ static inline void set_current(struct task_struct *task)
|
|||
|
||||
extern void arch_switch_to(struct task_struct *to);
|
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|
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void *_switch_to(void *prev, void *next, void *last)
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void *__switch_to(struct task_struct *from, struct task_struct *to)
|
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{
|
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struct task_struct *from = prev;
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struct task_struct *to = next;
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||||
|
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to->thread.prev_sched = from;
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set_current(to);
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|
@ -111,7 +108,6 @@ void *_switch_to(void *prev, void *next, void *last)
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} while (current->thread.saved_task);
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|
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return current->thread.prev_sched;
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|
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}
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|
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void interrupt_end(void)
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|
|
|
@ -103,7 +103,6 @@ int init_new_context(struct task_struct *task, struct mm_struct *mm)
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|
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void uml_setup_stubs(struct mm_struct *mm)
|
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{
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struct page **pages;
|
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int err, ret;
|
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|
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if (!skas_needs_stub)
|
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|
|
|
@ -14,6 +14,9 @@ LINK-y += $(call cc-option,-m32)
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|
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export LDFLAGS
|
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|
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LDS_EXTRA := -Ui386
|
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export LDS_EXTRA
|
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|
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# First of all, tune CFLAGS for the specific CPU. This actually sets cflags-y.
|
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include $(srctree)/arch/x86/Makefile_32.cpu
|
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|
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|
|
|
@ -0,0 +1,75 @@
|
|||
#ifndef _ASM_UM_BARRIER_H_
|
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#define _ASM_UM_BARRIER_H_
|
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|
||||
#include <asm/asm.h>
|
||||
#include <asm/segment.h>
|
||||
#include <asm/cpufeature.h>
|
||||
#include <asm/cmpxchg.h>
|
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#include <asm/nops.h>
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/irqflags.h>
|
||||
|
||||
/*
|
||||
* Force strict CPU ordering.
|
||||
* And yes, this is required on UP too when we're talking
|
||||
* to devices.
|
||||
*/
|
||||
#ifdef CONFIG_X86_32
|
||||
|
||||
#define mb() alternative("lock; addl $0,0(%%esp)", "mfence", X86_FEATURE_XMM2)
|
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#define rmb() alternative("lock; addl $0,0(%%esp)", "lfence", X86_FEATURE_XMM2)
|
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#define wmb() alternative("lock; addl $0,0(%%esp)", "sfence", X86_FEATURE_XMM)
|
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|
||||
#else /* CONFIG_X86_32 */
|
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|
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#define mb() asm volatile("mfence" : : : "memory")
|
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#define rmb() asm volatile("lfence" : : : "memory")
|
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#define wmb() asm volatile("sfence" : : : "memory")
|
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|
||||
#endif /* CONFIG_X86_32 */
|
||||
|
||||
#define read_barrier_depends() do { } while (0)
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
|
||||
#define smp_mb() mb()
|
||||
#ifdef CONFIG_X86_PPRO_FENCE
|
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#define smp_rmb() rmb()
|
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#else /* CONFIG_X86_PPRO_FENCE */
|
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#define smp_rmb() barrier()
|
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#endif /* CONFIG_X86_PPRO_FENCE */
|
||||
|
||||
#ifdef CONFIG_X86_OOSTORE
|
||||
#define smp_wmb() wmb()
|
||||
#else /* CONFIG_X86_OOSTORE */
|
||||
#define smp_wmb() barrier()
|
||||
#endif /* CONFIG_X86_OOSTORE */
|
||||
|
||||
#define smp_read_barrier_depends() read_barrier_depends()
|
||||
#define set_mb(var, value) do { (void)xchg(&var, value); } while (0)
|
||||
|
||||
#else /* CONFIG_SMP */
|
||||
|
||||
#define smp_mb() barrier()
|
||||
#define smp_rmb() barrier()
|
||||
#define smp_wmb() barrier()
|
||||
#define smp_read_barrier_depends() do { } while (0)
|
||||
#define set_mb(var, value) do { var = value; barrier(); } while (0)
|
||||
|
||||
#endif /* CONFIG_SMP */
|
||||
|
||||
/*
|
||||
* Stop RDTSC speculation. This is needed when you need to use RDTSC
|
||||
* (or get_cycles or vread that possibly accesses the TSC) in a defined
|
||||
* code region.
|
||||
*
|
||||
* (Could use an alternative three way for this if there was one.)
|
||||
*/
|
||||
static inline void rdtsc_barrier(void)
|
||||
{
|
||||
alternative(ASM_NOP3, "mfence", X86_FEATURE_MFENCE_RDTSC);
|
||||
alternative(ASM_NOP3, "lfence", X86_FEATURE_LFENCE_RDTSC);
|
||||
}
|
||||
|
||||
#endif
|
|
@ -1,135 +0,0 @@
|
|||
#ifndef _ASM_X86_SYSTEM_H_
|
||||
#define _ASM_X86_SYSTEM_H_
|
||||
|
||||
#include <asm/asm.h>
|
||||
#include <asm/segment.h>
|
||||
#include <asm/cpufeature.h>
|
||||
#include <asm/cmpxchg.h>
|
||||
#include <asm/nops.h>
|
||||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/irqflags.h>
|
||||
|
||||
/* entries in ARCH_DLINFO: */
|
||||
#ifdef CONFIG_IA32_EMULATION
|
||||
# define AT_VECTOR_SIZE_ARCH 2
|
||||
#else
|
||||
# define AT_VECTOR_SIZE_ARCH 1
|
||||
#endif
|
||||
|
||||
extern unsigned long arch_align_stack(unsigned long sp);
|
||||
|
||||
void default_idle(void);
|
||||
|
||||
/*
|
||||
* Force strict CPU ordering.
|
||||
* And yes, this is required on UP too when we're talking
|
||||
* to devices.
|
||||
*/
|
||||
#ifdef CONFIG_X86_32
|
||||
/*
|
||||
* Some non-Intel clones support out of order store. wmb() ceases to be a
|
||||
* nop for these.
|
||||
*/
|
||||
#define mb() alternative("lock; addl $0,0(%%esp)", "mfence", X86_FEATURE_XMM2)
|
||||
#define rmb() alternative("lock; addl $0,0(%%esp)", "lfence", X86_FEATURE_XMM2)
|
||||
#define wmb() alternative("lock; addl $0,0(%%esp)", "sfence", X86_FEATURE_XMM)
|
||||
#else
|
||||
#define mb() asm volatile("mfence":::"memory")
|
||||
#define rmb() asm volatile("lfence":::"memory")
|
||||
#define wmb() asm volatile("sfence" ::: "memory")
|
||||
#endif
|
||||
|
||||
/**
|
||||
* read_barrier_depends - Flush all pending reads that subsequents reads
|
||||
* depend on.
|
||||
*
|
||||
* No data-dependent reads from memory-like regions are ever reordered
|
||||
* over this barrier. All reads preceding this primitive are guaranteed
|
||||
* to access memory (but not necessarily other CPUs' caches) before any
|
||||
* reads following this primitive that depend on the data return by
|
||||
* any of the preceding reads. This primitive is much lighter weight than
|
||||
* rmb() on most CPUs, and is never heavier weight than is
|
||||
* rmb().
|
||||
*
|
||||
* These ordering constraints are respected by both the local CPU
|
||||
* and the compiler.
|
||||
*
|
||||
* Ordering is not guaranteed by anything other than these primitives,
|
||||
* not even by data dependencies. See the documentation for
|
||||
* memory_barrier() for examples and URLs to more information.
|
||||
*
|
||||
* For example, the following code would force ordering (the initial
|
||||
* value of "a" is zero, "b" is one, and "p" is "&a"):
|
||||
*
|
||||
* <programlisting>
|
||||
* CPU 0 CPU 1
|
||||
*
|
||||
* b = 2;
|
||||
* memory_barrier();
|
||||
* p = &b; q = p;
|
||||
* read_barrier_depends();
|
||||
* d = *q;
|
||||
* </programlisting>
|
||||
*
|
||||
* because the read of "*q" depends on the read of "p" and these
|
||||
* two reads are separated by a read_barrier_depends(). However,
|
||||
* the following code, with the same initial values for "a" and "b":
|
||||
*
|
||||
* <programlisting>
|
||||
* CPU 0 CPU 1
|
||||
*
|
||||
* a = 2;
|
||||
* memory_barrier();
|
||||
* b = 3; y = b;
|
||||
* read_barrier_depends();
|
||||
* x = a;
|
||||
* </programlisting>
|
||||
*
|
||||
* does not enforce ordering, since there is no data dependency between
|
||||
* the read of "a" and the read of "b". Therefore, on some CPUs, such
|
||||
* as Alpha, "y" could be set to 3 and "x" to 0. Use rmb()
|
||||
* in cases like this where there are no data dependencies.
|
||||
**/
|
||||
|
||||
#define read_barrier_depends() do { } while (0)
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
#define smp_mb() mb()
|
||||
#ifdef CONFIG_X86_PPRO_FENCE
|
||||
# define smp_rmb() rmb()
|
||||
#else
|
||||
# define smp_rmb() barrier()
|
||||
#endif
|
||||
#ifdef CONFIG_X86_OOSTORE
|
||||
# define smp_wmb() wmb()
|
||||
#else
|
||||
# define smp_wmb() barrier()
|
||||
#endif
|
||||
#define smp_read_barrier_depends() read_barrier_depends()
|
||||
#define set_mb(var, value) do { (void)xchg(&var, value); } while (0)
|
||||
#else
|
||||
#define smp_mb() barrier()
|
||||
#define smp_rmb() barrier()
|
||||
#define smp_wmb() barrier()
|
||||
#define smp_read_barrier_depends() do { } while (0)
|
||||
#define set_mb(var, value) do { var = value; barrier(); } while (0)
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Stop RDTSC speculation. This is needed when you need to use RDTSC
|
||||
* (or get_cycles or vread that possibly accesses the TSC) in a defined
|
||||
* code region.
|
||||
*
|
||||
* (Could use an alternative three way for this if there was one.)
|
||||
*/
|
||||
static inline void rdtsc_barrier(void)
|
||||
{
|
||||
alternative(ASM_NOP3, "mfence", X86_FEATURE_MFENCE_RDTSC);
|
||||
alternative(ASM_NOP3, "lfence", X86_FEATURE_LFENCE_RDTSC);
|
||||
}
|
||||
|
||||
extern void *_switch_to(void *prev, void *next, void *last);
|
||||
#define switch_to(prev, next, last) prev = _switch_to(prev, next, last)
|
||||
|
||||
#endif
|
|
@ -627,7 +627,7 @@ config CRYPTO_BLOWFISH_COMMON
|
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config CRYPTO_BLOWFISH_X86_64
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tristate "Blowfish cipher algorithm (x86_64)"
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depends on (X86 || UML_X86) && 64BIT
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depends on X86 && 64BIT
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select CRYPTO_ALGAPI
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select CRYPTO_BLOWFISH_COMMON
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help
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@ -657,7 +657,7 @@ config CRYPTO_CAMELLIA
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config CRYPTO_CAMELLIA_X86_64
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tristate "Camellia cipher algorithm (x86_64)"
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depends on (X86 || UML_X86) && 64BIT
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depends on X86 && 64BIT
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depends on CRYPTO
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select CRYPTO_ALGAPI
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select CRYPTO_LRW
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@ -893,7 +893,7 @@ config CRYPTO_TWOFISH_X86_64
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config CRYPTO_TWOFISH_X86_64_3WAY
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tristate "Twofish cipher algorithm (x86_64, 3-way parallel)"
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depends on (X86 || UML_X86) && 64BIT
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depends on X86 && 64BIT
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select CRYPTO_ALGAPI
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select CRYPTO_TWOFISH_COMMON
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select CRYPTO_TWOFISH_X86_64
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