Merge branch 'perf/urgent' into perf/core, to pick up fixes and to refresh the tree
Signed-off-by: Ingo Molnar <mingo@kernel.org>
This commit is contained in:
Коммит
072e5a1cfa
|
@ -0,0 +1,27 @@
|
|||
Code of Conflict
|
||||
----------------
|
||||
|
||||
The Linux kernel development effort is a very personal process compared
|
||||
to "traditional" ways of developing software. Your code and ideas
|
||||
behind it will be carefully reviewed, often resulting in critique and
|
||||
criticism. The review will almost always require improvements to the
|
||||
code before it can be included in the kernel. Know that this happens
|
||||
because everyone involved wants to see the best possible solution for
|
||||
the overall success of Linux. This development process has been proven
|
||||
to create the most robust operating system kernel ever, and we do not
|
||||
want to do anything to cause the quality of submission and eventual
|
||||
result to ever decrease.
|
||||
|
||||
If however, anyone feels personally abused, threatened, or otherwise
|
||||
uncomfortable due to this process, that is not acceptable. If so,
|
||||
please contact the Linux Foundation's Technical Advisory Board at
|
||||
<tab@lists.linux-foundation.org>, or the individual members, and they
|
||||
will work to resolve the issue to the best of their ability. For more
|
||||
information on who is on the Technical Advisory Board and what their
|
||||
role is, please see:
|
||||
http://www.linuxfoundation.org/programs/advisory-councils/tab
|
||||
|
||||
As a reviewer of code, please strive to keep things civil and focused on
|
||||
the technical issues involved. We are all humans, and frustrations can
|
||||
be high on both sides of the process. Try to keep in mind the immortal
|
||||
words of Bill and Ted, "Be excellent to each other."
|
|
@ -404,8 +404,8 @@ supported and the interface files "release_agent" and
|
|||
be understood as an underflow into the highest possible value, -2 or
|
||||
-10M etc. do not work, so it's not consistent.
|
||||
|
||||
memory.low, memory.high, and memory.max will use the string
|
||||
"infinity" to indicate and set the highest possible value.
|
||||
memory.low, memory.high, and memory.max will use the string "max" to
|
||||
indicate and set the highest possible value.
|
||||
|
||||
5. Planned Changes
|
||||
|
||||
|
|
|
@ -22,6 +22,8 @@ Optional Properties:
|
|||
- pclkN, clkN: Pairs of parent of input clock and input clock to the
|
||||
devices in this power domain. Maximum of 4 pairs (N = 0 to 3)
|
||||
are supported currently.
|
||||
- power-domains: phandle pointing to the parent power domain, for more details
|
||||
see Documentation/devicetree/bindings/power/power_domain.txt
|
||||
|
||||
Node of a device using power domains must have a power-domains property
|
||||
defined with a phandle to respective power domain.
|
||||
|
|
|
@ -13,6 +13,10 @@ Boards with the ST STiH407 SoC shall have the following properties:
|
|||
Required root node property:
|
||||
compatible = "st,stih407";
|
||||
|
||||
Boards with the ST STiH410 SoC shall have the following properties:
|
||||
Required root node property:
|
||||
compatible = "st,stih410";
|
||||
|
||||
Boards with the ST STiH418 SoC shall have the following properties:
|
||||
Required root node property:
|
||||
compatible = "st,stih418";
|
||||
|
|
|
@ -7,6 +7,7 @@ Required properties:
|
|||
- "fsl,vf610-i2c" for I2C compatible with the one integrated on Vybrid vf610 SoC
|
||||
- reg : Should contain I2C/HS-I2C registers location and length
|
||||
- interrupts : Should contain I2C/HS-I2C interrupt
|
||||
- clocks : Should contain the I2C/HS-I2C clock specifier
|
||||
|
||||
Optional properties:
|
||||
- clock-frequency : Constains desired I2C/HS-I2C bus clock frequency in Hz.
|
||||
|
|
|
@ -27,6 +27,8 @@ property is used.
|
|||
- amd,serdes-cdr-rate: CDR rate speed selection
|
||||
- amd,serdes-pq-skew: PQ (data sampling) skew
|
||||
- amd,serdes-tx-amp: TX amplitude boost
|
||||
- amd,serdes-dfe-tap-config: DFE taps available to run
|
||||
- amd,serdes-dfe-tap-enable: DFE taps to enable
|
||||
|
||||
Example:
|
||||
xgbe_phy@e1240800 {
|
||||
|
@ -41,4 +43,6 @@ Example:
|
|||
amd,serdes-cdr-rate = <2>, <2>, <7>;
|
||||
amd,serdes-pq-skew = <10>, <10>, <30>;
|
||||
amd,serdes-tx-amp = <15>, <15>, <10>;
|
||||
amd,serdes-dfe-tap-config = <3>, <3>, <1>;
|
||||
amd,serdes-dfe-tap-enable = <0>, <0>, <127>;
|
||||
};
|
||||
|
|
|
@ -4,7 +4,10 @@ Ethernet nodes are defined to describe on-chip ethernet interfaces in
|
|||
APM X-Gene SoC.
|
||||
|
||||
Required properties for all the ethernet interfaces:
|
||||
- compatible: Should be "apm,xgene-enet"
|
||||
- compatible: Should state binding information from the following list,
|
||||
- "apm,xgene-enet": RGMII based 1G interface
|
||||
- "apm,xgene1-sgenet": SGMII based 1G interface
|
||||
- "apm,xgene1-xgenet": XFI based 10G interface
|
||||
- reg: Address and length of the register set for the device. It contains the
|
||||
information of registers in the same order as described by reg-names
|
||||
- reg-names: Should contain the register set names
|
||||
|
|
|
@ -19,6 +19,16 @@ Required properties:
|
|||
providing multiple PM domains (e.g. power controllers), but can be any value
|
||||
as specified by device tree binding documentation of particular provider.
|
||||
|
||||
Optional properties:
|
||||
- power-domains : A phandle and PM domain specifier as defined by bindings of
|
||||
the power controller specified by phandle.
|
||||
Some power domains might be powered from another power domain (or have
|
||||
other hardware specific dependencies). For representing such dependency
|
||||
a standard PM domain consumer binding is used. When provided, all domains
|
||||
created by the given provider should be subdomains of the domain
|
||||
specified by this binding. More details about power domain specifier are
|
||||
available in the next section.
|
||||
|
||||
Example:
|
||||
|
||||
power: power-controller@12340000 {
|
||||
|
@ -30,6 +40,25 @@ Example:
|
|||
The node above defines a power controller that is a PM domain provider and
|
||||
expects one cell as its phandle argument.
|
||||
|
||||
Example 2:
|
||||
|
||||
parent: power-controller@12340000 {
|
||||
compatible = "foo,power-controller";
|
||||
reg = <0x12340000 0x1000>;
|
||||
#power-domain-cells = <1>;
|
||||
};
|
||||
|
||||
child: power-controller@12340000 {
|
||||
compatible = "foo,power-controller";
|
||||
reg = <0x12341000 0x1000>;
|
||||
power-domains = <&parent 0>;
|
||||
#power-domain-cells = <1>;
|
||||
};
|
||||
|
||||
The nodes above define two power controllers: 'parent' and 'child'.
|
||||
Domains created by the 'child' power controller are subdomains of '0' power
|
||||
domain provided by the 'parent' power controller.
|
||||
|
||||
==PM domain consumers==
|
||||
|
||||
Required properties:
|
||||
|
|
|
@ -0,0 +1,19 @@
|
|||
ETRAX FS UART
|
||||
|
||||
Required properties:
|
||||
- compatible : "axis,etraxfs-uart"
|
||||
- reg: offset and length of the register set for the device.
|
||||
- interrupts: device interrupt
|
||||
|
||||
Optional properties:
|
||||
- {dtr,dsr,ri,cd}-gpios: specify a GPIO for DTR/DSR/RI/CD
|
||||
line respectively.
|
||||
|
||||
Example:
|
||||
|
||||
serial@b00260000 {
|
||||
compatible = "axis,etraxfs-uart";
|
||||
reg = <0xb0026000 0x1000>;
|
||||
interrupts = <68>;
|
||||
status = "disabled";
|
||||
};
|
|
@ -21,6 +21,18 @@ Optional properties:
|
|||
- reg-io-width : the size (in bytes) of the IO accesses that should be
|
||||
performed on the device. If this property is not present then single byte
|
||||
accesses are used.
|
||||
- dcd-override : Override the DCD modem status signal. This signal will always
|
||||
be reported as active instead of being obtained from the modem status
|
||||
register. Define this if your serial port does not use this pin.
|
||||
- dsr-override : Override the DTS modem status signal. This signal will always
|
||||
be reported as active instead of being obtained from the modem status
|
||||
register. Define this if your serial port does not use this pin.
|
||||
- cts-override : Override the CTS modem status signal. This signal will always
|
||||
be reported as active instead of being obtained from the modem status
|
||||
register. Define this if your serial port does not use this pin.
|
||||
- ri-override : Override the RI modem status signal. This signal will always be
|
||||
reported as inactive instead of being obtained from the modem status register.
|
||||
Define this if your serial port does not use this pin.
|
||||
|
||||
Example:
|
||||
|
||||
|
@ -31,6 +43,10 @@ Example:
|
|||
interrupts = <10>;
|
||||
reg-shift = <2>;
|
||||
reg-io-width = <4>;
|
||||
dcd-override;
|
||||
dsr-override;
|
||||
cts-override;
|
||||
ri-override;
|
||||
};
|
||||
|
||||
Example with one clock:
|
||||
|
|
|
@ -12,6 +12,9 @@ I. For patch submitters
|
|||
|
||||
devicetree@vger.kernel.org
|
||||
|
||||
and Cc: the DT maintainers. Use scripts/get_maintainer.pl to identify
|
||||
all of the DT maintainers.
|
||||
|
||||
3) The Documentation/ portion of the patch should come in the series before
|
||||
the code implementing the binding.
|
||||
|
||||
|
|
|
@ -20,6 +20,7 @@ amlogic Amlogic, Inc.
|
|||
ams AMS AG
|
||||
amstaos AMS-Taos Inc.
|
||||
apm Applied Micro Circuits Corporation (APM)
|
||||
arasan Arasan Chip Systems
|
||||
arm ARM Ltd.
|
||||
armadeus ARMadeus Systems SARL
|
||||
asahi-kasei Asahi Kasei Corp.
|
||||
|
@ -27,6 +28,7 @@ atmel Atmel Corporation
|
|||
auo AU Optronics Corporation
|
||||
avago Avago Technologies
|
||||
avic Shanghai AVIC Optoelectronics Co., Ltd.
|
||||
axis Axis Communications AB
|
||||
bosch Bosch Sensortec GmbH
|
||||
brcm Broadcom Corporation
|
||||
buffalo Buffalo, Inc.
|
||||
|
|
|
@ -26,6 +26,11 @@ Optional properties:
|
|||
- atmel,disable : Should be present if you want to disable the watchdog.
|
||||
- atmel,idle-halt : Should be present if you want to stop the watchdog when
|
||||
entering idle state.
|
||||
CAUTION: This property should be used with care, it actually makes the
|
||||
watchdog not counting when the CPU is in idle state, therefore the
|
||||
watchdog reset time depends on mean CPU usage and will not reset at all
|
||||
if the CPU stop working while it is in idle state, which is probably
|
||||
not what you want.
|
||||
- atmel,dbg-halt : Should be present if you want to stop the watchdog when
|
||||
entering debug state.
|
||||
|
||||
|
|
|
@ -5,8 +5,8 @@ system.
|
|||
|
||||
dlmfs is built with OCFS2 as it requires most of its infrastructure.
|
||||
|
||||
Project web page: http://oss.oracle.com/projects/ocfs2
|
||||
Tools web page: http://oss.oracle.com/projects/ocfs2-tools
|
||||
Project web page: http://ocfs2.wiki.kernel.org
|
||||
Tools web page: https://github.com/markfasheh/ocfs2-tools
|
||||
OCFS2 mailing lists: http://oss.oracle.com/projects/ocfs2/mailman/
|
||||
|
||||
All code copyright 2005 Oracle except when otherwise noted.
|
||||
|
|
|
@ -8,8 +8,8 @@ also make it attractive for non-clustered use.
|
|||
You'll want to install the ocfs2-tools package in order to at least
|
||||
get "mount.ocfs2" and "ocfs2_hb_ctl".
|
||||
|
||||
Project web page: http://oss.oracle.com/projects/ocfs2
|
||||
Tools web page: http://oss.oracle.com/projects/ocfs2-tools
|
||||
Project web page: http://ocfs2.wiki.kernel.org
|
||||
Tools git tree: https://github.com/markfasheh/ocfs2-tools
|
||||
OCFS2 mailing lists: http://oss.oracle.com/projects/ocfs2/mailman/
|
||||
|
||||
All code copyright 2005 Oracle except when otherwise noted.
|
||||
|
|
|
@ -40,8 +40,10 @@ but also to IPIs and to some other special-purpose interrupts.
|
|||
|
||||
The IRQF_NO_SUSPEND flag is used to indicate that to the IRQ subsystem when
|
||||
requesting a special-purpose interrupt. It causes suspend_device_irqs() to
|
||||
leave the corresponding IRQ enabled so as to allow the interrupt to work all
|
||||
the time as expected.
|
||||
leave the corresponding IRQ enabled so as to allow the interrupt to work as
|
||||
expected during the suspend-resume cycle, but does not guarantee that the
|
||||
interrupt will wake the system from a suspended state -- for such cases it is
|
||||
necessary to use enable_irq_wake().
|
||||
|
||||
Note that the IRQF_NO_SUSPEND flag affects the entire IRQ and not just one
|
||||
user of it. Thus, if the IRQ is shared, all of the interrupt handlers installed
|
||||
|
@ -110,8 +112,9 @@ any special interrupt handling logic for it to work.
|
|||
IRQF_NO_SUSPEND and enable_irq_wake()
|
||||
-------------------------------------
|
||||
|
||||
There are no valid reasons to use both enable_irq_wake() and the IRQF_NO_SUSPEND
|
||||
flag on the same IRQ.
|
||||
There are very few valid reasons to use both enable_irq_wake() and the
|
||||
IRQF_NO_SUSPEND flag on the same IRQ, and it is never valid to use both for the
|
||||
same device.
|
||||
|
||||
First of all, if the IRQ is not shared, the rules for handling IRQF_NO_SUSPEND
|
||||
interrupts (interrupt handlers are invoked after suspend_device_irqs()) are
|
||||
|
@ -120,4 +123,13 @@ handlers are not invoked after suspend_device_irqs()).
|
|||
|
||||
Second, both enable_irq_wake() and IRQF_NO_SUSPEND apply to entire IRQs and not
|
||||
to individual interrupt handlers, so sharing an IRQ between a system wakeup
|
||||
interrupt source and an IRQF_NO_SUSPEND interrupt source does not make sense.
|
||||
interrupt source and an IRQF_NO_SUSPEND interrupt source does not generally
|
||||
make sense.
|
||||
|
||||
In rare cases an IRQ can be shared between a wakeup device driver and an
|
||||
IRQF_NO_SUSPEND user. In order for this to be safe, the wakeup device driver
|
||||
must be able to discern spurious IRQs from genuine wakeup events (signalling
|
||||
the latter to the core with pm_system_wakeup()), must use enable_irq_wake() to
|
||||
ensure that the IRQ will function as a wakeup source, and must request the IRQ
|
||||
with IRQF_COND_SUSPEND to tell the core that it meets these requirements. If
|
||||
these requirements are not met, it is not valid to use IRQF_COND_SUSPEND.
|
||||
|
|
39
MAINTAINERS
39
MAINTAINERS
|
@ -1030,6 +1030,16 @@ F: arch/arm/mach-mxs/
|
|||
F: arch/arm/boot/dts/imx*
|
||||
F: arch/arm/configs/imx*_defconfig
|
||||
|
||||
ARM/FREESCALE VYBRID ARM ARCHITECTURE
|
||||
M: Shawn Guo <shawn.guo@linaro.org>
|
||||
M: Sascha Hauer <kernel@pengutronix.de>
|
||||
R: Stefan Agner <stefan@agner.ch>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git
|
||||
F: arch/arm/mach-imx/*vf610*
|
||||
F: arch/arm/boot/dts/vf*
|
||||
|
||||
ARM/GLOMATION GESBC9312SX MACHINE SUPPORT
|
||||
M: Lennert Buytenhek <kernel@wantstofly.org>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
|
@ -1188,6 +1198,7 @@ ARM/Marvell Dove/MV78xx0/Orion SOC support
|
|||
M: Jason Cooper <jason@lakedaemon.net>
|
||||
M: Andrew Lunn <andrew@lunn.ch>
|
||||
M: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
|
||||
M: Gregory Clement <gregory.clement@free-electrons.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
S: Maintained
|
||||
F: arch/arm/mach-dove/
|
||||
|
@ -1730,7 +1741,7 @@ S: Maintained
|
|||
F: drivers/net/ethernet/atheros/
|
||||
|
||||
ATM
|
||||
M: Chas Williams <chas@cmf.nrl.navy.mil>
|
||||
M: Chas Williams <3chas3@gmail.com>
|
||||
L: linux-atm-general@lists.sourceforge.net (moderated for non-subscribers)
|
||||
L: netdev@vger.kernel.org
|
||||
W: http://linux-atm.sourceforge.net
|
||||
|
@ -2065,7 +2076,7 @@ F: include/net/bluetooth/
|
|||
BONDING DRIVER
|
||||
M: Jay Vosburgh <j.vosburgh@gmail.com>
|
||||
M: Veaceslav Falico <vfalico@gmail.com>
|
||||
M: Andy Gospodarek <andy@greyhouse.net>
|
||||
M: Andy Gospodarek <gospo@cumulusnetworks.com>
|
||||
L: netdev@vger.kernel.org
|
||||
W: http://sourceforge.net/projects/bonding/
|
||||
S: Supported
|
||||
|
@ -2107,7 +2118,6 @@ F: drivers/net/ethernet/broadcom/bnx2x/
|
|||
|
||||
BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITECTURE
|
||||
M: Christian Daudt <bcm@fixthebug.org>
|
||||
M: Matt Porter <mporter@linaro.org>
|
||||
M: Florian Fainelli <f.fainelli@gmail.com>
|
||||
L: bcm-kernel-feedback-list@broadcom.com
|
||||
T: git git://github.com/broadcom/mach-bcm
|
||||
|
@ -2369,8 +2379,9 @@ F: arch/x86/include/asm/tce.h
|
|||
|
||||
CAN NETWORK LAYER
|
||||
M: Oliver Hartkopp <socketcan@hartkopp.net>
|
||||
M: Marc Kleine-Budde <mkl@pengutronix.de>
|
||||
L: linux-can@vger.kernel.org
|
||||
W: http://gitorious.org/linux-can
|
||||
W: https://github.com/linux-can
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can-next.git
|
||||
S: Maintained
|
||||
|
@ -2386,7 +2397,7 @@ CAN NETWORK DRIVERS
|
|||
M: Wolfgang Grandegger <wg@grandegger.com>
|
||||
M: Marc Kleine-Budde <mkl@pengutronix.de>
|
||||
L: linux-can@vger.kernel.org
|
||||
W: http://gitorious.org/linux-can
|
||||
W: https://github.com/linux-can
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can.git
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can-next.git
|
||||
S: Maintained
|
||||
|
@ -7213,8 +7224,7 @@ ORACLE CLUSTER FILESYSTEM 2 (OCFS2)
|
|||
M: Mark Fasheh <mfasheh@suse.com>
|
||||
M: Joel Becker <jlbec@evilplan.org>
|
||||
L: ocfs2-devel@oss.oracle.com (moderated for non-subscribers)
|
||||
W: http://oss.oracle.com/projects/ocfs2/
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/jlbec/ocfs2.git
|
||||
W: http://ocfs2.wiki.kernel.org
|
||||
S: Supported
|
||||
F: Documentation/filesystems/ocfs2.txt
|
||||
F: Documentation/filesystems/dlmfs.txt
|
||||
|
@ -8481,6 +8491,14 @@ S: Supported
|
|||
L: netdev@vger.kernel.org
|
||||
F: drivers/net/ethernet/samsung/sxgbe/
|
||||
|
||||
SAMSUNG THERMAL DRIVER
|
||||
M: Lukasz Majewski <l.majewski@samsung.com>
|
||||
L: linux-pm@vger.kernel.org
|
||||
L: linux-samsung-soc@vger.kernel.org
|
||||
S: Supported
|
||||
T: https://github.com/lmajewski/linux-samsung-thermal.git
|
||||
F: drivers/thermal/samsung/
|
||||
|
||||
SAMSUNG USB2 PHY DRIVER
|
||||
M: Kamil Debski <k.debski@samsung.com>
|
||||
L: linux-kernel@vger.kernel.org
|
||||
|
@ -10189,6 +10207,13 @@ S: Maintained
|
|||
F: Documentation/usb/ohci.txt
|
||||
F: drivers/usb/host/ohci*
|
||||
|
||||
USB OTG FSM (Finite State Machine)
|
||||
M: Peter Chen <Peter.Chen@freescale.com>
|
||||
T: git git://github.com/hzpeterchen/linux-usb.git
|
||||
L: linux-usb@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/usb/common/usb-otg-fsm.c
|
||||
|
||||
USB OVER IP DRIVER
|
||||
M: Valentina Manea <valentina.manea.m@gmail.com>
|
||||
M: Shuah Khan <shuah.kh@samsung.com>
|
||||
|
|
2
Makefile
2
Makefile
|
@ -1,7 +1,7 @@
|
|||
VERSION = 4
|
||||
PATCHLEVEL = 0
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc1
|
||||
EXTRAVERSION = -rc5
|
||||
NAME = Hurr durr I'ma sheep
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
|
@ -47,9 +47,6 @@ struct thread_struct {
|
|||
/* Forward declaration, a strange C thing */
|
||||
struct task_struct;
|
||||
|
||||
/* Return saved PC of a blocked thread */
|
||||
unsigned long thread_saved_pc(struct task_struct *t);
|
||||
|
||||
#define task_pt_regs(p) \
|
||||
((struct pt_regs *)(THREAD_SIZE + (void *)task_stack_page(p)) - 1)
|
||||
|
||||
|
@ -72,18 +69,21 @@ unsigned long thread_saved_pc(struct task_struct *t);
|
|||
#define release_segments(mm) do { } while (0)
|
||||
|
||||
#define KSTK_EIP(tsk) (task_pt_regs(tsk)->ret)
|
||||
#define KSTK_ESP(tsk) (task_pt_regs(tsk)->sp)
|
||||
|
||||
/*
|
||||
* Where abouts of Task's sp, fp, blink when it was last seen in kernel mode.
|
||||
* Look in process.c for details of kernel stack layout
|
||||
*/
|
||||
#define KSTK_ESP(tsk) (tsk->thread.ksp)
|
||||
#define TSK_K_ESP(tsk) (tsk->thread.ksp)
|
||||
|
||||
#define KSTK_REG(tsk, off) (*((unsigned int *)(KSTK_ESP(tsk) + \
|
||||
#define TSK_K_REG(tsk, off) (*((unsigned int *)(TSK_K_ESP(tsk) + \
|
||||
sizeof(struct callee_regs) + off)))
|
||||
|
||||
#define KSTK_BLINK(tsk) KSTK_REG(tsk, 4)
|
||||
#define KSTK_FP(tsk) KSTK_REG(tsk, 0)
|
||||
#define TSK_K_BLINK(tsk) TSK_K_REG(tsk, 4)
|
||||
#define TSK_K_FP(tsk) TSK_K_REG(tsk, 0)
|
||||
|
||||
#define thread_saved_pc(tsk) TSK_K_BLINK(tsk)
|
||||
|
||||
extern void start_thread(struct pt_regs * regs, unsigned long pc,
|
||||
unsigned long usp);
|
||||
|
|
|
@ -0,0 +1,37 @@
|
|||
/*
|
||||
* Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)
|
||||
* Copyright (C) 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef __ASM_STACKTRACE_H
|
||||
#define __ASM_STACKTRACE_H
|
||||
|
||||
#include <linux/sched.h>
|
||||
|
||||
/**
|
||||
* arc_unwind_core - Unwind the kernel mode stack for an execution context
|
||||
* @tsk: NULL for current task, specific task otherwise
|
||||
* @regs: pt_regs used to seed the unwinder {SP, FP, BLINK, PC}
|
||||
* If NULL, use pt_regs of @tsk (if !NULL) otherwise
|
||||
* use the current values of {SP, FP, BLINK, PC}
|
||||
* @consumer_fn: Callback invoked for each frame unwound
|
||||
* Returns 0 to continue unwinding, -1 to stop
|
||||
* @arg: Arg to callback
|
||||
*
|
||||
* Returns the address of first function in stack
|
||||
*
|
||||
* Semantics:
|
||||
* - synchronous unwinding (e.g. dump_stack): @tsk NULL, @regs NULL
|
||||
* - Asynchronous unwinding of sleeping task: @tsk !NULL, @regs NULL
|
||||
* - Asynchronous unwinding of intr/excp etc: @tsk !NULL, @regs !NULL
|
||||
*/
|
||||
notrace noinline unsigned int arc_unwind_core(
|
||||
struct task_struct *tsk, struct pt_regs *regs,
|
||||
int (*consumer_fn) (unsigned int, void *),
|
||||
void *arg);
|
||||
|
||||
#endif /* __ASM_STACKTRACE_H */
|
|
@ -192,29 +192,6 @@ int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpu)
|
|||
return 0;
|
||||
}
|
||||
|
||||
/*
|
||||
* API: expected by schedular Code: If thread is sleeping where is that.
|
||||
* What is this good for? it will be always the scheduler or ret_from_fork.
|
||||
* So we hard code that anyways.
|
||||
*/
|
||||
unsigned long thread_saved_pc(struct task_struct *t)
|
||||
{
|
||||
struct pt_regs *regs = task_pt_regs(t);
|
||||
unsigned long blink = 0;
|
||||
|
||||
/*
|
||||
* If the thread being queried for in not itself calling this, then it
|
||||
* implies it is not executing, which in turn implies it is sleeping,
|
||||
* which in turn implies it got switched OUT by the schedular.
|
||||
* In that case, it's kernel mode blink can reliably retrieved as per
|
||||
* the picture above (right above pt_regs).
|
||||
*/
|
||||
if (t != current && t->state != TASK_RUNNING)
|
||||
blink = *((unsigned int *)regs - 1);
|
||||
|
||||
return blink;
|
||||
}
|
||||
|
||||
int elf_check_arch(const struct elf32_hdr *x)
|
||||
{
|
||||
unsigned int eflags;
|
||||
|
|
|
@ -43,6 +43,10 @@ static void seed_unwind_frame_info(struct task_struct *tsk,
|
|||
struct pt_regs *regs,
|
||||
struct unwind_frame_info *frame_info)
|
||||
{
|
||||
/*
|
||||
* synchronous unwinding (e.g. dump_stack)
|
||||
* - uses current values of SP and friends
|
||||
*/
|
||||
if (tsk == NULL && regs == NULL) {
|
||||
unsigned long fp, sp, blink, ret;
|
||||
frame_info->task = current;
|
||||
|
@ -61,12 +65,17 @@ static void seed_unwind_frame_info(struct task_struct *tsk,
|
|||
frame_info->regs.r63 = ret;
|
||||
frame_info->call_frame = 0;
|
||||
} else if (regs == NULL) {
|
||||
/*
|
||||
* Asynchronous unwinding of sleeping task
|
||||
* - Gets SP etc from task's pt_regs (saved bottom of kernel
|
||||
* mode stack of task)
|
||||
*/
|
||||
|
||||
frame_info->task = tsk;
|
||||
|
||||
frame_info->regs.r27 = KSTK_FP(tsk);
|
||||
frame_info->regs.r28 = KSTK_ESP(tsk);
|
||||
frame_info->regs.r31 = KSTK_BLINK(tsk);
|
||||
frame_info->regs.r27 = TSK_K_FP(tsk);
|
||||
frame_info->regs.r28 = TSK_K_ESP(tsk);
|
||||
frame_info->regs.r31 = TSK_K_BLINK(tsk);
|
||||
frame_info->regs.r63 = (unsigned int)__switch_to;
|
||||
|
||||
/* In the prologue of __switch_to, first FP is saved on stack
|
||||
|
@ -83,6 +92,10 @@ static void seed_unwind_frame_info(struct task_struct *tsk,
|
|||
frame_info->call_frame = 0;
|
||||
|
||||
} else {
|
||||
/*
|
||||
* Asynchronous unwinding of intr/exception
|
||||
* - Just uses the pt_regs passed
|
||||
*/
|
||||
frame_info->task = tsk;
|
||||
|
||||
frame_info->regs.r27 = regs->fp;
|
||||
|
@ -95,7 +108,7 @@ static void seed_unwind_frame_info(struct task_struct *tsk,
|
|||
|
||||
#endif
|
||||
|
||||
static noinline unsigned int
|
||||
notrace noinline unsigned int
|
||||
arc_unwind_core(struct task_struct *tsk, struct pt_regs *regs,
|
||||
int (*consumer_fn) (unsigned int, void *), void *arg)
|
||||
{
|
||||
|
|
|
@ -12,6 +12,7 @@
|
|||
*/
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <linux/perf_event.h>
|
||||
#include <linux/ptrace.h>
|
||||
#include <linux/uaccess.h>
|
||||
#include <asm/disasm.h>
|
||||
|
@ -253,6 +254,7 @@ int misaligned_fixup(unsigned long address, struct pt_regs *regs,
|
|||
}
|
||||
}
|
||||
|
||||
perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, regs, address);
|
||||
return 0;
|
||||
|
||||
fault:
|
||||
|
|
|
@ -14,6 +14,7 @@
|
|||
#include <linux/ptrace.h>
|
||||
#include <linux/uaccess.h>
|
||||
#include <linux/kdebug.h>
|
||||
#include <linux/perf_event.h>
|
||||
#include <asm/pgalloc.h>
|
||||
#include <asm/mmu.h>
|
||||
|
||||
|
@ -139,13 +140,20 @@ good_area:
|
|||
return;
|
||||
}
|
||||
|
||||
perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, address);
|
||||
|
||||
if (likely(!(fault & VM_FAULT_ERROR))) {
|
||||
if (flags & FAULT_FLAG_ALLOW_RETRY) {
|
||||
/* To avoid updating stats twice for retry case */
|
||||
if (fault & VM_FAULT_MAJOR)
|
||||
if (fault & VM_FAULT_MAJOR) {
|
||||
tsk->maj_flt++;
|
||||
else
|
||||
perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1,
|
||||
regs, address);
|
||||
} else {
|
||||
tsk->min_flt++;
|
||||
perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1,
|
||||
regs, address);
|
||||
}
|
||||
|
||||
if (fault & VM_FAULT_RETRY) {
|
||||
flags &= ~FAULT_FLAG_ALLOW_RETRY;
|
||||
|
|
|
@ -150,6 +150,7 @@ machine-$(CONFIG_ARCH_BERLIN) += berlin
|
|||
machine-$(CONFIG_ARCH_CLPS711X) += clps711x
|
||||
machine-$(CONFIG_ARCH_CNS3XXX) += cns3xxx
|
||||
machine-$(CONFIG_ARCH_DAVINCI) += davinci
|
||||
machine-$(CONFIG_ARCH_DIGICOLOR) += digicolor
|
||||
machine-$(CONFIG_ARCH_DOVE) += dove
|
||||
machine-$(CONFIG_ARCH_EBSA110) += ebsa110
|
||||
machine-$(CONFIG_ARCH_EFM32) += efm32
|
||||
|
|
|
@ -195,6 +195,7 @@
|
|||
|
||||
&usb0 {
|
||||
status = "okay";
|
||||
dr_mode = "peripheral";
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
|
@ -300,3 +301,11 @@
|
|||
cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
|
||||
cd-inverted;
|
||||
};
|
||||
|
||||
&aes {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&sham {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
@ -24,11 +24,3 @@
|
|||
&mmc1 {
|
||||
vmmc-supply = <&ldo3_reg>;
|
||||
};
|
||||
|
||||
&sham {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&aes {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
@ -328,6 +328,10 @@
|
|||
dual_emac_res_vlan = <3>;
|
||||
};
|
||||
|
||||
&phy_sel {
|
||||
rmii-clock-ext;
|
||||
};
|
||||
|
||||
&mac {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&cpsw_default>;
|
||||
|
|
|
@ -99,7 +99,7 @@
|
|||
ehrpwm0_tbclk: ehrpwm0_tbclk@44e10664 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,gate-clock";
|
||||
clocks = <&dpll_per_m2_ck>;
|
||||
clocks = <&l4ls_gclk>;
|
||||
ti,bit-shift = <0>;
|
||||
reg = <0x0664>;
|
||||
};
|
||||
|
@ -107,7 +107,7 @@
|
|||
ehrpwm1_tbclk: ehrpwm1_tbclk@44e10664 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,gate-clock";
|
||||
clocks = <&dpll_per_m2_ck>;
|
||||
clocks = <&l4ls_gclk>;
|
||||
ti,bit-shift = <1>;
|
||||
reg = <0x0664>;
|
||||
};
|
||||
|
@ -115,7 +115,7 @@
|
|||
ehrpwm2_tbclk: ehrpwm2_tbclk@44e10664 {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,gate-clock";
|
||||
clocks = <&dpll_per_m2_ck>;
|
||||
clocks = <&l4ls_gclk>;
|
||||
ti,bit-shift = <2>;
|
||||
reg = <0x0664>;
|
||||
};
|
||||
|
|
|
@ -133,20 +133,6 @@
|
|||
>;
|
||||
};
|
||||
|
||||
i2c1_pins_default: i2c1_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x15c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */
|
||||
0x158 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c1_pins_sleep: i2c1_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
0x15c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_cs0.i2c1_scl */
|
||||
0x158 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_d1.i2c1_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc1_pins_default: pinmux_mmc1_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x100 (PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
|
||||
|
@ -254,7 +240,7 @@
|
|||
status = "okay";
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&i2c0_pins_default>;
|
||||
pinctrl-1 = <&i2c0_pins_default>;
|
||||
pinctrl-1 = <&i2c0_pins_sleep>;
|
||||
clock-frequency = <400000>;
|
||||
|
||||
at24@50 {
|
||||
|
@ -262,17 +248,10 @@
|
|||
pagesize = <64>;
|
||||
reg = <0x50>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&i2c1_pins_default>;
|
||||
pinctrl-1 = <&i2c1_pins_default>;
|
||||
clock-frequency = <400000>;
|
||||
|
||||
tps: tps62362@60 {
|
||||
compatible = "ti,tps62362";
|
||||
reg = <0x60>;
|
||||
regulator-name = "VDD_MPU";
|
||||
regulator-min-microvolt = <950000>;
|
||||
regulator-max-microvolt = <1330000>;
|
||||
|
|
|
@ -107,7 +107,7 @@
|
|||
ehrpwm0_tbclk: ehrpwm0_tbclk {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,gate-clock";
|
||||
clocks = <&dpll_per_m2_ck>;
|
||||
clocks = <&l4ls_gclk>;
|
||||
ti,bit-shift = <0>;
|
||||
reg = <0x0664>;
|
||||
};
|
||||
|
@ -115,7 +115,7 @@
|
|||
ehrpwm1_tbclk: ehrpwm1_tbclk {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,gate-clock";
|
||||
clocks = <&dpll_per_m2_ck>;
|
||||
clocks = <&l4ls_gclk>;
|
||||
ti,bit-shift = <1>;
|
||||
reg = <0x0664>;
|
||||
};
|
||||
|
@ -123,7 +123,7 @@
|
|||
ehrpwm2_tbclk: ehrpwm2_tbclk {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,gate-clock";
|
||||
clocks = <&dpll_per_m2_ck>;
|
||||
clocks = <&l4ls_gclk>;
|
||||
ti,bit-shift = <2>;
|
||||
reg = <0x0664>;
|
||||
};
|
||||
|
@ -131,7 +131,7 @@
|
|||
ehrpwm3_tbclk: ehrpwm3_tbclk {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,gate-clock";
|
||||
clocks = <&dpll_per_m2_ck>;
|
||||
clocks = <&l4ls_gclk>;
|
||||
ti,bit-shift = <4>;
|
||||
reg = <0x0664>;
|
||||
};
|
||||
|
@ -139,7 +139,7 @@
|
|||
ehrpwm4_tbclk: ehrpwm4_tbclk {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,gate-clock";
|
||||
clocks = <&dpll_per_m2_ck>;
|
||||
clocks = <&l4ls_gclk>;
|
||||
ti,bit-shift = <5>;
|
||||
reg = <0x0664>;
|
||||
};
|
||||
|
@ -147,7 +147,7 @@
|
|||
ehrpwm5_tbclk: ehrpwm5_tbclk {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,gate-clock";
|
||||
clocks = <&dpll_per_m2_ck>;
|
||||
clocks = <&l4ls_gclk>;
|
||||
ti,bit-shift = <6>;
|
||||
reg = <0x0664>;
|
||||
};
|
||||
|
|
|
@ -549,14 +549,6 @@
|
|||
pinctrl-0 = <&usb1_pins>;
|
||||
};
|
||||
|
||||
&omap_dwc3_1 {
|
||||
extcon = <&extcon_usb1>;
|
||||
};
|
||||
|
||||
&omap_dwc3_2 {
|
||||
extcon = <&extcon_usb2>;
|
||||
};
|
||||
|
||||
&usb2 {
|
||||
dr_mode = "peripheral";
|
||||
};
|
||||
|
|
|
@ -494,12 +494,12 @@
|
|||
|
||||
pinctrl_usart3_rts: usart3_rts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC8 periph B */
|
||||
<AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
|
||||
pinctrl_usart3_cts: usart3_cts-0 {
|
||||
atmel,pins =
|
||||
<AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC10 periph B */
|
||||
<AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
|
||||
};
|
||||
};
|
||||
|
||||
|
@ -853,7 +853,7 @@
|
|||
};
|
||||
|
||||
usb1: gadget@fffa4000 {
|
||||
compatible = "atmel,at91rm9200-udc";
|
||||
compatible = "atmel,at91sam9260-udc";
|
||||
reg = <0xfffa4000 0x4000>;
|
||||
interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
|
||||
clocks = <&udc_clk>, <&udpck>;
|
||||
|
@ -976,7 +976,6 @@
|
|||
atmel,watchdog-type = "hardware";
|
||||
atmel,reset-type = "all";
|
||||
atmel,dbg-halt;
|
||||
atmel,idle-halt;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
|
@ -124,11 +124,12 @@
|
|||
};
|
||||
|
||||
usb1: gadget@fffa4000 {
|
||||
compatible = "atmel,at91rm9200-udc";
|
||||
compatible = "atmel,at91sam9261-udc";
|
||||
reg = <0xfffa4000 0x4000>;
|
||||
interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
|
||||
clocks = <&usb>, <&udc_clk>, <&udpck>;
|
||||
clock-names = "usb_clk", "udc_clk", "udpck";
|
||||
clocks = <&udc_clk>, <&udpck>;
|
||||
clock-names = "pclk", "hclk";
|
||||
atmel,matrix = <&matrix>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
@ -262,7 +263,7 @@
|
|||
};
|
||||
|
||||
matrix: matrix@ffffee00 {
|
||||
compatible = "atmel,at91sam9260-bus-matrix";
|
||||
compatible = "atmel,at91sam9260-bus-matrix", "syscon";
|
||||
reg = <0xffffee00 0x200>;
|
||||
};
|
||||
|
||||
|
|
|
@ -69,7 +69,7 @@
|
|||
|
||||
sram1: sram@00500000 {
|
||||
compatible = "mmio-sram";
|
||||
reg = <0x00300000 0x4000>;
|
||||
reg = <0x00500000 0x4000>;
|
||||
};
|
||||
|
||||
ahb {
|
||||
|
@ -856,7 +856,7 @@
|
|||
};
|
||||
|
||||
usb1: gadget@fff78000 {
|
||||
compatible = "atmel,at91rm9200-udc";
|
||||
compatible = "atmel,at91sam9263-udc";
|
||||
reg = <0xfff78000 0x4000>;
|
||||
interrupts = <24 IRQ_TYPE_LEVEL_HIGH 2>;
|
||||
clocks = <&udc_clk>, <&udpck>;
|
||||
|
@ -905,7 +905,6 @@
|
|||
atmel,watchdog-type = "hardware";
|
||||
atmel,reset-type = "all";
|
||||
atmel,dbg-halt;
|
||||
atmel,idle-halt;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
|
@ -1116,7 +1116,6 @@
|
|||
atmel,watchdog-type = "hardware";
|
||||
atmel,reset-type = "all";
|
||||
atmel,dbg-halt;
|
||||
atmel,idle-halt;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
@ -1301,7 +1300,7 @@
|
|||
compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
|
||||
reg = <0x00800000 0x100000>;
|
||||
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
|
||||
clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
|
||||
clocks = <&utmi>, <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
|
||||
clock-names = "usb_clk", "ehci_clk", "hclk", "uhpck";
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
|
@ -894,7 +894,6 @@
|
|||
atmel,watchdog-type = "hardware";
|
||||
atmel,reset-type = "all";
|
||||
atmel,dbg-halt;
|
||||
atmel,idle-halt;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
|
@ -1066,7 +1066,7 @@
|
|||
reg = <0x00500000 0x80000
|
||||
0xf803c000 0x400>;
|
||||
interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
|
||||
clocks = <&usb>, <&udphs_clk>;
|
||||
clocks = <&utmi>, <&udphs_clk>;
|
||||
clock-names = "hclk", "pclk";
|
||||
status = "disabled";
|
||||
|
||||
|
@ -1130,7 +1130,6 @@
|
|||
atmel,watchdog-type = "hardware";
|
||||
atmel,reset-type = "all";
|
||||
atmel,dbg-halt;
|
||||
atmel,idle-halt;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
@ -1186,7 +1185,7 @@
|
|||
compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
|
||||
reg = <0x00700000 0x100000>;
|
||||
interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
|
||||
clocks = <&usb>, <&uhphs_clk>, <&uhpck>;
|
||||
clocks = <&utmi>, <&uhphs_clk>, <&uhpck>;
|
||||
clock-names = "usb_clk", "ehci_clk", "uhpck";
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
|
@ -35,6 +35,18 @@
|
|||
DM816X_IOPAD(0x0aac, PIN_INPUT | MUX_MODE0) /* SPI_D1 */
|
||||
>;
|
||||
};
|
||||
|
||||
usb0_pins: pinmux_usb0_pins {
|
||||
pinctrl-single,pins = <
|
||||
DM816X_IOPAD(0x0d00, MUX_MODE0) /* USB0_DRVVBUS */
|
||||
>;
|
||||
};
|
||||
|
||||
usb1_pins: pinmux_usb0_pins {
|
||||
pinctrl-single,pins = <
|
||||
DM816X_IOPAD(0x0d04, MUX_MODE0) /* USB1_DRVVBUS */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
|
@ -127,3 +139,16 @@
|
|||
&mmc1 {
|
||||
vmmc-supply = <&vmmcsd_fixed>;
|
||||
};
|
||||
|
||||
/* At least dm8168-evm rev c won't support multipoint, later may */
|
||||
&usb0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&usb0_pins>;
|
||||
mentor,multipoint = <0>;
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&usb1_pins>;
|
||||
mentor,multipoint = <0>;
|
||||
};
|
||||
|
|
|
@ -97,10 +97,31 @@
|
|||
|
||||
/* Device Configuration Registers */
|
||||
scm_conf: syscon@600 {
|
||||
compatible = "syscon";
|
||||
compatible = "syscon", "simple-bus";
|
||||
reg = <0x600 0x110>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0x600 0x110>;
|
||||
|
||||
usb_phy0: usb-phy@20 {
|
||||
compatible = "ti,dm8168-usb-phy";
|
||||
reg = <0x20 0x8>;
|
||||
reg-names = "phy";
|
||||
clocks = <&main_fapll 6>;
|
||||
clock-names = "refclk";
|
||||
#phy-cells = <0>;
|
||||
syscon = <&scm_conf>;
|
||||
};
|
||||
|
||||
usb_phy1: usb-phy@28 {
|
||||
compatible = "ti,dm8168-usb-phy";
|
||||
reg = <0x28 0x8>;
|
||||
reg-names = "phy";
|
||||
clocks = <&main_fapll 6>;
|
||||
clock-names = "refclk";
|
||||
#phy-cells = <0>;
|
||||
syscon = <&scm_conf>;
|
||||
};
|
||||
};
|
||||
|
||||
scrm_clocks: clocks {
|
||||
|
@ -357,7 +378,10 @@
|
|||
reg-names = "mc", "control";
|
||||
interrupts = <18>;
|
||||
interrupt-names = "mc";
|
||||
dr_mode = "otg";
|
||||
dr_mode = "host";
|
||||
interface-type = <0>;
|
||||
phys = <&usb_phy0>;
|
||||
phy-names = "usb2-phy";
|
||||
mentor,multipoint = <1>;
|
||||
mentor,num-eps = <16>;
|
||||
mentor,ram-bits = <12>;
|
||||
|
@ -366,13 +390,15 @@
|
|||
|
||||
usb1: usb@47401800 {
|
||||
compatible = "ti,musb-am33xx";
|
||||
status = "disabled";
|
||||
reg = <0x47401c00 0x400
|
||||
0x47401800 0x200>;
|
||||
reg-names = "mc", "control";
|
||||
interrupts = <19>;
|
||||
interrupt-names = "mc";
|
||||
dr_mode = "otg";
|
||||
dr_mode = "host";
|
||||
interface-type = <0>;
|
||||
phys = <&usb_phy1>;
|
||||
phy-names = "usb2-phy";
|
||||
mentor,multipoint = <1>;
|
||||
mentor,num-eps = <16>;
|
||||
mentor,ram-bits = <12>;
|
||||
|
|
|
@ -263,17 +263,15 @@
|
|||
|
||||
dcan1_pins_default: dcan1_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x3d0 (PIN_OUTPUT | MUX_MODE0) /* dcan1_tx */
|
||||
0x3d4 (MUX_MODE15) /* dcan1_rx.off */
|
||||
0x418 (PULL_DIS | MUX_MODE1) /* wakeup0.dcan1_rx */
|
||||
0x3d0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */
|
||||
0x418 (PULL_UP | MUX_MODE1) /* wakeup0.dcan1_rx */
|
||||
>;
|
||||
};
|
||||
|
||||
dcan1_pins_sleep: dcan1_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
0x3d0 (MUX_MODE15) /* dcan1_tx.off */
|
||||
0x3d4 (MUX_MODE15) /* dcan1_rx.off */
|
||||
0x418 (MUX_MODE15) /* wakeup0.off */
|
||||
0x3d0 (MUX_MODE15 | PULL_UP) /* dcan1_tx.off */
|
||||
0x418 (MUX_MODE15 | PULL_UP) /* wakeup0.off */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
@ -543,14 +541,6 @@
|
|||
};
|
||||
};
|
||||
|
||||
&omap_dwc3_1 {
|
||||
extcon = <&extcon_usb1>;
|
||||
};
|
||||
|
||||
&omap_dwc3_2 {
|
||||
extcon = <&extcon_usb2>;
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
dr_mode = "peripheral";
|
||||
pinctrl-names = "default";
|
||||
|
|
|
@ -249,8 +249,8 @@
|
|||
<GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#dma-cells = <1>;
|
||||
#dma-channels = <32>;
|
||||
#dma-requests = <127>;
|
||||
dma-channels = <32>;
|
||||
dma-requests = <127>;
|
||||
};
|
||||
|
||||
gpio1: gpio@4ae10000 {
|
||||
|
@ -1090,8 +1090,8 @@
|
|||
<0x4A096800 0x40>; /* pll_ctrl */
|
||||
reg-names = "phy_rx", "phy_tx", "pll_ctrl";
|
||||
ctrl-module = <&omap_control_sata>;
|
||||
clocks = <&sys_clkin1>;
|
||||
clock-names = "sysclk";
|
||||
clocks = <&sys_clkin1>, <&sata_ref_clk>;
|
||||
clock-names = "sysclk", "refclk";
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
|
||||
|
|
|
@ -119,17 +119,15 @@
|
|||
|
||||
dcan1_pins_default: dcan1_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
0x3d0 (PIN_OUTPUT | MUX_MODE0) /* dcan1_tx */
|
||||
0x3d4 (MUX_MODE15) /* dcan1_rx.off */
|
||||
0x418 (PULL_DIS | MUX_MODE1) /* wakeup0.dcan1_rx */
|
||||
0x3d0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */
|
||||
0x418 (PULL_UP | MUX_MODE1) /* wakeup0.dcan1_rx */
|
||||
>;
|
||||
};
|
||||
|
||||
dcan1_pins_sleep: dcan1_pins_sleep {
|
||||
pinctrl-single,pins = <
|
||||
0x3d0 (MUX_MODE15) /* dcan1_tx.off */
|
||||
0x3d4 (MUX_MODE15) /* dcan1_rx.off */
|
||||
0x418 (MUX_MODE15) /* wakeup0.off */
|
||||
0x3d0 (MUX_MODE15 | PULL_UP) /* dcan1_tx.off */
|
||||
0x418 (MUX_MODE15 | PULL_UP) /* wakeup0.off */
|
||||
>;
|
||||
};
|
||||
|
||||
|
@ -380,14 +378,6 @@
|
|||
phy-supply = <&ldo4_reg>;
|
||||
};
|
||||
|
||||
&omap_dwc3_1 {
|
||||
extcon = <&extcon_usb1>;
|
||||
};
|
||||
|
||||
&omap_dwc3_2 {
|
||||
extcon = <&extcon_usb2>;
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
dr_mode = "peripheral";
|
||||
pinctrl-names = "default";
|
||||
|
|
|
@ -243,10 +243,18 @@
|
|||
ti,invert-autoidle-bit;
|
||||
};
|
||||
|
||||
dpll_core_byp_mux: dpll_core_byp_mux {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,mux-clock";
|
||||
clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>;
|
||||
ti,bit-shift = <23>;
|
||||
reg = <0x012c>;
|
||||
};
|
||||
|
||||
dpll_core_ck: dpll_core_ck {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,omap4-dpll-core-clock";
|
||||
clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>;
|
||||
clocks = <&sys_clkin1>, <&dpll_core_byp_mux>;
|
||||
reg = <0x0120>, <0x0124>, <0x012c>, <0x0128>;
|
||||
};
|
||||
|
||||
|
@ -309,10 +317,18 @@
|
|||
clock-div = <1>;
|
||||
};
|
||||
|
||||
dpll_dsp_byp_mux: dpll_dsp_byp_mux {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,mux-clock";
|
||||
clocks = <&sys_clkin1>, <&dsp_dpll_hs_clk_div>;
|
||||
ti,bit-shift = <23>;
|
||||
reg = <0x0240>;
|
||||
};
|
||||
|
||||
dpll_dsp_ck: dpll_dsp_ck {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,omap4-dpll-clock";
|
||||
clocks = <&sys_clkin1>, <&dsp_dpll_hs_clk_div>;
|
||||
clocks = <&sys_clkin1>, <&dpll_dsp_byp_mux>;
|
||||
reg = <0x0234>, <0x0238>, <0x0240>, <0x023c>;
|
||||
};
|
||||
|
||||
|
@ -335,10 +351,18 @@
|
|||
clock-div = <1>;
|
||||
};
|
||||
|
||||
dpll_iva_byp_mux: dpll_iva_byp_mux {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,mux-clock";
|
||||
clocks = <&sys_clkin1>, <&iva_dpll_hs_clk_div>;
|
||||
ti,bit-shift = <23>;
|
||||
reg = <0x01ac>;
|
||||
};
|
||||
|
||||
dpll_iva_ck: dpll_iva_ck {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,omap4-dpll-clock";
|
||||
clocks = <&sys_clkin1>, <&iva_dpll_hs_clk_div>;
|
||||
clocks = <&sys_clkin1>, <&dpll_iva_byp_mux>;
|
||||
reg = <0x01a0>, <0x01a4>, <0x01ac>, <0x01a8>;
|
||||
};
|
||||
|
||||
|
@ -361,10 +385,18 @@
|
|||
clock-div = <1>;
|
||||
};
|
||||
|
||||
dpll_gpu_byp_mux: dpll_gpu_byp_mux {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,mux-clock";
|
||||
clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>;
|
||||
ti,bit-shift = <23>;
|
||||
reg = <0x02e4>;
|
||||
};
|
||||
|
||||
dpll_gpu_ck: dpll_gpu_ck {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,omap4-dpll-clock";
|
||||
clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>;
|
||||
clocks = <&sys_clkin1>, <&dpll_gpu_byp_mux>;
|
||||
reg = <0x02d8>, <0x02dc>, <0x02e4>, <0x02e0>;
|
||||
};
|
||||
|
||||
|
@ -398,10 +430,18 @@
|
|||
clock-div = <1>;
|
||||
};
|
||||
|
||||
dpll_ddr_byp_mux: dpll_ddr_byp_mux {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,mux-clock";
|
||||
clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>;
|
||||
ti,bit-shift = <23>;
|
||||
reg = <0x021c>;
|
||||
};
|
||||
|
||||
dpll_ddr_ck: dpll_ddr_ck {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,omap4-dpll-clock";
|
||||
clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>;
|
||||
clocks = <&sys_clkin1>, <&dpll_ddr_byp_mux>;
|
||||
reg = <0x0210>, <0x0214>, <0x021c>, <0x0218>;
|
||||
};
|
||||
|
||||
|
@ -416,10 +456,18 @@
|
|||
ti,invert-autoidle-bit;
|
||||
};
|
||||
|
||||
dpll_gmac_byp_mux: dpll_gmac_byp_mux {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,mux-clock";
|
||||
clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>;
|
||||
ti,bit-shift = <23>;
|
||||
reg = <0x02b4>;
|
||||
};
|
||||
|
||||
dpll_gmac_ck: dpll_gmac_ck {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,omap4-dpll-clock";
|
||||
clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>;
|
||||
clocks = <&sys_clkin1>, <&dpll_gmac_byp_mux>;
|
||||
reg = <0x02a8>, <0x02ac>, <0x02b4>, <0x02b0>;
|
||||
};
|
||||
|
||||
|
@ -482,10 +530,18 @@
|
|||
clock-div = <1>;
|
||||
};
|
||||
|
||||
dpll_eve_byp_mux: dpll_eve_byp_mux {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,mux-clock";
|
||||
clocks = <&sys_clkin1>, <&eve_dpll_hs_clk_div>;
|
||||
ti,bit-shift = <23>;
|
||||
reg = <0x0290>;
|
||||
};
|
||||
|
||||
dpll_eve_ck: dpll_eve_ck {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,omap4-dpll-clock";
|
||||
clocks = <&sys_clkin1>, <&eve_dpll_hs_clk_div>;
|
||||
clocks = <&sys_clkin1>, <&dpll_eve_byp_mux>;
|
||||
reg = <0x0284>, <0x0288>, <0x0290>, <0x028c>;
|
||||
};
|
||||
|
||||
|
@ -1249,10 +1305,18 @@
|
|||
clock-div = <1>;
|
||||
};
|
||||
|
||||
dpll_per_byp_mux: dpll_per_byp_mux {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,mux-clock";
|
||||
clocks = <&sys_clkin1>, <&per_dpll_hs_clk_div>;
|
||||
ti,bit-shift = <23>;
|
||||
reg = <0x014c>;
|
||||
};
|
||||
|
||||
dpll_per_ck: dpll_per_ck {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,omap4-dpll-clock";
|
||||
clocks = <&sys_clkin1>, <&per_dpll_hs_clk_div>;
|
||||
clocks = <&sys_clkin1>, <&dpll_per_byp_mux>;
|
||||
reg = <0x0140>, <0x0144>, <0x014c>, <0x0148>;
|
||||
};
|
||||
|
||||
|
@ -1275,10 +1339,18 @@
|
|||
clock-div = <1>;
|
||||
};
|
||||
|
||||
dpll_usb_byp_mux: dpll_usb_byp_mux {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,mux-clock";
|
||||
clocks = <&sys_clkin1>, <&usb_dpll_hs_clk_div>;
|
||||
ti,bit-shift = <23>;
|
||||
reg = <0x018c>;
|
||||
};
|
||||
|
||||
dpll_usb_ck: dpll_usb_ck {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,omap4-dpll-j-type-clock";
|
||||
clocks = <&sys_clkin1>, <&usb_dpll_hs_clk_div>;
|
||||
clocks = <&sys_clkin1>, <&dpll_usb_byp_mux>;
|
||||
reg = <0x0180>, <0x0184>, <0x018c>, <0x0188>;
|
||||
};
|
||||
|
||||
|
|
|
@ -18,6 +18,7 @@
|
|||
*/
|
||||
|
||||
#include "skeleton.dtsi"
|
||||
#include "exynos4-cpu-thermal.dtsi"
|
||||
#include <dt-bindings/clock/exynos3250.h>
|
||||
|
||||
/ {
|
||||
|
@ -193,6 +194,7 @@
|
|||
interrupts = <0 216 0>;
|
||||
clocks = <&cmu CLK_TMU_APBIF>;
|
||||
clock-names = "tmu_apbif";
|
||||
#include "exynos4412-tmu-sensor-conf.dtsi"
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
|
|
@ -0,0 +1,52 @@
|
|||
/*
|
||||
* Device tree sources for Exynos4 thermal zone
|
||||
*
|
||||
* Copyright (c) 2014 Lukasz Majewski <l.majewski@samsung.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <dt-bindings/thermal/thermal.h>
|
||||
|
||||
/ {
|
||||
thermal-zones {
|
||||
cpu_thermal: cpu-thermal {
|
||||
thermal-sensors = <&tmu 0>;
|
||||
polling-delay-passive = <0>;
|
||||
polling-delay = <0>;
|
||||
trips {
|
||||
cpu_alert0: cpu-alert-0 {
|
||||
temperature = <70000>; /* millicelsius */
|
||||
hysteresis = <10000>; /* millicelsius */
|
||||
type = "active";
|
||||
};
|
||||
cpu_alert1: cpu-alert-1 {
|
||||
temperature = <95000>; /* millicelsius */
|
||||
hysteresis = <10000>; /* millicelsius */
|
||||
type = "active";
|
||||
};
|
||||
cpu_alert2: cpu-alert-2 {
|
||||
temperature = <110000>; /* millicelsius */
|
||||
hysteresis = <10000>; /* millicelsius */
|
||||
type = "active";
|
||||
};
|
||||
cpu_crit0: cpu-crit-0 {
|
||||
temperature = <120000>; /* millicelsius */
|
||||
hysteresis = <0>; /* millicelsius */
|
||||
type = "critical";
|
||||
};
|
||||
};
|
||||
cooling-maps {
|
||||
map0 {
|
||||
trip = <&cpu_alert0>;
|
||||
};
|
||||
map1 {
|
||||
trip = <&cpu_alert1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
|
@ -38,6 +38,7 @@
|
|||
i2c5 = &i2c_5;
|
||||
i2c6 = &i2c_6;
|
||||
i2c7 = &i2c_7;
|
||||
i2c8 = &i2c_8;
|
||||
csis0 = &csis_0;
|
||||
csis1 = &csis_1;
|
||||
fimc0 = &fimc_0;
|
||||
|
@ -104,6 +105,7 @@
|
|||
compatible = "samsung,exynos4210-pd";
|
||||
reg = <0x10023C20 0x20>;
|
||||
#power-domain-cells = <0>;
|
||||
power-domains = <&pd_lcd0>;
|
||||
};
|
||||
|
||||
pd_cam: cam-power-domain@10023C00 {
|
||||
|
@ -554,6 +556,22 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c_8: i2c@138E0000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "samsung,s3c2440-hdmiphy-i2c";
|
||||
reg = <0x138E0000 0x100>;
|
||||
interrupts = <0 93 0>;
|
||||
clocks = <&clock CLK_I2C_HDMI>;
|
||||
clock-names = "i2c";
|
||||
status = "disabled";
|
||||
|
||||
hdmi_i2c_phy: hdmiphy@38 {
|
||||
compatible = "exynos4210-hdmiphy";
|
||||
reg = <0x38>;
|
||||
};
|
||||
};
|
||||
|
||||
spi_0: spi@13920000 {
|
||||
compatible = "samsung,exynos4210-spi";
|
||||
reg = <0x13920000 0x100>;
|
||||
|
@ -663,6 +681,33 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
tmu: tmu@100C0000 {
|
||||
#include "exynos4412-tmu-sensor-conf.dtsi"
|
||||
};
|
||||
|
||||
hdmi: hdmi@12D00000 {
|
||||
compatible = "samsung,exynos4210-hdmi";
|
||||
reg = <0x12D00000 0x70000>;
|
||||
interrupts = <0 92 0>;
|
||||
clock-names = "hdmi", "sclk_hdmi", "sclk_pixel", "sclk_hdmiphy",
|
||||
"mout_hdmi";
|
||||
clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>,
|
||||
<&clock CLK_SCLK_PIXEL>, <&clock CLK_SCLK_HDMIPHY>,
|
||||
<&clock CLK_MOUT_HDMI>;
|
||||
phy = <&hdmi_i2c_phy>;
|
||||
power-domains = <&pd_tv>;
|
||||
samsung,syscon-phandle = <&pmu_system_controller>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mixer: mixer@12C10000 {
|
||||
compatible = "samsung,exynos4210-mixer";
|
||||
interrupts = <0 91 0>;
|
||||
reg = <0x12C10000 0x2100>, <0x12c00000 0x300>;
|
||||
power-domains = <&pd_tv>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ppmu_dmc0: ppmu_dmc0@106a0000 {
|
||||
compatible = "samsung,exynos-ppmu";
|
||||
reg = <0x106a0000 0x2000>;
|
||||
|
|
|
@ -426,6 +426,25 @@
|
|||
status = "okay";
|
||||
};
|
||||
|
||||
tmu@100C0000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
thermal-zones {
|
||||
cpu_thermal: cpu-thermal {
|
||||
cooling-maps {
|
||||
map0 {
|
||||
/* Corresponds to 800MHz at freq_table */
|
||||
cooling-device = <&cpu0 2 2>;
|
||||
};
|
||||
map1 {
|
||||
/* Corresponds to 200MHz at freq_table */
|
||||
cooling-device = <&cpu0 4 4>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
camera {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <>;
|
||||
|
|
|
@ -505,6 +505,63 @@
|
|||
assigned-clock-rates = <0>, <160000000>;
|
||||
};
|
||||
};
|
||||
|
||||
hdmi_en: voltage-regulator-hdmi-5v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "HDMI_5V";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
gpio = <&gpe0 1 0>;
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
hdmi_ddc: i2c-ddc {
|
||||
compatible = "i2c-gpio";
|
||||
gpios = <&gpe4 2 0 &gpe4 3 0>;
|
||||
i2c-gpio,delay-us = <100>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
pinctrl-0 = <&i2c_ddc_bus>;
|
||||
pinctrl-names = "default";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
mixer@12C10000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
hdmi@12D00000 {
|
||||
hpd-gpio = <&gpx3 7 0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&hdmi_hpd>;
|
||||
hdmi-en-supply = <&hdmi_en>;
|
||||
vdd-supply = <&ldo3_reg>;
|
||||
vdd_osc-supply = <&ldo4_reg>;
|
||||
vdd_pll-supply = <&ldo3_reg>;
|
||||
ddc = <&hdmi_ddc>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
i2c@138E0000 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl_1 {
|
||||
hdmi_hpd: hdmi-hpd {
|
||||
samsung,pins = "gpx3-7";
|
||||
samsung,pin-pud = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl_0 {
|
||||
i2c_ddc_bus: i2c-ddc-bus {
|
||||
samsung,pins = "gpe4-2", "gpe4-3";
|
||||
samsung,pin-function = <2>;
|
||||
samsung,pin-pud = <3>;
|
||||
samsung,pin-drv = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
&mdma1 {
|
||||
|
|
|
@ -21,6 +21,7 @@
|
|||
|
||||
#include "exynos4.dtsi"
|
||||
#include "exynos4210-pinctrl.dtsi"
|
||||
#include "exynos4-cpu-thermal.dtsi"
|
||||
|
||||
/ {
|
||||
compatible = "samsung,exynos4210", "samsung,exynos4";
|
||||
|
@ -35,10 +36,13 @@
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu@900 {
|
||||
cpu0: cpu@900 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a9";
|
||||
reg = <0x900>;
|
||||
cooling-min-level = <4>;
|
||||
cooling-max-level = <2>;
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
|
||||
cpu@901 {
|
||||
|
@ -153,16 +157,38 @@
|
|||
reg = <0x03860000 0x1000>;
|
||||
};
|
||||
|
||||
tmu@100C0000 {
|
||||
tmu: tmu@100C0000 {
|
||||
compatible = "samsung,exynos4210-tmu";
|
||||
interrupt-parent = <&combiner>;
|
||||
reg = <0x100C0000 0x100>;
|
||||
interrupts = <2 4>;
|
||||
clocks = <&clock CLK_TMU_APBIF>;
|
||||
clock-names = "tmu_apbif";
|
||||
samsung,tmu_gain = <15>;
|
||||
samsung,tmu_reference_voltage = <7>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
thermal-zones {
|
||||
cpu_thermal: cpu-thermal {
|
||||
polling-delay-passive = <0>;
|
||||
polling-delay = <0>;
|
||||
thermal-sensors = <&tmu 0>;
|
||||
|
||||
trips {
|
||||
cpu_alert0: cpu-alert-0 {
|
||||
temperature = <85000>; /* millicelsius */
|
||||
};
|
||||
cpu_alert1: cpu-alert-1 {
|
||||
temperature = <100000>; /* millicelsius */
|
||||
};
|
||||
cpu_alert2: cpu-alert-2 {
|
||||
temperature = <110000>; /* millicelsius */
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
g2d@12800000 {
|
||||
compatible = "samsung,s5pv210-g2d";
|
||||
reg = <0x12800000 0x1000>;
|
||||
|
@ -203,6 +229,14 @@
|
|||
};
|
||||
};
|
||||
|
||||
mixer: mixer@12C10000 {
|
||||
clock-names = "mixer", "hdmi", "sclk_hdmi", "vp", "mout_mixer",
|
||||
"sclk_mixer";
|
||||
clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>,
|
||||
<&clock CLK_SCLK_HDMI>, <&clock CLK_VP>,
|
||||
<&clock CLK_MOUT_MIXER>, <&clock CLK_SCLK_MIXER>;
|
||||
};
|
||||
|
||||
ppmu_lcd1: ppmu_lcd1@12240000 {
|
||||
compatible = "samsung,exynos-ppmu";
|
||||
reg = <0x12240000 0x2000>;
|
||||
|
|
|
@ -26,10 +26,13 @@
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu@A00 {
|
||||
cpu0: cpu@A00 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a9";
|
||||
reg = <0xA00>;
|
||||
cooling-min-level = <13>;
|
||||
cooling-max-level = <7>;
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
|
||||
cpu@A01 {
|
||||
|
|
|
@ -249,6 +249,20 @@
|
|||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo8_reg: ldo@8 {
|
||||
regulator-compatible = "LDO8";
|
||||
regulator-name = "VDD10_HDMI_1.0V";
|
||||
regulator-min-microvolt = <1000000>;
|
||||
regulator-max-microvolt = <1000000>;
|
||||
};
|
||||
|
||||
ldo10_reg: ldo@10 {
|
||||
regulator-compatible = "LDO10";
|
||||
regulator-name = "VDDQ_MIPIHSI_1.8V";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
ldo11_reg: LDO11 {
|
||||
regulator-name = "VDD18_ABB1_1.8V";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
|
@ -411,6 +425,51 @@
|
|||
ehci: ehci@12580000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
tmu@100C0000 {
|
||||
vtmu-supply = <&ldo10_reg>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
thermal-zones {
|
||||
cpu_thermal: cpu-thermal {
|
||||
cooling-maps {
|
||||
map0 {
|
||||
/* Corresponds to 800MHz at freq_table */
|
||||
cooling-device = <&cpu0 7 7>;
|
||||
};
|
||||
map1 {
|
||||
/* Corresponds to 200MHz at freq_table */
|
||||
cooling-device = <&cpu0 13 13>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
mixer: mixer@12C10000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
hdmi@12D00000 {
|
||||
hpd-gpio = <&gpx3 7 0>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&hdmi_hpd>;
|
||||
vdd-supply = <&ldo8_reg>;
|
||||
vdd_osc-supply = <&ldo10_reg>;
|
||||
vdd_pll-supply = <&ldo8_reg>;
|
||||
ddc = <&hdmi_ddc>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
hdmi_ddc: i2c@13880000 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c2_bus>;
|
||||
};
|
||||
|
||||
i2c@138E0000 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
&pinctrl_1 {
|
||||
|
@ -425,4 +484,9 @@
|
|||
samsung,pin-pud = <0>;
|
||||
samsung,pin-drv = <0>;
|
||||
};
|
||||
|
||||
hdmi_hpd: hdmi-hpd {
|
||||
samsung,pins = "gpx3-7";
|
||||
samsung,pin-pud = <1>;
|
||||
};
|
||||
};
|
||||
|
|
|
@ -0,0 +1,24 @@
|
|||
/*
|
||||
* Device tree sources for Exynos4412 TMU sensor configuration
|
||||
*
|
||||
* Copyright (c) 2014 Lukasz Majewski <l.majewski@samsung.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <dt-bindings/thermal/thermal_exynos.h>
|
||||
|
||||
#thermal-sensor-cells = <0>;
|
||||
samsung,tmu_gain = <8>;
|
||||
samsung,tmu_reference_voltage = <16>;
|
||||
samsung,tmu_noise_cancel_mode = <4>;
|
||||
samsung,tmu_efuse_value = <55>;
|
||||
samsung,tmu_min_efuse_value = <40>;
|
||||
samsung,tmu_max_efuse_value = <100>;
|
||||
samsung,tmu_first_point_trim = <25>;
|
||||
samsung,tmu_second_point_trim = <85>;
|
||||
samsung,tmu_default_temp_offset = <50>;
|
||||
samsung,tmu_cal_type = <TYPE_ONE_POINT_TRIMMING>;
|
|
@ -927,6 +927,21 @@
|
|||
pulldown-ohm = <100000>; /* 100K */
|
||||
io-channels = <&adc 2>; /* Battery temperature */
|
||||
};
|
||||
|
||||
thermal-zones {
|
||||
cpu_thermal: cpu-thermal {
|
||||
cooling-maps {
|
||||
map0 {
|
||||
/* Corresponds to 800MHz at freq_table */
|
||||
cooling-device = <&cpu0 7 7>;
|
||||
};
|
||||
map1 {
|
||||
/* Corresponds to 200MHz at freq_table */
|
||||
cooling-device = <&cpu0 13 13>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&pmu_system_controller {
|
||||
|
|
|
@ -26,10 +26,13 @@
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu@A00 {
|
||||
cpu0: cpu@A00 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a9";
|
||||
reg = <0xA00>;
|
||||
cooling-min-level = <13>;
|
||||
cooling-max-level = <7>;
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
|
||||
cpu@A01 {
|
||||
|
|
|
@ -19,6 +19,7 @@
|
|||
|
||||
#include "exynos4.dtsi"
|
||||
#include "exynos4x12-pinctrl.dtsi"
|
||||
#include "exynos4-cpu-thermal.dtsi"
|
||||
|
||||
/ {
|
||||
aliases {
|
||||
|
@ -297,4 +298,15 @@
|
|||
clock-names = "tmu_apbif";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
hdmi: hdmi@12D00000 {
|
||||
compatible = "samsung,exynos4212-hdmi";
|
||||
};
|
||||
|
||||
mixer: mixer@12C10000 {
|
||||
compatible = "samsung,exynos4212-mixer";
|
||||
clock-names = "mixer", "hdmi", "sclk_hdmi", "vp";
|
||||
clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>,
|
||||
<&clock CLK_SCLK_HDMI>, <&clock CLK_VP>;
|
||||
};
|
||||
};
|
||||
|
|
|
@ -20,7 +20,7 @@
|
|||
#include <dt-bindings/clock/exynos5250.h>
|
||||
#include "exynos5.dtsi"
|
||||
#include "exynos5250-pinctrl.dtsi"
|
||||
|
||||
#include "exynos4-cpu-thermal.dtsi"
|
||||
#include <dt-bindings/clock/exynos-audss-clk.h>
|
||||
|
||||
/ {
|
||||
|
@ -58,11 +58,14 @@
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu@0 {
|
||||
cpu0: cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a15";
|
||||
reg = <0>;
|
||||
clock-frequency = <1700000000>;
|
||||
cooling-min-level = <15>;
|
||||
cooling-max-level = <9>;
|
||||
#cooling-cells = <2>; /* min followed by max */
|
||||
};
|
||||
cpu@1 {
|
||||
device_type = "cpu";
|
||||
|
@ -102,6 +105,12 @@
|
|||
#power-domain-cells = <0>;
|
||||
};
|
||||
|
||||
pd_disp1: disp1-power-domain@100440A0 {
|
||||
compatible = "samsung,exynos4210-pd";
|
||||
reg = <0x100440A0 0x20>;
|
||||
#power-domain-cells = <0>;
|
||||
};
|
||||
|
||||
clock: clock-controller@10010000 {
|
||||
compatible = "samsung,exynos5250-clock";
|
||||
reg = <0x10010000 0x30000>;
|
||||
|
@ -235,12 +244,32 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
tmu@10060000 {
|
||||
tmu: tmu@10060000 {
|
||||
compatible = "samsung,exynos5250-tmu";
|
||||
reg = <0x10060000 0x100>;
|
||||
interrupts = <0 65 0>;
|
||||
clocks = <&clock CLK_TMU>;
|
||||
clock-names = "tmu_apbif";
|
||||
#include "exynos4412-tmu-sensor-conf.dtsi"
|
||||
};
|
||||
|
||||
thermal-zones {
|
||||
cpu_thermal: cpu-thermal {
|
||||
polling-delay-passive = <0>;
|
||||
polling-delay = <0>;
|
||||
thermal-sensors = <&tmu 0>;
|
||||
|
||||
cooling-maps {
|
||||
map0 {
|
||||
/* Corresponds to 800MHz at freq_table */
|
||||
cooling-device = <&cpu0 9 9>;
|
||||
};
|
||||
map1 {
|
||||
/* Corresponds to 200MHz at freq_table */
|
||||
cooling-device = <&cpu0 15 15>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
serial@12C00000 {
|
||||
|
@ -719,6 +748,7 @@
|
|||
hdmi: hdmi {
|
||||
compatible = "samsung,exynos4212-hdmi";
|
||||
reg = <0x14530000 0x70000>;
|
||||
power-domains = <&pd_disp1>;
|
||||
interrupts = <0 95 0>;
|
||||
clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>,
|
||||
<&clock CLK_SCLK_PIXEL>, <&clock CLK_SCLK_HDMIPHY>,
|
||||
|
@ -731,9 +761,11 @@
|
|||
mixer {
|
||||
compatible = "samsung,exynos5250-mixer";
|
||||
reg = <0x14450000 0x10000>;
|
||||
power-domains = <&pd_disp1>;
|
||||
interrupts = <0 94 0>;
|
||||
clocks = <&clock CLK_MIXER>, <&clock CLK_SCLK_HDMI>;
|
||||
clock-names = "mixer", "sclk_hdmi";
|
||||
clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>,
|
||||
<&clock CLK_SCLK_HDMI>;
|
||||
clock-names = "mixer", "hdmi", "sclk_hdmi";
|
||||
};
|
||||
|
||||
dp_phy: video-phy@10040720 {
|
||||
|
@ -743,6 +775,7 @@
|
|||
};
|
||||
|
||||
dp: dp-controller@145B0000 {
|
||||
power-domains = <&pd_disp1>;
|
||||
clocks = <&clock CLK_DP>;
|
||||
clock-names = "dp";
|
||||
phys = <&dp_phy>;
|
||||
|
@ -750,6 +783,7 @@
|
|||
};
|
||||
|
||||
fimd: fimd@14400000 {
|
||||
power-domains = <&pd_disp1>;
|
||||
clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>;
|
||||
clock-names = "sclk_fimd", "fimd";
|
||||
};
|
||||
|
|
|
@ -0,0 +1,35 @@
|
|||
/*
|
||||
* Device tree sources for default Exynos5420 thermal zone definition
|
||||
*
|
||||
* Copyright (c) 2014 Lukasz Majewski <l.majewski@samsung.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
*/
|
||||
|
||||
polling-delay-passive = <0>;
|
||||
polling-delay = <0>;
|
||||
trips {
|
||||
cpu-alert-0 {
|
||||
temperature = <85000>; /* millicelsius */
|
||||
hysteresis = <10000>; /* millicelsius */
|
||||
type = "active";
|
||||
};
|
||||
cpu-alert-1 {
|
||||
temperature = <103000>; /* millicelsius */
|
||||
hysteresis = <10000>; /* millicelsius */
|
||||
type = "active";
|
||||
};
|
||||
cpu-alert-2 {
|
||||
temperature = <110000>; /* millicelsius */
|
||||
hysteresis = <10000>; /* millicelsius */
|
||||
type = "active";
|
||||
};
|
||||
cpu-crit-0 {
|
||||
temperature = <1200000>; /* millicelsius */
|
||||
hysteresis = <0>; /* millicelsius */
|
||||
type = "critical";
|
||||
};
|
||||
};
|
|
@ -740,8 +740,9 @@
|
|||
compatible = "samsung,exynos5420-mixer";
|
||||
reg = <0x14450000 0x10000>;
|
||||
interrupts = <0 94 0>;
|
||||
clocks = <&clock CLK_MIXER>, <&clock CLK_SCLK_HDMI>;
|
||||
clock-names = "mixer", "sclk_hdmi";
|
||||
clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>,
|
||||
<&clock CLK_SCLK_HDMI>;
|
||||
clock-names = "mixer", "hdmi", "sclk_hdmi";
|
||||
power-domains = <&disp_pd>;
|
||||
};
|
||||
|
||||
|
@ -782,6 +783,7 @@
|
|||
interrupts = <0 65 0>;
|
||||
clocks = <&clock CLK_TMU>;
|
||||
clock-names = "tmu_apbif";
|
||||
#include "exynos4412-tmu-sensor-conf.dtsi"
|
||||
};
|
||||
|
||||
tmu_cpu1: tmu@10064000 {
|
||||
|
@ -790,6 +792,7 @@
|
|||
interrupts = <0 183 0>;
|
||||
clocks = <&clock CLK_TMU>;
|
||||
clock-names = "tmu_apbif";
|
||||
#include "exynos4412-tmu-sensor-conf.dtsi"
|
||||
};
|
||||
|
||||
tmu_cpu2: tmu@10068000 {
|
||||
|
@ -798,6 +801,7 @@
|
|||
interrupts = <0 184 0>;
|
||||
clocks = <&clock CLK_TMU>, <&clock CLK_TMU>;
|
||||
clock-names = "tmu_apbif", "tmu_triminfo_apbif";
|
||||
#include "exynos4412-tmu-sensor-conf.dtsi"
|
||||
};
|
||||
|
||||
tmu_cpu3: tmu@1006c000 {
|
||||
|
@ -806,6 +810,7 @@
|
|||
interrupts = <0 185 0>;
|
||||
clocks = <&clock CLK_TMU>, <&clock CLK_TMU_GPU>;
|
||||
clock-names = "tmu_apbif", "tmu_triminfo_apbif";
|
||||
#include "exynos4412-tmu-sensor-conf.dtsi"
|
||||
};
|
||||
|
||||
tmu_gpu: tmu@100a0000 {
|
||||
|
@ -814,6 +819,30 @@
|
|||
interrupts = <0 215 0>;
|
||||
clocks = <&clock CLK_TMU_GPU>, <&clock CLK_TMU>;
|
||||
clock-names = "tmu_apbif", "tmu_triminfo_apbif";
|
||||
#include "exynos4412-tmu-sensor-conf.dtsi"
|
||||
};
|
||||
|
||||
thermal-zones {
|
||||
cpu0_thermal: cpu0-thermal {
|
||||
thermal-sensors = <&tmu_cpu0>;
|
||||
#include "exynos5420-trip-points.dtsi"
|
||||
};
|
||||
cpu1_thermal: cpu1-thermal {
|
||||
thermal-sensors = <&tmu_cpu1>;
|
||||
#include "exynos5420-trip-points.dtsi"
|
||||
};
|
||||
cpu2_thermal: cpu2-thermal {
|
||||
thermal-sensors = <&tmu_cpu2>;
|
||||
#include "exynos5420-trip-points.dtsi"
|
||||
};
|
||||
cpu3_thermal: cpu3-thermal {
|
||||
thermal-sensors = <&tmu_cpu3>;
|
||||
#include "exynos5420-trip-points.dtsi"
|
||||
};
|
||||
gpu_thermal: gpu-thermal {
|
||||
thermal-sensors = <&tmu_gpu>;
|
||||
#include "exynos5420-trip-points.dtsi"
|
||||
};
|
||||
};
|
||||
|
||||
watchdog: watchdog@101D0000 {
|
||||
|
|
|
@ -0,0 +1,24 @@
|
|||
/*
|
||||
* Device tree sources for Exynos5440 TMU sensor configuration
|
||||
*
|
||||
* Copyright (c) 2014 Lukasz Majewski <l.majewski@samsung.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
*/
|
||||
|
||||
#include <dt-bindings/thermal/thermal_exynos.h>
|
||||
|
||||
#thermal-sensor-cells = <0>;
|
||||
samsung,tmu_gain = <5>;
|
||||
samsung,tmu_reference_voltage = <16>;
|
||||
samsung,tmu_noise_cancel_mode = <4>;
|
||||
samsung,tmu_efuse_value = <0x5d2d>;
|
||||
samsung,tmu_min_efuse_value = <16>;
|
||||
samsung,tmu_max_efuse_value = <76>;
|
||||
samsung,tmu_first_point_trim = <25>;
|
||||
samsung,tmu_second_point_trim = <70>;
|
||||
samsung,tmu_default_temp_offset = <25>;
|
||||
samsung,tmu_cal_type = <TYPE_ONE_POINT_TRIMMING>;
|
|
@ -0,0 +1,25 @@
|
|||
/*
|
||||
* Device tree sources for default Exynos5440 thermal zone definition
|
||||
*
|
||||
* Copyright (c) 2014 Lukasz Majewski <l.majewski@samsung.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
*/
|
||||
|
||||
polling-delay-passive = <0>;
|
||||
polling-delay = <0>;
|
||||
trips {
|
||||
cpu-alert-0 {
|
||||
temperature = <100000>; /* millicelsius */
|
||||
hysteresis = <0>; /* millicelsius */
|
||||
type = "active";
|
||||
};
|
||||
cpu-crit-0 {
|
||||
temperature = <1050000>; /* millicelsius */
|
||||
hysteresis = <0>; /* millicelsius */
|
||||
type = "critical";
|
||||
};
|
||||
};
|
|
@ -219,6 +219,7 @@
|
|||
interrupts = <0 58 0>;
|
||||
clocks = <&clock CLK_B_125>;
|
||||
clock-names = "tmu_apbif";
|
||||
#include "exynos5440-tmu-sensor-conf.dtsi"
|
||||
};
|
||||
|
||||
tmuctrl_1: tmuctrl@16011C {
|
||||
|
@ -227,6 +228,7 @@
|
|||
interrupts = <0 58 0>;
|
||||
clocks = <&clock CLK_B_125>;
|
||||
clock-names = "tmu_apbif";
|
||||
#include "exynos5440-tmu-sensor-conf.dtsi"
|
||||
};
|
||||
|
||||
tmuctrl_2: tmuctrl@160120 {
|
||||
|
@ -235,6 +237,22 @@
|
|||
interrupts = <0 58 0>;
|
||||
clocks = <&clock CLK_B_125>;
|
||||
clock-names = "tmu_apbif";
|
||||
#include "exynos5440-tmu-sensor-conf.dtsi"
|
||||
};
|
||||
|
||||
thermal-zones {
|
||||
cpu0_thermal: cpu0-thermal {
|
||||
thermal-sensors = <&tmuctrl_0>;
|
||||
#include "exynos5440-trip-points.dtsi"
|
||||
};
|
||||
cpu1_thermal: cpu1-thermal {
|
||||
thermal-sensors = <&tmuctrl_1>;
|
||||
#include "exynos5440-trip-points.dtsi"
|
||||
};
|
||||
cpu2_thermal: cpu2-thermal {
|
||||
thermal-sensors = <&tmuctrl_2>;
|
||||
#include "exynos5440-trip-points.dtsi"
|
||||
};
|
||||
};
|
||||
|
||||
sata@210000 {
|
||||
|
|
|
@ -35,6 +35,7 @@
|
|||
regulator-max-microvolt = <5000000>;
|
||||
gpio = <&gpio3 22 0>;
|
||||
enable-active-high;
|
||||
vin-supply = <&swbst_reg>;
|
||||
};
|
||||
|
||||
reg_usb_h1_vbus: regulator@1 {
|
||||
|
@ -45,6 +46,7 @@
|
|||
regulator-max-microvolt = <5000000>;
|
||||
gpio = <&gpio1 29 0>;
|
||||
enable-active-high;
|
||||
vin-supply = <&swbst_reg>;
|
||||
};
|
||||
|
||||
reg_audio: regulator@2 {
|
||||
|
|
|
@ -52,6 +52,7 @@
|
|||
regulator-max-microvolt = <5000000>;
|
||||
gpio = <&gpio4 0 0>;
|
||||
enable-active-high;
|
||||
vin-supply = <&swbst_reg>;
|
||||
};
|
||||
|
||||
reg_usb_otg2_vbus: regulator@1 {
|
||||
|
@ -62,6 +63,7 @@
|
|||
regulator-max-microvolt = <5000000>;
|
||||
gpio = <&gpio4 2 0>;
|
||||
enable-active-high;
|
||||
vin-supply = <&swbst_reg>;
|
||||
};
|
||||
|
||||
reg_aud3v: regulator@2 {
|
||||
|
|
|
@ -87,8 +87,8 @@
|
|||
<14>,
|
||||
<15>;
|
||||
#dma-cells = <1>;
|
||||
#dma-channels = <32>;
|
||||
#dma-requests = <64>;
|
||||
dma-channels = <32>;
|
||||
dma-requests = <64>;
|
||||
};
|
||||
|
||||
i2c1: i2c@48070000 {
|
||||
|
|
|
@ -16,6 +16,13 @@
|
|||
model = "Nokia N900";
|
||||
compatible = "nokia,omap3-n900", "ti,omap3430", "ti,omap3";
|
||||
|
||||
aliases {
|
||||
i2c0;
|
||||
i2c1 = &i2c1;
|
||||
i2c2 = &i2c2;
|
||||
i2c3 = &i2c3;
|
||||
};
|
||||
|
||||
cpus {
|
||||
cpu@0 {
|
||||
cpu0-supply = <&vcc>;
|
||||
|
@ -704,7 +711,7 @@
|
|||
compatible = "smsc,lan91c94";
|
||||
interrupt-parent = <&gpio2>;
|
||||
interrupts = <22 IRQ_TYPE_LEVEL_HIGH>; /* gpio54 */
|
||||
reg = <1 0x300 0xf>; /* 16 byte IO range at offset 0x300 */
|
||||
reg = <1 0 0xf>; /* 16 byte IO range */
|
||||
bank-width = <2>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <ðernet_pins>;
|
||||
|
|
|
@ -155,8 +155,8 @@
|
|||
<14>,
|
||||
<15>;
|
||||
#dma-cells = <1>;
|
||||
#dma-channels = <32>;
|
||||
#dma-requests = <96>;
|
||||
dma-channels = <32>;
|
||||
dma-requests = <96>;
|
||||
};
|
||||
|
||||
omap3_pmx_core: pinmux@48002030 {
|
||||
|
|
|
@ -223,8 +223,8 @@
|
|||
<GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#dma-cells = <1>;
|
||||
#dma-channels = <32>;
|
||||
#dma-requests = <127>;
|
||||
dma-channels = <32>;
|
||||
dma-requests = <127>;
|
||||
};
|
||||
|
||||
gpio1: gpio@4a310000 {
|
||||
|
|
|
@ -13,7 +13,7 @@
|
|||
|
||||
core_thermal: core_thermal {
|
||||
polling-delay-passive = <250>; /* milliseconds */
|
||||
polling-delay = <1000>; /* milliseconds */
|
||||
polling-delay = <500>; /* milliseconds */
|
||||
|
||||
/* sensor ID */
|
||||
thermal-sensors = <&bandgap 2>;
|
||||
|
|
|
@ -13,7 +13,7 @@
|
|||
|
||||
gpu_thermal: gpu_thermal {
|
||||
polling-delay-passive = <250>; /* milliseconds */
|
||||
polling-delay = <1000>; /* milliseconds */
|
||||
polling-delay = <500>; /* milliseconds */
|
||||
|
||||
/* sensor ID */
|
||||
thermal-sensors = <&bandgap 1>;
|
||||
|
|
|
@ -238,8 +238,8 @@
|
|||
<GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#dma-cells = <1>;
|
||||
#dma-channels = <32>;
|
||||
#dma-requests = <127>;
|
||||
dma-channels = <32>;
|
||||
dma-requests = <127>;
|
||||
};
|
||||
|
||||
gpio1: gpio@4ae10000 {
|
||||
|
@ -929,8 +929,8 @@
|
|||
<0x4A096800 0x40>; /* pll_ctrl */
|
||||
reg-names = "phy_rx", "phy_tx", "pll_ctrl";
|
||||
ctrl-module = <&omap_control_sata>;
|
||||
clocks = <&sys_clkin>;
|
||||
clock-names = "sysclk";
|
||||
clocks = <&sys_clkin>, <&sata_ref_clk>;
|
||||
clock-names = "sysclk", "refclk";
|
||||
#phy-cells = <0>;
|
||||
};
|
||||
};
|
||||
|
@ -1079,4 +1079,8 @@
|
|||
};
|
||||
};
|
||||
|
||||
&cpu_thermal {
|
||||
polling-delay = <500>; /* milliseconds */
|
||||
};
|
||||
|
||||
/include/ "omap54xx-clocks.dtsi"
|
||||
|
|
|
@ -167,10 +167,18 @@
|
|||
ti,index-starts-at-one;
|
||||
};
|
||||
|
||||
dpll_core_byp_mux: dpll_core_byp_mux {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,mux-clock";
|
||||
clocks = <&sys_clkin>, <&dpll_abe_m3x2_ck>;
|
||||
ti,bit-shift = <23>;
|
||||
reg = <0x012c>;
|
||||
};
|
||||
|
||||
dpll_core_ck: dpll_core_ck {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,omap4-dpll-core-clock";
|
||||
clocks = <&sys_clkin>, <&dpll_abe_m3x2_ck>;
|
||||
clocks = <&sys_clkin>, <&dpll_core_byp_mux>;
|
||||
reg = <0x0120>, <0x0124>, <0x012c>, <0x0128>;
|
||||
};
|
||||
|
||||
|
@ -294,10 +302,18 @@
|
|||
clock-div = <1>;
|
||||
};
|
||||
|
||||
dpll_iva_byp_mux: dpll_iva_byp_mux {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,mux-clock";
|
||||
clocks = <&sys_clkin>, <&iva_dpll_hs_clk_div>;
|
||||
ti,bit-shift = <23>;
|
||||
reg = <0x01ac>;
|
||||
};
|
||||
|
||||
dpll_iva_ck: dpll_iva_ck {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,omap4-dpll-clock";
|
||||
clocks = <&sys_clkin>, <&iva_dpll_hs_clk_div>;
|
||||
clocks = <&sys_clkin>, <&dpll_iva_byp_mux>;
|
||||
reg = <0x01a0>, <0x01a4>, <0x01ac>, <0x01a8>;
|
||||
};
|
||||
|
||||
|
@ -599,10 +615,19 @@
|
|||
};
|
||||
};
|
||||
&cm_core_clocks {
|
||||
|
||||
dpll_per_byp_mux: dpll_per_byp_mux {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,mux-clock";
|
||||
clocks = <&sys_clkin>, <&per_dpll_hs_clk_div>;
|
||||
ti,bit-shift = <23>;
|
||||
reg = <0x014c>;
|
||||
};
|
||||
|
||||
dpll_per_ck: dpll_per_ck {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,omap4-dpll-clock";
|
||||
clocks = <&sys_clkin>, <&per_dpll_hs_clk_div>;
|
||||
clocks = <&sys_clkin>, <&dpll_per_byp_mux>;
|
||||
reg = <0x0140>, <0x0144>, <0x014c>, <0x0148>;
|
||||
};
|
||||
|
||||
|
@ -714,10 +739,18 @@
|
|||
ti,index-starts-at-one;
|
||||
};
|
||||
|
||||
dpll_usb_byp_mux: dpll_usb_byp_mux {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,mux-clock";
|
||||
clocks = <&sys_clkin>, <&usb_dpll_hs_clk_div>;
|
||||
ti,bit-shift = <23>;
|
||||
reg = <0x018c>;
|
||||
};
|
||||
|
||||
dpll_usb_ck: dpll_usb_ck {
|
||||
#clock-cells = <0>;
|
||||
compatible = "ti,omap4-dpll-j-type-clock";
|
||||
clocks = <&sys_clkin>, <&usb_dpll_hs_clk_div>;
|
||||
clocks = <&sys_clkin>, <&dpll_usb_byp_mux>;
|
||||
reg = <0x0180>, <0x0184>, <0x018c>, <0x0188>;
|
||||
};
|
||||
|
||||
|
|
|
@ -1248,7 +1248,6 @@
|
|||
atmel,watchdog-type = "hardware";
|
||||
atmel,reset-type = "all";
|
||||
atmel,dbg-halt;
|
||||
atmel,idle-halt;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
|
@ -1416,7 +1415,7 @@
|
|||
compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
|
||||
reg = <0x00700000 0x100000>;
|
||||
interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
|
||||
clocks = <&usb>, <&uhphs_clk>, <&uhpck>;
|
||||
clocks = <&utmi>, <&uhphs_clk>, <&uhpck>;
|
||||
clock-names = "usb_clk", "ehci_clk", "uhpck";
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
|
@ -66,6 +66,7 @@
|
|||
gpio4 = &pioE;
|
||||
tcb0 = &tcb0;
|
||||
tcb1 = &tcb1;
|
||||
i2c0 = &i2c0;
|
||||
i2c2 = &i2c2;
|
||||
};
|
||||
cpus {
|
||||
|
@ -259,7 +260,7 @@
|
|||
compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
|
||||
reg = <0x00600000 0x100000>;
|
||||
interrupts = <46 IRQ_TYPE_LEVEL_HIGH 2>;
|
||||
clocks = <&usb>, <&uhphs_clk>, <&uhpck>;
|
||||
clocks = <&utmi>, <&uhphs_clk>, <&uhpck>;
|
||||
clock-names = "usb_clk", "ehci_clk", "uhpck";
|
||||
status = "disabled";
|
||||
};
|
||||
|
@ -461,8 +462,8 @@
|
|||
|
||||
lcdck: lcdck {
|
||||
#clock-cells = <0>;
|
||||
reg = <4>;
|
||||
clocks = <&smd>;
|
||||
reg = <3>;
|
||||
clocks = <&mck>;
|
||||
};
|
||||
|
||||
smdck: smdck {
|
||||
|
@ -770,7 +771,7 @@
|
|||
reg = <50>;
|
||||
};
|
||||
|
||||
lcd_clk: lcd_clk {
|
||||
lcdc_clk: lcdc_clk {
|
||||
#clock-cells = <0>;
|
||||
reg = <51>;
|
||||
};
|
||||
|
|
|
@ -713,6 +713,9 @@
|
|||
reg-shift = <2>;
|
||||
reg-io-width = <4>;
|
||||
clocks = <&l4_sp_clk>;
|
||||
dmas = <&pdma 28>,
|
||||
<&pdma 29>;
|
||||
dma-names = "tx", "rx";
|
||||
};
|
||||
|
||||
uart1: serial1@ffc03000 {
|
||||
|
@ -722,6 +725,9 @@
|
|||
reg-shift = <2>;
|
||||
reg-io-width = <4>;
|
||||
clocks = <&l4_sp_clk>;
|
||||
dmas = <&pdma 30>,
|
||||
<&pdma 31>;
|
||||
dma-names = "tx", "rx";
|
||||
};
|
||||
|
||||
rst: rstmgr@ffd05000 {
|
||||
|
|
|
@ -70,6 +70,7 @@ CONFIG_SCSI=y
|
|||
CONFIG_BLK_DEV_SD=y
|
||||
# CONFIG_SCSI_LOWLEVEL is not set
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_ARM_AT91_ETHER=y
|
||||
CONFIG_MACB=y
|
||||
# CONFIG_NET_VENDOR_BROADCOM is not set
|
||||
CONFIG_DM9000=y
|
||||
|
|
|
@ -62,6 +62,17 @@ CONFIG_MACH_SPEAR1340=y
|
|||
CONFIG_ARCH_STI=y
|
||||
CONFIG_ARCH_EXYNOS=y
|
||||
CONFIG_EXYNOS5420_MCPM=y
|
||||
CONFIG_ARCH_SHMOBILE_MULTI=y
|
||||
CONFIG_ARCH_EMEV2=y
|
||||
CONFIG_ARCH_R7S72100=y
|
||||
CONFIG_ARCH_R8A73A4=y
|
||||
CONFIG_ARCH_R8A7740=y
|
||||
CONFIG_ARCH_R8A7779=y
|
||||
CONFIG_ARCH_R8A7790=y
|
||||
CONFIG_ARCH_R8A7791=y
|
||||
CONFIG_ARCH_R8A7794=y
|
||||
CONFIG_ARCH_SH73A0=y
|
||||
CONFIG_MACH_MARZEN=y
|
||||
CONFIG_ARCH_SUNXI=y
|
||||
CONFIG_ARCH_SIRF=y
|
||||
CONFIG_ARCH_TEGRA=y
|
||||
|
@ -84,9 +95,11 @@ CONFIG_PCI_KEYSTONE=y
|
|||
CONFIG_PCI_MSI=y
|
||||
CONFIG_PCI_MVEBU=y
|
||||
CONFIG_PCI_TEGRA=y
|
||||
CONFIG_PCI_RCAR_GEN2=y
|
||||
CONFIG_PCI_RCAR_GEN2_PCIE=y
|
||||
CONFIG_PCIEPORTBUS=y
|
||||
CONFIG_SMP=y
|
||||
CONFIG_NR_CPUS=8
|
||||
CONFIG_NR_CPUS=16
|
||||
CONFIG_HIGHPTE=y
|
||||
CONFIG_CMA=y
|
||||
CONFIG_ARM_APPENDED_DTB=y
|
||||
|
@ -130,6 +143,7 @@ CONFIG_DEVTMPFS_MOUNT=y
|
|||
CONFIG_DMA_CMA=y
|
||||
CONFIG_CMA_SIZE_MBYTES=64
|
||||
CONFIG_OMAP_OCP2SCP=y
|
||||
CONFIG_SIMPLE_PM_BUS=y
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
|
@ -157,6 +171,7 @@ CONFIG_AHCI_SUNXI=y
|
|||
CONFIG_AHCI_TEGRA=y
|
||||
CONFIG_SATA_HIGHBANK=y
|
||||
CONFIG_SATA_MV=y
|
||||
CONFIG_SATA_RCAR=y
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_HIX5HD2_GMAC=y
|
||||
CONFIG_SUN4I_EMAC=y
|
||||
|
@ -167,14 +182,17 @@ CONFIG_MV643XX_ETH=y
|
|||
CONFIG_MVNETA=y
|
||||
CONFIG_KS8851=y
|
||||
CONFIG_R8169=y
|
||||
CONFIG_SH_ETH=y
|
||||
CONFIG_SMSC911X=y
|
||||
CONFIG_STMMAC_ETH=y
|
||||
CONFIG_TI_CPSW=y
|
||||
CONFIG_XILINX_EMACLITE=y
|
||||
CONFIG_AT803X_PHY=y
|
||||
CONFIG_MARVELL_PHY=y
|
||||
CONFIG_SMSC_PHY=y
|
||||
CONFIG_BROADCOM_PHY=y
|
||||
CONFIG_ICPLUS_PHY=y
|
||||
CONFIG_MICREL_PHY=y
|
||||
CONFIG_USB_PEGASUS=y
|
||||
CONFIG_USB_USBNET=y
|
||||
CONFIG_USB_NET_SMSC75XX=y
|
||||
|
@ -192,15 +210,18 @@ CONFIG_KEYBOARD_CROS_EC=y
|
|||
CONFIG_MOUSE_PS2_ELANTECH=y
|
||||
CONFIG_INPUT_TOUCHSCREEN=y
|
||||
CONFIG_TOUCHSCREEN_ATMEL_MXT=y
|
||||
CONFIG_TOUCHSCREEN_ST1232=m
|
||||
CONFIG_TOUCHSCREEN_STMPE=y
|
||||
CONFIG_TOUCHSCREEN_SUN4I=y
|
||||
CONFIG_INPUT_MISC=y
|
||||
CONFIG_INPUT_MPU3050=y
|
||||
CONFIG_INPUT_AXP20X_PEK=y
|
||||
CONFIG_INPUT_ADXL34X=m
|
||||
CONFIG_SERIO_AMBAKMI=y
|
||||
CONFIG_SERIAL_8250=y
|
||||
CONFIG_SERIAL_8250_CONSOLE=y
|
||||
CONFIG_SERIAL_8250_DW=y
|
||||
CONFIG_SERIAL_8250_EM=y
|
||||
CONFIG_SERIAL_8250_MT6577=y
|
||||
CONFIG_SERIAL_AMBA_PL011=y
|
||||
CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
|
||||
|
@ -213,6 +234,9 @@ CONFIG_SERIAL_SIRFSOC_CONSOLE=y
|
|||
CONFIG_SERIAL_TEGRA=y
|
||||
CONFIG_SERIAL_IMX=y
|
||||
CONFIG_SERIAL_IMX_CONSOLE=y
|
||||
CONFIG_SERIAL_SH_SCI=y
|
||||
CONFIG_SERIAL_SH_SCI_NR_UARTS=20
|
||||
CONFIG_SERIAL_SH_SCI_CONSOLE=y
|
||||
CONFIG_SERIAL_MSM=y
|
||||
CONFIG_SERIAL_MSM_CONSOLE=y
|
||||
CONFIG_SERIAL_VT8500=y
|
||||
|
@ -233,19 +257,26 @@ CONFIG_I2C_MUX_PCA954x=y
|
|||
CONFIG_I2C_MUX_PINCTRL=y
|
||||
CONFIG_I2C_CADENCE=y
|
||||
CONFIG_I2C_DESIGNWARE_PLATFORM=y
|
||||
CONFIG_I2C_GPIO=m
|
||||
CONFIG_I2C_EXYNOS5=y
|
||||
CONFIG_I2C_MV64XXX=y
|
||||
CONFIG_I2C_RIIC=y
|
||||
CONFIG_I2C_S3C2410=y
|
||||
CONFIG_I2C_SH_MOBILE=y
|
||||
CONFIG_I2C_SIRF=y
|
||||
CONFIG_I2C_TEGRA=y
|
||||
CONFIG_I2C_ST=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_I2C_TEGRA=y
|
||||
CONFIG_I2C_XILINX=y
|
||||
CONFIG_SPI_DAVINCI=y
|
||||
CONFIG_I2C_RCAR=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_SPI_CADENCE=y
|
||||
CONFIG_SPI_DAVINCI=y
|
||||
CONFIG_SPI_OMAP24XX=y
|
||||
CONFIG_SPI_ORION=y
|
||||
CONFIG_SPI_PL022=y
|
||||
CONFIG_SPI_RSPI=y
|
||||
CONFIG_SPI_SH_MSIOF=m
|
||||
CONFIG_SPI_SH_HSPI=y
|
||||
CONFIG_SPI_SIRF=y
|
||||
CONFIG_SPI_SUN4I=y
|
||||
CONFIG_SPI_SUN6I=y
|
||||
|
@ -259,12 +290,15 @@ CONFIG_PINCTRL_PALMAS=y
|
|||
CONFIG_PINCTRL_APQ8084=y
|
||||
CONFIG_GPIO_SYSFS=y
|
||||
CONFIG_GPIO_GENERIC_PLATFORM=y
|
||||
CONFIG_GPIO_DWAPB=y
|
||||
CONFIG_GPIO_DAVINCI=y
|
||||
CONFIG_GPIO_DWAPB=y
|
||||
CONFIG_GPIO_EM=y
|
||||
CONFIG_GPIO_RCAR=y
|
||||
CONFIG_GPIO_XILINX=y
|
||||
CONFIG_GPIO_ZYNQ=y
|
||||
CONFIG_GPIO_PCA953X=y
|
||||
CONFIG_GPIO_PCA953X_IRQ=y
|
||||
CONFIG_GPIO_PCF857X=y
|
||||
CONFIG_GPIO_TWL4030=y
|
||||
CONFIG_GPIO_PALMAS=y
|
||||
CONFIG_GPIO_SYSCON=y
|
||||
|
@ -276,10 +310,12 @@ CONFIG_POWER_RESET_AS3722=y
|
|||
CONFIG_POWER_RESET_GPIO=y
|
||||
CONFIG_POWER_RESET_KEYSTONE=y
|
||||
CONFIG_POWER_RESET_SUN6I=y
|
||||
CONFIG_POWER_RESET_RMOBILE=y
|
||||
CONFIG_SENSORS_LM90=y
|
||||
CONFIG_SENSORS_LM95245=y
|
||||
CONFIG_THERMAL=y
|
||||
CONFIG_CPU_THERMAL=y
|
||||
CONFIG_RCAR_THERMAL=y
|
||||
CONFIG_ARMADA_THERMAL=y
|
||||
CONFIG_DAVINCI_WATCHDOG
|
||||
CONFIG_ST_THERMAL_SYSCFG=y
|
||||
|
@ -290,6 +326,7 @@ CONFIG_ARM_SP805_WATCHDOG=y
|
|||
CONFIG_ORION_WATCHDOG=y
|
||||
CONFIG_SUNXI_WATCHDOG=y
|
||||
CONFIG_MESON_WATCHDOG=y
|
||||
CONFIG_MFD_AS3711=y
|
||||
CONFIG_MFD_AS3722=y
|
||||
CONFIG_MFD_BCM590XX=y
|
||||
CONFIG_MFD_AXP20X=y
|
||||
|
@ -304,13 +341,16 @@ CONFIG_MFD_TPS65090=y
|
|||
CONFIG_MFD_TPS6586X=y
|
||||
CONFIG_MFD_TPS65910=y
|
||||
CONFIG_REGULATOR_AB8500=y
|
||||
CONFIG_REGULATOR_AS3711=y
|
||||
CONFIG_REGULATOR_AS3722=y
|
||||
CONFIG_REGULATOR_AXP20X=y
|
||||
CONFIG_REGULATOR_BCM590XX=y
|
||||
CONFIG_REGULATOR_DA9210=y
|
||||
CONFIG_REGULATOR_GPIO=y
|
||||
CONFIG_MFD_SYSCON=y
|
||||
CONFIG_POWER_RESET_SYSCON=y
|
||||
CONFIG_REGULATOR_MAX8907=y
|
||||
CONFIG_REGULATOR_MAX8973=y
|
||||
CONFIG_REGULATOR_MAX77686=y
|
||||
CONFIG_REGULATOR_PALMAS=y
|
||||
CONFIG_REGULATOR_S2MPS11=y
|
||||
|
@ -324,18 +364,32 @@ CONFIG_REGULATOR_TWL4030=y
|
|||
CONFIG_REGULATOR_VEXPRESS=y
|
||||
CONFIG_MEDIA_SUPPORT=y
|
||||
CONFIG_MEDIA_CAMERA_SUPPORT=y
|
||||
CONFIG_MEDIA_CONTROLLER=y
|
||||
CONFIG_VIDEO_V4L2_SUBDEV_API=y
|
||||
CONFIG_MEDIA_USB_SUPPORT=y
|
||||
CONFIG_USB_VIDEO_CLASS=y
|
||||
CONFIG_USB_GSPCA=y
|
||||
CONFIG_V4L_PLATFORM_DRIVERS=y
|
||||
CONFIG_SOC_CAMERA=m
|
||||
CONFIG_SOC_CAMERA_PLATFORM=m
|
||||
CONFIG_VIDEO_RCAR_VIN=m
|
||||
CONFIG_V4L_MEM2MEM_DRIVERS=y
|
||||
CONFIG_VIDEO_RENESAS_VSP1=m
|
||||
# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
|
||||
CONFIG_VIDEO_ADV7180=m
|
||||
CONFIG_DRM=y
|
||||
CONFIG_DRM_RCAR_DU=m
|
||||
CONFIG_DRM_TEGRA=y
|
||||
CONFIG_DRM_PANEL_SIMPLE=y
|
||||
CONFIG_FB_ARMCLCD=y
|
||||
CONFIG_FB_WM8505=y
|
||||
CONFIG_FB_SH_MOBILE_LCDC=y
|
||||
CONFIG_FB_SIMPLE=y
|
||||
CONFIG_FB_SH_MOBILE_MERAM=y
|
||||
CONFIG_BACKLIGHT_LCD_SUPPORT=y
|
||||
CONFIG_BACKLIGHT_CLASS_DEVICE=y
|
||||
CONFIG_BACKLIGHT_PWM=y
|
||||
CONFIG_BACKLIGHT_AS3711=y
|
||||
CONFIG_FRAMEBUFFER_CONSOLE=y
|
||||
CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
|
||||
CONFIG_SOUND=y
|
||||
|
@ -343,6 +397,8 @@ CONFIG_SND=y
|
|||
CONFIG_SND_DYNAMIC_MINORS=y
|
||||
CONFIG_SND_USB_AUDIO=y
|
||||
CONFIG_SND_SOC=y
|
||||
CONFIG_SND_SOC_SH4_FSI=m
|
||||
CONFIG_SND_SOC_RCAR=m
|
||||
CONFIG_SND_SOC_TEGRA=y
|
||||
CONFIG_SND_SOC_TEGRA_RT5640=y
|
||||
CONFIG_SND_SOC_TEGRA_WM8753=y
|
||||
|
@ -350,6 +406,8 @@ CONFIG_SND_SOC_TEGRA_WM8903=y
|
|||
CONFIG_SND_SOC_TEGRA_TRIMSLICE=y
|
||||
CONFIG_SND_SOC_TEGRA_ALC5632=y
|
||||
CONFIG_SND_SOC_TEGRA_MAX98090=y
|
||||
CONFIG_SND_SOC_AK4642=m
|
||||
CONFIG_SND_SOC_WM8978=m
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_MVEBU=y
|
||||
|
@ -362,6 +420,8 @@ CONFIG_USB_ISP1760_HCD=y
|
|||
CONFIG_USB_OHCI_HCD=y
|
||||
CONFIG_USB_OHCI_HCD_STI=y
|
||||
CONFIG_USB_OHCI_HCD_PLATFORM=y
|
||||
CONFIG_USB_R8A66597_HCD=m
|
||||
CONFIG_USB_RENESAS_USBHS=m
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_USB_DWC3=y
|
||||
CONFIG_USB_CHIPIDEA=y
|
||||
|
@ -374,6 +434,10 @@ CONFIG_SAMSUNG_USB3PHY=y
|
|||
CONFIG_USB_GPIO_VBUS=y
|
||||
CONFIG_USB_ISP1301=y
|
||||
CONFIG_USB_MXS_PHY=y
|
||||
CONFIG_USB_RCAR_PHY=m
|
||||
CONFIG_USB_RCAR_GEN2_PHY=m
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_RENESAS_USBHS_UDC=m
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_BLOCK_MINORS=16
|
||||
CONFIG_MMC_ARMMMCI=y
|
||||
|
@ -392,12 +456,14 @@ CONFIG_MMC_SDHCI_ST=y
|
|||
CONFIG_MMC_OMAP=y
|
||||
CONFIG_MMC_OMAP_HS=y
|
||||
CONFIG_MMC_MVSDIO=y
|
||||
CONFIG_MMC_SUNXI=y
|
||||
CONFIG_MMC_SDHI=y
|
||||
CONFIG_MMC_DW=y
|
||||
CONFIG_MMC_DW_IDMAC=y
|
||||
CONFIG_MMC_DW_PLTFM=y
|
||||
CONFIG_MMC_DW_EXYNOS=y
|
||||
CONFIG_MMC_DW_ROCKCHIP=y
|
||||
CONFIG_MMC_SH_MMCIF=y
|
||||
CONFIG_MMC_SUNXI=y
|
||||
CONFIG_NEW_LEDS=y
|
||||
CONFIG_LEDS_CLASS=y
|
||||
CONFIG_LEDS_GPIO=y
|
||||
|
@ -421,10 +487,12 @@ CONFIG_RTC_DRV_AS3722=y
|
|||
CONFIG_RTC_DRV_DS1307=y
|
||||
CONFIG_RTC_DRV_MAX8907=y
|
||||
CONFIG_RTC_DRV_MAX77686=y
|
||||
CONFIG_RTC_DRV_RS5C372=m
|
||||
CONFIG_RTC_DRV_PALMAS=y
|
||||
CONFIG_RTC_DRV_TWL4030=y
|
||||
CONFIG_RTC_DRV_TPS6586X=y
|
||||
CONFIG_RTC_DRV_TPS65910=y
|
||||
CONFIG_RTC_DRV_S35390A=m
|
||||
CONFIG_RTC_DRV_EM3027=y
|
||||
CONFIG_RTC_DRV_PL031=y
|
||||
CONFIG_RTC_DRV_VT8500=y
|
||||
|
@ -436,6 +504,9 @@ CONFIG_DMADEVICES=y
|
|||
CONFIG_DW_DMAC=y
|
||||
CONFIG_MV_XOR=y
|
||||
CONFIG_TEGRA20_APB_DMA=y
|
||||
CONFIG_SH_DMAE=y
|
||||
CONFIG_RCAR_AUDMAC_PP=m
|
||||
CONFIG_RCAR_DMAC=y
|
||||
CONFIG_STE_DMA40=y
|
||||
CONFIG_SIRF_DMA=y
|
||||
CONFIG_TI_EDMA=y
|
||||
|
@ -468,6 +539,7 @@ CONFIG_IIO=y
|
|||
CONFIG_XILINX_XADC=y
|
||||
CONFIG_AK8975=y
|
||||
CONFIG_PWM=y
|
||||
CONFIG_PWM_RENESAS_TPU=y
|
||||
CONFIG_PWM_TEGRA=y
|
||||
CONFIG_PWM_VT8500=y
|
||||
CONFIG_PHY_HIX5HD2_SATA=y
|
||||
|
|
|
@ -114,6 +114,7 @@ CONFIG_MTD_PHYSMAP_OF=y
|
|||
CONFIG_MTD_NAND=y
|
||||
CONFIG_MTD_NAND_ECC_BCH=y
|
||||
CONFIG_MTD_NAND_OMAP2=y
|
||||
CONFIG_MTD_NAND_OMAP_BCH=y
|
||||
CONFIG_MTD_ONENAND=y
|
||||
CONFIG_MTD_ONENAND_VERIFY_WRITE=y
|
||||
CONFIG_MTD_ONENAND_OMAP2=y
|
||||
|
@ -248,6 +249,7 @@ CONFIG_TWL6040_CORE=y
|
|||
CONFIG_REGULATOR_PALMAS=y
|
||||
CONFIG_REGULATOR_PBIAS=y
|
||||
CONFIG_REGULATOR_TI_ABB=y
|
||||
CONFIG_REGULATOR_TPS62360=m
|
||||
CONFIG_REGULATOR_TPS65023=y
|
||||
CONFIG_REGULATOR_TPS6507X=y
|
||||
CONFIG_REGULATOR_TPS65217=y
|
||||
|
@ -374,7 +376,8 @@ CONFIG_PWM_TIEHRPWM=m
|
|||
CONFIG_PWM_TWL=m
|
||||
CONFIG_PWM_TWL_LED=m
|
||||
CONFIG_OMAP_USB2=m
|
||||
CONFIG_TI_PIPE3=m
|
||||
CONFIG_TI_PIPE3=y
|
||||
CONFIG_TWL4030_USB=m
|
||||
CONFIG_EXT2_FS=y
|
||||
CONFIG_EXT3_FS=y
|
||||
# CONFIG_EXT3_FS_XATTR is not set
|
||||
|
|
|
@ -3,8 +3,6 @@
|
|||
CONFIG_SYSVIPC=y
|
||||
CONFIG_IRQ_DOMAIN_DEBUG=y
|
||||
CONFIG_LOG_BUF_SHIFT=14
|
||||
CONFIG_SYSFS_DEPRECATED=y
|
||||
CONFIG_SYSFS_DEPRECATED_V2=y
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
CONFIG_EMBEDDED=y
|
||||
CONFIG_SLAB=y
|
||||
|
|
|
@ -4,6 +4,7 @@ CONFIG_BLK_DEV_INITRD=y
|
|||
CONFIG_PERF_EVENTS=y
|
||||
CONFIG_ARCH_SUNXI=y
|
||||
CONFIG_SMP=y
|
||||
CONFIG_NR_CPUS=8
|
||||
CONFIG_AEABI=y
|
||||
CONFIG_HIGHMEM=y
|
||||
CONFIG_HIGHPTE=y
|
||||
|
|
|
@ -118,8 +118,8 @@ CONFIG_HID_ZEROPLUS=y
|
|||
CONFIG_USB=y
|
||||
CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
|
||||
CONFIG_USB_MON=y
|
||||
CONFIG_USB_ISP1760_HCD=y
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_USB_ISP1760=y
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_ARMMMCI=y
|
||||
CONFIG_NEW_LEDS=y
|
||||
|
|
|
@ -58,14 +58,18 @@
|
|||
# define VFP_ABI_FRAME 0
|
||||
# define BSAES_ASM_EXTENDED_KEY
|
||||
# define XTS_CHAIN_TWEAK
|
||||
# define __ARM_ARCH__ 7
|
||||
# define __ARM_ARCH__ __LINUX_ARM_ARCH__
|
||||
# define __ARM_MAX_ARCH__ 7
|
||||
#endif
|
||||
|
||||
#ifdef __thumb__
|
||||
# define adrl adr
|
||||
#endif
|
||||
|
||||
#if __ARM_ARCH__>=7
|
||||
#if __ARM_MAX_ARCH__>=7
|
||||
.arch armv7-a
|
||||
.fpu neon
|
||||
|
||||
.text
|
||||
.syntax unified @ ARMv7-capable assembler is expected to handle this
|
||||
#ifdef __thumb2__
|
||||
|
@ -74,8 +78,6 @@
|
|||
.code 32
|
||||
#endif
|
||||
|
||||
.fpu neon
|
||||
|
||||
.type _bsaes_decrypt8,%function
|
||||
.align 4
|
||||
_bsaes_decrypt8:
|
||||
|
@ -2095,9 +2097,11 @@ bsaes_xts_decrypt:
|
|||
vld1.8 {q8}, [r0] @ initial tweak
|
||||
adr r2, .Lxts_magic
|
||||
|
||||
#ifndef XTS_CHAIN_TWEAK
|
||||
tst r9, #0xf @ if not multiple of 16
|
||||
it ne @ Thumb2 thing, sanity check in ARM
|
||||
subne r9, #0x10 @ subtract another 16 bytes
|
||||
#endif
|
||||
subs r9, #0x80
|
||||
|
||||
blo .Lxts_dec_short
|
||||
|
|
|
@ -701,14 +701,18 @@ $code.=<<___;
|
|||
# define VFP_ABI_FRAME 0
|
||||
# define BSAES_ASM_EXTENDED_KEY
|
||||
# define XTS_CHAIN_TWEAK
|
||||
# define __ARM_ARCH__ 7
|
||||
# define __ARM_ARCH__ __LINUX_ARM_ARCH__
|
||||
# define __ARM_MAX_ARCH__ 7
|
||||
#endif
|
||||
|
||||
#ifdef __thumb__
|
||||
# define adrl adr
|
||||
#endif
|
||||
|
||||
#if __ARM_ARCH__>=7
|
||||
#if __ARM_MAX_ARCH__>=7
|
||||
.arch armv7-a
|
||||
.fpu neon
|
||||
|
||||
.text
|
||||
.syntax unified @ ARMv7-capable assembler is expected to handle this
|
||||
#ifdef __thumb2__
|
||||
|
@ -717,8 +721,6 @@ $code.=<<___;
|
|||
.code 32
|
||||
#endif
|
||||
|
||||
.fpu neon
|
||||
|
||||
.type _bsaes_decrypt8,%function
|
||||
.align 4
|
||||
_bsaes_decrypt8:
|
||||
|
@ -2076,9 +2078,11 @@ bsaes_xts_decrypt:
|
|||
vld1.8 {@XMM[8]}, [r0] @ initial tweak
|
||||
adr $magic, .Lxts_magic
|
||||
|
||||
#ifndef XTS_CHAIN_TWEAK
|
||||
tst $len, #0xf @ if not multiple of 16
|
||||
it ne @ Thumb2 thing, sanity check in ARM
|
||||
subne $len, #0x10 @ subtract another 16 bytes
|
||||
#endif
|
||||
subs $len, #0x80
|
||||
|
||||
blo .Lxts_dec_short
|
||||
|
|
|
@ -149,31 +149,30 @@ static inline bool kvm_s2pmd_readonly(pmd_t *pmd)
|
|||
(__boundary - 1 < (end) - 1)? __boundary: (end); \
|
||||
})
|
||||
|
||||
#define kvm_pgd_index(addr) pgd_index(addr)
|
||||
|
||||
static inline bool kvm_page_empty(void *ptr)
|
||||
{
|
||||
struct page *ptr_page = virt_to_page(ptr);
|
||||
return page_count(ptr_page) == 1;
|
||||
}
|
||||
|
||||
|
||||
#define kvm_pte_table_empty(kvm, ptep) kvm_page_empty(ptep)
|
||||
#define kvm_pmd_table_empty(kvm, pmdp) kvm_page_empty(pmdp)
|
||||
#define kvm_pud_table_empty(kvm, pudp) (0)
|
||||
|
||||
#define KVM_PREALLOC_LEVEL 0
|
||||
|
||||
static inline int kvm_prealloc_hwpgd(struct kvm *kvm, pgd_t *pgd)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline void kvm_free_hwpgd(struct kvm *kvm) { }
|
||||
|
||||
static inline void *kvm_get_hwpgd(struct kvm *kvm)
|
||||
{
|
||||
return kvm->arch.pgd;
|
||||
}
|
||||
|
||||
static inline unsigned int kvm_get_hwpgd_size(void)
|
||||
{
|
||||
return PTRS_PER_S2_PGD * sizeof(pgd_t);
|
||||
}
|
||||
|
||||
struct kvm;
|
||||
|
||||
#define kvm_flush_dcache_to_poc(a,l) __cpuc_flush_dcache_area((a), (l))
|
||||
|
@ -207,7 +206,7 @@ static inline void __coherent_cache_guest_page(struct kvm_vcpu *vcpu, pfn_t pfn,
|
|||
|
||||
bool need_flush = !vcpu_has_cache_enabled(vcpu) || ipa_uncached;
|
||||
|
||||
VM_BUG_ON(size & PAGE_MASK);
|
||||
VM_BUG_ON(size & ~PAGE_MASK);
|
||||
|
||||
if (!need_flush && !icache_is_pipt())
|
||||
goto vipt_cache;
|
||||
|
|
|
@ -18,8 +18,11 @@
|
|||
#define AT91_DBGU 0xfc00c000 /* SAMA5D4_BASE_USART3 */
|
||||
#endif
|
||||
|
||||
/* Keep in sync with mach-at91/include/mach/hardware.h */
|
||||
#ifdef CONFIG_MMU
|
||||
#define AT91_IO_P2V(x) ((x) - 0x01000000)
|
||||
#else
|
||||
#define AT91_IO_P2V(x) (x)
|
||||
#endif
|
||||
|
||||
#define AT91_DBGU_SR (0x14) /* Status Register */
|
||||
#define AT91_DBGU_THR (0x1c) /* Transmitter Holding Register */
|
||||
|
|
|
@ -246,12 +246,9 @@ static int __get_cpu_architecture(void)
|
|||
if (cpu_arch)
|
||||
cpu_arch += CPU_ARCH_ARMv3;
|
||||
} else if ((read_cpuid_id() & 0x000f0000) == 0x000f0000) {
|
||||
unsigned int mmfr0;
|
||||
|
||||
/* Revised CPUID format. Read the Memory Model Feature
|
||||
* Register 0 and check for VMSAv7 or PMSAv7 */
|
||||
asm("mrc p15, 0, %0, c0, c1, 4"
|
||||
: "=r" (mmfr0));
|
||||
unsigned int mmfr0 = read_cpuid_ext(CPUID_EXT_MMFR0);
|
||||
if ((mmfr0 & 0x0000000f) >= 0x00000003 ||
|
||||
(mmfr0 & 0x000000f0) >= 0x00000030)
|
||||
cpu_arch = CPU_ARCH_ARMv7;
|
||||
|
|
|
@ -540,7 +540,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run)
|
|||
|
||||
vcpu->mode = OUTSIDE_GUEST_MODE;
|
||||
kvm_guest_exit();
|
||||
trace_kvm_exit(*vcpu_pc(vcpu));
|
||||
trace_kvm_exit(kvm_vcpu_trap_get_class(vcpu), *vcpu_pc(vcpu));
|
||||
/*
|
||||
* We may have taken a host interrupt in HYP mode (ie
|
||||
* while executing the guest). This interrupt is still
|
||||
|
|
|
@ -290,7 +290,7 @@ static void unmap_range(struct kvm *kvm, pgd_t *pgdp,
|
|||
phys_addr_t addr = start, end = start + size;
|
||||
phys_addr_t next;
|
||||
|
||||
pgd = pgdp + pgd_index(addr);
|
||||
pgd = pgdp + kvm_pgd_index(addr);
|
||||
do {
|
||||
next = kvm_pgd_addr_end(addr, end);
|
||||
if (!pgd_none(*pgd))
|
||||
|
@ -355,7 +355,7 @@ static void stage2_flush_memslot(struct kvm *kvm,
|
|||
phys_addr_t next;
|
||||
pgd_t *pgd;
|
||||
|
||||
pgd = kvm->arch.pgd + pgd_index(addr);
|
||||
pgd = kvm->arch.pgd + kvm_pgd_index(addr);
|
||||
do {
|
||||
next = kvm_pgd_addr_end(addr, end);
|
||||
stage2_flush_puds(kvm, pgd, addr, next);
|
||||
|
@ -632,6 +632,20 @@ int create_hyp_io_mappings(void *from, void *to, phys_addr_t phys_addr)
|
|||
__phys_to_pfn(phys_addr), PAGE_HYP_DEVICE);
|
||||
}
|
||||
|
||||
/* Free the HW pgd, one page at a time */
|
||||
static void kvm_free_hwpgd(void *hwpgd)
|
||||
{
|
||||
free_pages_exact(hwpgd, kvm_get_hwpgd_size());
|
||||
}
|
||||
|
||||
/* Allocate the HW PGD, making sure that each page gets its own refcount */
|
||||
static void *kvm_alloc_hwpgd(void)
|
||||
{
|
||||
unsigned int size = kvm_get_hwpgd_size();
|
||||
|
||||
return alloc_pages_exact(size, GFP_KERNEL | __GFP_ZERO);
|
||||
}
|
||||
|
||||
/**
|
||||
* kvm_alloc_stage2_pgd - allocate level-1 table for stage-2 translation.
|
||||
* @kvm: The KVM struct pointer for the VM.
|
||||
|
@ -645,15 +659,31 @@ int create_hyp_io_mappings(void *from, void *to, phys_addr_t phys_addr)
|
|||
*/
|
||||
int kvm_alloc_stage2_pgd(struct kvm *kvm)
|
||||
{
|
||||
int ret;
|
||||
pgd_t *pgd;
|
||||
void *hwpgd;
|
||||
|
||||
if (kvm->arch.pgd != NULL) {
|
||||
kvm_err("kvm_arch already initialized?\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
hwpgd = kvm_alloc_hwpgd();
|
||||
if (!hwpgd)
|
||||
return -ENOMEM;
|
||||
|
||||
/* When the kernel uses more levels of page tables than the
|
||||
* guest, we allocate a fake PGD and pre-populate it to point
|
||||
* to the next-level page table, which will be the real
|
||||
* initial page table pointed to by the VTTBR.
|
||||
*
|
||||
* When KVM_PREALLOC_LEVEL==2, we allocate a single page for
|
||||
* the PMD and the kernel will use folded pud.
|
||||
* When KVM_PREALLOC_LEVEL==1, we allocate 2 consecutive PUD
|
||||
* pages.
|
||||
*/
|
||||
if (KVM_PREALLOC_LEVEL > 0) {
|
||||
int i;
|
||||
|
||||
/*
|
||||
* Allocate fake pgd for the page table manipulation macros to
|
||||
* work. This is not used by the hardware and we have no
|
||||
|
@ -661,30 +691,32 @@ int kvm_alloc_stage2_pgd(struct kvm *kvm)
|
|||
*/
|
||||
pgd = (pgd_t *)kmalloc(PTRS_PER_S2_PGD * sizeof(pgd_t),
|
||||
GFP_KERNEL | __GFP_ZERO);
|
||||
|
||||
if (!pgd) {
|
||||
kvm_free_hwpgd(hwpgd);
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
/* Plug the HW PGD into the fake one. */
|
||||
for (i = 0; i < PTRS_PER_S2_PGD; i++) {
|
||||
if (KVM_PREALLOC_LEVEL == 1)
|
||||
pgd_populate(NULL, pgd + i,
|
||||
(pud_t *)hwpgd + i * PTRS_PER_PUD);
|
||||
else if (KVM_PREALLOC_LEVEL == 2)
|
||||
pud_populate(NULL, pud_offset(pgd, 0) + i,
|
||||
(pmd_t *)hwpgd + i * PTRS_PER_PMD);
|
||||
}
|
||||
} else {
|
||||
/*
|
||||
* Allocate actual first-level Stage-2 page table used by the
|
||||
* hardware for Stage-2 page table walks.
|
||||
*/
|
||||
pgd = (pgd_t *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, S2_PGD_ORDER);
|
||||
pgd = (pgd_t *)hwpgd;
|
||||
}
|
||||
|
||||
if (!pgd)
|
||||
return -ENOMEM;
|
||||
|
||||
ret = kvm_prealloc_hwpgd(kvm, pgd);
|
||||
if (ret)
|
||||
goto out_err;
|
||||
|
||||
kvm_clean_pgd(pgd);
|
||||
kvm->arch.pgd = pgd;
|
||||
return 0;
|
||||
out_err:
|
||||
if (KVM_PREALLOC_LEVEL > 0)
|
||||
kfree(pgd);
|
||||
else
|
||||
free_pages((unsigned long)pgd, S2_PGD_ORDER);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -785,11 +817,10 @@ void kvm_free_stage2_pgd(struct kvm *kvm)
|
|||
return;
|
||||
|
||||
unmap_stage2_range(kvm, 0, KVM_PHYS_SIZE);
|
||||
kvm_free_hwpgd(kvm);
|
||||
kvm_free_hwpgd(kvm_get_hwpgd(kvm));
|
||||
if (KVM_PREALLOC_LEVEL > 0)
|
||||
kfree(kvm->arch.pgd);
|
||||
else
|
||||
free_pages((unsigned long)kvm->arch.pgd, S2_PGD_ORDER);
|
||||
|
||||
kvm->arch.pgd = NULL;
|
||||
}
|
||||
|
||||
|
@ -799,7 +830,7 @@ static pud_t *stage2_get_pud(struct kvm *kvm, struct kvm_mmu_memory_cache *cache
|
|||
pgd_t *pgd;
|
||||
pud_t *pud;
|
||||
|
||||
pgd = kvm->arch.pgd + pgd_index(addr);
|
||||
pgd = kvm->arch.pgd + kvm_pgd_index(addr);
|
||||
if (WARN_ON(pgd_none(*pgd))) {
|
||||
if (!cache)
|
||||
return NULL;
|
||||
|
@ -1089,7 +1120,7 @@ static void stage2_wp_range(struct kvm *kvm, phys_addr_t addr, phys_addr_t end)
|
|||
pgd_t *pgd;
|
||||
phys_addr_t next;
|
||||
|
||||
pgd = kvm->arch.pgd + pgd_index(addr);
|
||||
pgd = kvm->arch.pgd + kvm_pgd_index(addr);
|
||||
do {
|
||||
/*
|
||||
* Release kvm_mmu_lock periodically if the memory region is
|
||||
|
|
|
@ -25,18 +25,22 @@ TRACE_EVENT(kvm_entry,
|
|||
);
|
||||
|
||||
TRACE_EVENT(kvm_exit,
|
||||
TP_PROTO(unsigned long vcpu_pc),
|
||||
TP_ARGS(vcpu_pc),
|
||||
TP_PROTO(unsigned int exit_reason, unsigned long vcpu_pc),
|
||||
TP_ARGS(exit_reason, vcpu_pc),
|
||||
|
||||
TP_STRUCT__entry(
|
||||
__field( unsigned int, exit_reason )
|
||||
__field( unsigned long, vcpu_pc )
|
||||
),
|
||||
|
||||
TP_fast_assign(
|
||||
__entry->exit_reason = exit_reason;
|
||||
__entry->vcpu_pc = vcpu_pc;
|
||||
),
|
||||
|
||||
TP_printk("PC: 0x%08lx", __entry->vcpu_pc)
|
||||
TP_printk("HSR_EC: 0x%04x, PC: 0x%08lx",
|
||||
__entry->exit_reason,
|
||||
__entry->vcpu_pc)
|
||||
);
|
||||
|
||||
TRACE_EVENT(kvm_guest_fault,
|
||||
|
|
|
@ -2,5 +2,7 @@ config MACH_ASM9260
|
|||
bool "Alphascale ASM9260"
|
||||
depends on ARCH_MULTI_V5
|
||||
select CPU_ARM926T
|
||||
select ASM9260_TIMER
|
||||
select GENERIC_CLOCKEVENTS
|
||||
help
|
||||
Support for Alphascale ASM9260 based platform.
|
||||
|
|
|
@ -270,37 +270,35 @@ static void __init at91_pm_sram_init(void)
|
|||
phys_addr_t sram_pbase;
|
||||
unsigned long sram_base;
|
||||
struct device_node *node;
|
||||
struct platform_device *pdev;
|
||||
struct platform_device *pdev = NULL;
|
||||
|
||||
node = of_find_compatible_node(NULL, NULL, "mmio-sram");
|
||||
if (!node) {
|
||||
pr_warn("%s: failed to find sram node!\n", __func__);
|
||||
return;
|
||||
for_each_compatible_node(node, NULL, "mmio-sram") {
|
||||
pdev = of_find_device_by_node(node);
|
||||
if (pdev) {
|
||||
of_node_put(node);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
pdev = of_find_device_by_node(node);
|
||||
if (!pdev) {
|
||||
pr_warn("%s: failed to find sram device!\n", __func__);
|
||||
goto put_node;
|
||||
return;
|
||||
}
|
||||
|
||||
sram_pool = dev_get_gen_pool(&pdev->dev);
|
||||
if (!sram_pool) {
|
||||
pr_warn("%s: sram pool unavailable!\n", __func__);
|
||||
goto put_node;
|
||||
return;
|
||||
}
|
||||
|
||||
sram_base = gen_pool_alloc(sram_pool, at91_slow_clock_sz);
|
||||
if (!sram_base) {
|
||||
pr_warn("%s: unable to alloc ocram!\n", __func__);
|
||||
goto put_node;
|
||||
return;
|
||||
}
|
||||
|
||||
sram_pbase = gen_pool_virt_to_phys(sram_pool, sram_base);
|
||||
slow_clock = __arm_ioremap_exec(sram_pbase, at91_slow_clock_sz, false);
|
||||
|
||||
put_node:
|
||||
of_node_put(node);
|
||||
}
|
||||
#endif
|
||||
|
||||
|
|
|
@ -44,7 +44,7 @@ static inline void at91rm9200_standby(void)
|
|||
" mcr p15, 0, %0, c7, c0, 4\n\t"
|
||||
" str %5, [%1, %2]"
|
||||
:
|
||||
: "r" (0), "r" (AT91_BASE_SYS), "r" (AT91RM9200_SDRAMC_LPR),
|
||||
: "r" (0), "r" (at91_ramc_base[0]), "r" (AT91RM9200_SDRAMC_LPR),
|
||||
"r" (1), "r" (AT91RM9200_SDRAMC_SRR),
|
||||
"r" (lpr));
|
||||
}
|
||||
|
|
|
@ -25,11 +25,6 @@
|
|||
*/
|
||||
#undef SLOWDOWN_MASTER_CLOCK
|
||||
|
||||
#define MCKRDY_TIMEOUT 1000
|
||||
#define MOSCRDY_TIMEOUT 1000
|
||||
#define PLLALOCK_TIMEOUT 1000
|
||||
#define PLLBLOCK_TIMEOUT 1000
|
||||
|
||||
pmc .req r0
|
||||
sdramc .req r1
|
||||
ramc1 .req r2
|
||||
|
@ -41,60 +36,42 @@ tmp2 .req r5
|
|||
* Wait until master clock is ready (after switching master clock source)
|
||||
*/
|
||||
.macro wait_mckrdy
|
||||
mov tmp2, #MCKRDY_TIMEOUT
|
||||
1: sub tmp2, tmp2, #1
|
||||
cmp tmp2, #0
|
||||
beq 2f
|
||||
ldr tmp1, [pmc, #AT91_PMC_SR]
|
||||
1: ldr tmp1, [pmc, #AT91_PMC_SR]
|
||||
tst tmp1, #AT91_PMC_MCKRDY
|
||||
beq 1b
|
||||
2:
|
||||
.endm
|
||||
|
||||
/*
|
||||
* Wait until master oscillator has stabilized.
|
||||
*/
|
||||
.macro wait_moscrdy
|
||||
mov tmp2, #MOSCRDY_TIMEOUT
|
||||
1: sub tmp2, tmp2, #1
|
||||
cmp tmp2, #0
|
||||
beq 2f
|
||||
ldr tmp1, [pmc, #AT91_PMC_SR]
|
||||
1: ldr tmp1, [pmc, #AT91_PMC_SR]
|
||||
tst tmp1, #AT91_PMC_MOSCS
|
||||
beq 1b
|
||||
2:
|
||||
.endm
|
||||
|
||||
/*
|
||||
* Wait until PLLA has locked.
|
||||
*/
|
||||
.macro wait_pllalock
|
||||
mov tmp2, #PLLALOCK_TIMEOUT
|
||||
1: sub tmp2, tmp2, #1
|
||||
cmp tmp2, #0
|
||||
beq 2f
|
||||
ldr tmp1, [pmc, #AT91_PMC_SR]
|
||||
1: ldr tmp1, [pmc, #AT91_PMC_SR]
|
||||
tst tmp1, #AT91_PMC_LOCKA
|
||||
beq 1b
|
||||
2:
|
||||
.endm
|
||||
|
||||
/*
|
||||
* Wait until PLLB has locked.
|
||||
*/
|
||||
.macro wait_pllblock
|
||||
mov tmp2, #PLLBLOCK_TIMEOUT
|
||||
1: sub tmp2, tmp2, #1
|
||||
cmp tmp2, #0
|
||||
beq 2f
|
||||
ldr tmp1, [pmc, #AT91_PMC_SR]
|
||||
1: ldr tmp1, [pmc, #AT91_PMC_SR]
|
||||
tst tmp1, #AT91_PMC_LOCKB
|
||||
beq 1b
|
||||
2:
|
||||
.endm
|
||||
|
||||
.text
|
||||
|
||||
.arm
|
||||
|
||||
/* void at91_slow_clock(void __iomem *pmc, void __iomem *sdramc,
|
||||
* void __iomem *ramc1, int memctrl)
|
||||
*/
|
||||
|
@ -134,6 +111,16 @@ ddr_sr_enable:
|
|||
cmp memctrl, #AT91_MEMCTRL_DDRSDR
|
||||
bne sdr_sr_enable
|
||||
|
||||
/* LPDDR1 --> force DDR2 mode during self-refresh */
|
||||
ldr tmp1, [sdramc, #AT91_DDRSDRC_MDR]
|
||||
str tmp1, .saved_sam9_mdr
|
||||
bic tmp1, tmp1, #~AT91_DDRSDRC_MD
|
||||
cmp tmp1, #AT91_DDRSDRC_MD_LOW_POWER_DDR
|
||||
ldreq tmp1, [sdramc, #AT91_DDRSDRC_MDR]
|
||||
biceq tmp1, tmp1, #AT91_DDRSDRC_MD
|
||||
orreq tmp1, tmp1, #AT91_DDRSDRC_MD_DDR2
|
||||
streq tmp1, [sdramc, #AT91_DDRSDRC_MDR]
|
||||
|
||||
/* prepare for DDRAM self-refresh mode */
|
||||
ldr tmp1, [sdramc, #AT91_DDRSDRC_LPR]
|
||||
str tmp1, .saved_sam9_lpr
|
||||
|
@ -142,14 +129,26 @@ ddr_sr_enable:
|
|||
|
||||
/* figure out if we use the second ram controller */
|
||||
cmp ramc1, #0
|
||||
ldrne tmp2, [ramc1, #AT91_DDRSDRC_LPR]
|
||||
strne tmp2, .saved_sam9_lpr1
|
||||
bicne tmp2, #AT91_DDRSDRC_LPCB
|
||||
orrne tmp2, #AT91_DDRSDRC_LPCB_SELF_REFRESH
|
||||
beq ddr_no_2nd_ctrl
|
||||
|
||||
ldr tmp2, [ramc1, #AT91_DDRSDRC_MDR]
|
||||
str tmp2, .saved_sam9_mdr1
|
||||
bic tmp2, tmp2, #~AT91_DDRSDRC_MD
|
||||
cmp tmp2, #AT91_DDRSDRC_MD_LOW_POWER_DDR
|
||||
ldreq tmp2, [ramc1, #AT91_DDRSDRC_MDR]
|
||||
biceq tmp2, tmp2, #AT91_DDRSDRC_MD
|
||||
orreq tmp2, tmp2, #AT91_DDRSDRC_MD_DDR2
|
||||
streq tmp2, [ramc1, #AT91_DDRSDRC_MDR]
|
||||
|
||||
ldr tmp2, [ramc1, #AT91_DDRSDRC_LPR]
|
||||
str tmp2, .saved_sam9_lpr1
|
||||
bic tmp2, #AT91_DDRSDRC_LPCB
|
||||
orr tmp2, #AT91_DDRSDRC_LPCB_SELF_REFRESH
|
||||
|
||||
/* Enable DDRAM self-refresh mode */
|
||||
str tmp2, [ramc1, #AT91_DDRSDRC_LPR]
|
||||
ddr_no_2nd_ctrl:
|
||||
str tmp1, [sdramc, #AT91_DDRSDRC_LPR]
|
||||
strne tmp2, [ramc1, #AT91_DDRSDRC_LPR]
|
||||
|
||||
b sdr_sr_done
|
||||
|
||||
|
@ -208,6 +207,7 @@ sdr_sr_done:
|
|||
/* Turn off the main oscillator */
|
||||
ldr tmp1, [pmc, #AT91_CKGR_MOR]
|
||||
bic tmp1, tmp1, #AT91_PMC_MOSCEN
|
||||
orr tmp1, tmp1, #AT91_PMC_KEY
|
||||
str tmp1, [pmc, #AT91_CKGR_MOR]
|
||||
|
||||
/* Wait for interrupt */
|
||||
|
@ -216,6 +216,7 @@ sdr_sr_done:
|
|||
/* Turn on the main oscillator */
|
||||
ldr tmp1, [pmc, #AT91_CKGR_MOR]
|
||||
orr tmp1, tmp1, #AT91_PMC_MOSCEN
|
||||
orr tmp1, tmp1, #AT91_PMC_KEY
|
||||
str tmp1, [pmc, #AT91_CKGR_MOR]
|
||||
|
||||
wait_moscrdy
|
||||
|
@ -280,12 +281,17 @@ sdr_sr_done:
|
|||
*/
|
||||
cmp memctrl, #AT91_MEMCTRL_DDRSDR
|
||||
bne sdr_en_restore
|
||||
/* Restore MDR in case of LPDDR1 */
|
||||
ldr tmp1, .saved_sam9_mdr
|
||||
str tmp1, [sdramc, #AT91_DDRSDRC_MDR]
|
||||
/* Restore LPR on AT91 with DDRAM */
|
||||
ldr tmp1, .saved_sam9_lpr
|
||||
str tmp1, [sdramc, #AT91_DDRSDRC_LPR]
|
||||
|
||||
/* if we use the second ram controller */
|
||||
cmp ramc1, #0
|
||||
ldrne tmp2, .saved_sam9_mdr1
|
||||
strne tmp2, [ramc1, #AT91_DDRSDRC_MDR]
|
||||
ldrne tmp2, .saved_sam9_lpr1
|
||||
strne tmp2, [ramc1, #AT91_DDRSDRC_LPR]
|
||||
|
||||
|
@ -319,5 +325,11 @@ ram_restored:
|
|||
.saved_sam9_lpr1:
|
||||
.word 0
|
||||
|
||||
.saved_sam9_mdr:
|
||||
.word 0
|
||||
|
||||
.saved_sam9_mdr1:
|
||||
.word 0
|
||||
|
||||
ENTRY(at91_slow_clock_sz)
|
||||
.word .-at91_slow_clock
|
||||
|
|
|
@ -126,8 +126,7 @@ static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
|
|||
*/
|
||||
void exynos_cpu_power_down(int cpu)
|
||||
{
|
||||
if (cpu == 0 && (of_machine_is_compatible("samsung,exynos5420") ||
|
||||
of_machine_is_compatible("samsung,exynos5800"))) {
|
||||
if (cpu == 0 && (soc_is_exynos5420() || soc_is_exynos5800())) {
|
||||
/*
|
||||
* Bypass power down for CPU0 during suspend. Check for
|
||||
* the SYS_PWR_REG value to decide if we are suspending
|
||||
|
|
|
@ -161,6 +161,34 @@ no_clk:
|
|||
of_genpd_add_provider_simple(np, &pd->pd);
|
||||
}
|
||||
|
||||
/* Assign the child power domains to their parents */
|
||||
for_each_compatible_node(np, NULL, "samsung,exynos4210-pd") {
|
||||
struct generic_pm_domain *child_domain, *parent_domain;
|
||||
struct of_phandle_args args;
|
||||
|
||||
args.np = np;
|
||||
args.args_count = 0;
|
||||
child_domain = of_genpd_get_from_provider(&args);
|
||||
if (!child_domain)
|
||||
continue;
|
||||
|
||||
if (of_parse_phandle_with_args(np, "power-domains",
|
||||
"#power-domain-cells", 0, &args) != 0)
|
||||
continue;
|
||||
|
||||
parent_domain = of_genpd_get_from_provider(&args);
|
||||
if (!parent_domain)
|
||||
continue;
|
||||
|
||||
if (pm_genpd_add_subdomain(parent_domain, child_domain))
|
||||
pr_warn("%s failed to add subdomain: %s\n",
|
||||
parent_domain->name, child_domain->name);
|
||||
else
|
||||
pr_info("%s has as child subdomain: %s.\n",
|
||||
parent_domain->name, child_domain->name);
|
||||
of_node_put(np);
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
arch_initcall(exynos4_pm_init_power_domain);
|
||||
|
|
|
@ -87,8 +87,8 @@ static unsigned int exynos_pmu_spare3;
|
|||
static u32 exynos_irqwake_intmask = 0xffffffff;
|
||||
|
||||
static const struct exynos_wkup_irq exynos3250_wkup_irq[] = {
|
||||
{ 73, BIT(1) }, /* RTC alarm */
|
||||
{ 74, BIT(2) }, /* RTC tick */
|
||||
{ 105, BIT(1) }, /* RTC alarm */
|
||||
{ 106, BIT(2) }, /* RTC tick */
|
||||
{ /* sentinel */ },
|
||||
};
|
||||
|
||||
|
|
|
@ -211,8 +211,9 @@ static void __init imx6q_1588_init(void)
|
|||
* set bit IOMUXC_GPR1[21]. Or the PTP clock must be from pad
|
||||
* (external OSC), and we need to clear the bit.
|
||||
*/
|
||||
clksel = ptp_clk == enet_ref ? IMX6Q_GPR1_ENET_CLK_SEL_ANATOP :
|
||||
IMX6Q_GPR1_ENET_CLK_SEL_PAD;
|
||||
clksel = clk_is_match(ptp_clk, enet_ref) ?
|
||||
IMX6Q_GPR1_ENET_CLK_SEL_ANATOP :
|
||||
IMX6Q_GPR1_ENET_CLK_SEL_PAD;
|
||||
gpr = syscon_regmap_lookup_by_compatible("fsl,imx6q-iomuxc-gpr");
|
||||
if (!IS_ERR(gpr))
|
||||
regmap_update_bits(gpr, IOMUXC_GPR1,
|
||||
|
|
|
@ -20,6 +20,7 @@
|
|||
#include <linux/input.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/smc91x.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <asm/mach-types.h>
|
||||
|
@ -46,15 +47,20 @@ static struct resource smc91x_resources[] = {
|
|||
[1] = {
|
||||
.start = MSM_GPIO_TO_INT(49),
|
||||
.end = MSM_GPIO_TO_INT(49),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
|
||||
},
|
||||
};
|
||||
|
||||
static struct smc91x_platdata smc91x_platdata = {
|
||||
.flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
|
||||
};
|
||||
|
||||
static struct platform_device smc91x_device = {
|
||||
.name = "smc91x",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(smc91x_resources),
|
||||
.resource = smc91x_resources,
|
||||
.dev.platform_data = &smc91x_platdata,
|
||||
};
|
||||
|
||||
static struct platform_device *devices[] __initdata = {
|
||||
|
|
|
@ -22,6 +22,7 @@
|
|||
#include <linux/usb/msm_hsusb.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/clkdev.h>
|
||||
#include <linux/smc91x.h>
|
||||
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/arch.h>
|
||||
|
@ -49,15 +50,20 @@ static struct resource smc91x_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.flags = IORESOURCE_IRQ,
|
||||
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
|
||||
},
|
||||
};
|
||||
|
||||
static struct smc91x_platdata smc91x_platdata = {
|
||||
.flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
|
||||
};
|
||||
|
||||
static struct platform_device smc91x_device = {
|
||||
.name = "smc91x",
|
||||
.id = 0,
|
||||
.num_resources = ARRAY_SIZE(smc91x_resources),
|
||||
.resource = smc91x_resources,
|
||||
.dev.platform_data = &smc91x_platdata,
|
||||
};
|
||||
|
||||
static int __init msm_init_smc91x(void)
|
||||
|
|
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