Fix misc .c/.h comment typos
Fix various .c/.h typos in comments (no code changes). Signed-off-by: Matt LaPlante <kernel1@cyberdogtech.com> Signed-off-by: Adrian Bunk <bunk@stusta.de>
This commit is contained in:
Matt LaPlante
Adrian Bunk
Родитель
3cb2fccc5f
Коммит
0779bf2d2e
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@ -1,7 +1,7 @@
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/*!*****************************************************************************
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*!
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*! Implements an interface for i2c compatible eeproms to run under linux.
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*! Supports 2k, 8k(?) and 16k. Uses adaptive timing adjustents by
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*! Implements an interface for i2c compatible eeproms to run under Linux.
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*! Supports 2k, 8k(?) and 16k. Uses adaptive timing adjustments by
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*! Johan.Adolfsson@axis.com
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*!
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*! Probing results:
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@ -51,7 +51,7 @@
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*! Revision 1.8 2001/06/15 13:24:29 jonashg
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*! * Added verification of pointers from userspace in read and write.
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*! * Made busy counter volatile.
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*! * Added define for inital write delay.
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*! * Added define for initial write delay.
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*! * Removed warnings by using loff_t instead of unsigned long.
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*!
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*! Revision 1.7 2001/06/14 15:26:54 jonashg
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@ -47,7 +47,7 @@
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*! Update Port B register and shadow even when running with hardware support
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*! to avoid glitches when reading bits
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*! Never set direction to out in i2c_inbyte
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*! Removed incorrect clock togling at end of i2c_inbyte
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*! Removed incorrect clock toggling at end of i2c_inbyte
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*!
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*! Revision 1.8 2002/08/13 06:31:53 starvik
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*! Made SDA and SCL line configurable
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@ -33,7 +33,7 @@
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*!
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*! Revision 1.2 2002/11/19 14:35:24 starvik
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*! Changes from linux 2.4
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*! Changed struct initializer syntax to the currently prefered notation
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*! Changed struct initializer syntax to the currently preferred notation
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*!
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*! Revision 1.1 2001/12/17 13:59:27 bjornw
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*! Initial revision
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@ -75,7 +75,7 @@
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** If a device prefetches beyond the end of a valid pdir entry, it will cause
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** a hard failure, ie. MCA. Version 3.0 and later of the zx1 LBA should
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** disconnect on 4k boundaries and prevent such issues. If the device is
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** particularly agressive, this option will keep the entire pdir valid such
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** particularly aggressive, this option will keep the entire pdir valid such
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** that prefetching will hit a valid address. This could severely impact
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** error containment, and is therefore off by default. The page that is
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** used for spill-over is poisoned, so that should help debugging somewhat.
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@ -258,10 +258,10 @@ static u64 prefetch_spill_page;
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/*
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** DMA_CHUNK_SIZE is used by the SCSI mid-layer to break up
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** (or rather not merge) DMA's into managable chunks.
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** (or rather not merge) DMAs into manageable chunks.
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** On parisc, this is more of the software/tuning constraint
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** rather than the HW. I/O MMU allocation alogorithms can be
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** faster with smaller size is (to some degree).
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** rather than the HW. I/O MMU allocation algorithms can be
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** faster with smaller sizes (to some degree).
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*/
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#define DMA_CHUNK_SIZE (BITS_PER_LONG*iovp_size)
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@ -383,7 +383,7 @@ void show_excp_regs(char *from, int trapnr, int signr, struct pt_regs *regs)
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/* ======================================================================= */
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/*
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** Depending on <base> scan the MMU, Data or Instrction side
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** Depending on <base> scan the MMU, Data or Instruction side
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** looking for a valid mapping matching Eaddr & asid.
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** Return -1 if not found or the TLB id entry otherwise.
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** Note: it works only for 4k pages!
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@ -305,7 +305,7 @@ static void clear_lockup (struct atm_vcc *vcc, IADEV *dev) {
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** | R | NZ | 5-bit exponent | 9-bit mantissa |
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** +----+----+------------------+-------------------------------+
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**
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** R = reserverd (written as 0)
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** R = reserved (written as 0)
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** NZ = 0 if 0 cells/sec; 1 otherwise
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**
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** if NZ = 1, rate = 1.mmmmmmmmm x 2^(eeeee) cells/sec
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@ -922,7 +922,7 @@ int RIOUnUse(unsigned long iPortP, struct CmdBlk *CmdBlkP)
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**
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** Packet is an actual packet structure to be filled in with the packet
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** information associated with the command. You need to fill in everything,
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** as the command processore doesn't process the command packet in any way.
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** as the command processor doesn't process the command packet in any way.
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**
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** The PreFuncP is called before the packet is enqueued on the host rup.
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** PreFuncP is called as (*PreFuncP)(PreArg, CmdBlkP);. PreFuncP must
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@ -222,7 +222,7 @@ int RIOBoardTest(unsigned long paddr, void __iomem *caddr, unsigned char type, i
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** which value will be written into memory.
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** Call with op set to zero means that the RAM will not be read and checked
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** before it is written.
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** Call with op not zero, and the RAM will be read and compated with val[op-1]
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** Call with op not zero and the RAM will be read and compared with val[op-1]
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** to check that the data from the previous phase was retained.
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*/
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@ -87,8 +87,8 @@ static char *_rioparam_c_sccs_ = "@(#)rioparam.c 1.3";
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** command bit set onto the port. The command bit is in the len field,
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** and gets ORed in with the actual byte count.
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**
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** When you send a packet with the command bit set, then the first
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** data byte ( data[0] ) is interpretted as the command to execute.
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** When you send a packet with the command bit set the first
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** data byte (data[0]) is interpreted as the command to execute.
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** It also governs what data structure overlay should accompany the packet.
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** Commands are defined in cirrus/cirrus.h
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**
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@ -103,7 +103,7 @@ static char *_rioparam_c_sccs_ = "@(#)rioparam.c 1.3";
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**
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** Most commands do not use the remaining bytes in the data array. The
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** exceptions are OPEN MOPEN and CONFIG. (NB. As with the SI CONFIG and
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** OPEN are currently analagous). With these three commands the following
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** OPEN are currently analogous). With these three commands the following
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** 11 data bytes are all used to pass config information such as baud rate etc.
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** The fields are also defined in cirrus.h. Some contain straightforward
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** information such as the transmit XON character. Two contain the transmit and
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@ -1635,7 +1635,7 @@ static int idefloppy_begin_format(ide_drive_t *drive, int __user *arg)
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/*
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** Get ATAPI_FORMAT_UNIT progress indication.
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**
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** Userland gives a pointer to an int. The int is set to a progresss
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** Userland gives a pointer to an int. The int is set to a progress
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** indicator 0-65536, with 65536=100%.
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**
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** If the drive does not support format progress indication, we just check
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@ -464,7 +464,7 @@ int diva_4bri_init_card(diva_os_xdi_adapter_t * a)
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/*
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** Cleanup function will be called for master adapter only
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** this is garanteed by design: cleanup callback is set
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** this is guaranteed by design: cleanup callback is set
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** by master adapter only
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*/
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static int diva_4bri_cleanup_adapter(diva_os_xdi_adapter_t * a)
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@ -16,7 +16,7 @@
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/*
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* include Genero generated HFC-4S/8S header file hfc48scu.h
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* for comlete register description. This will define _HFC48SCU_H_
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* for complete register description. This will define _HFC48SCU_H_
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* to prevent redefinitions
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*/
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@ -500,14 +500,14 @@ static int budget_patch_attach (struct saa7146_dev* dev, struct saa7146_pci_exte
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/* New design (By Emard)
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** this rps1 code will copy internal HS event to GPIO3 pin.
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** GPIO3 is in budget-patch hardware connectd to port B VSYNC
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** GPIO3 is in budget-patch hardware connected to port B VSYNC
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** HS is an internal event of 7146, accessible with RPS
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** and temporarily raised high every n lines
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** (n in defined in the RPS_THRESH1 counter threshold)
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** I think HS is raised high on the beginning of the n-th line
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** and remains high until this n-th line that triggered
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** it is completely received. When the receiption of n-th line
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** it is completely received. When the reception of n-th line
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** ends, HS is lowered.
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** To transmit data over DMA, 7146 needs changing state at
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@ -541,7 +541,7 @@ static int budget_patch_attach (struct saa7146_dev* dev, struct saa7146_pci_exte
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** hardware debug note: a working budget card (including budget patch)
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** with vpeirq() interrupt setup in mode "0x90" (every 64K) will
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** generate 3 interrupts per 25-Hz DMA frame of 2*188*512 bytes
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** and that means 3*25=75 Hz of interrupt freqency, as seen by
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** and that means 3*25=75 Hz of interrupt frequency, as seen by
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** watch cat /proc/interrupts
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**
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** If this frequency is 3x lower (and data received in the DMA
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@ -550,7 +550,7 @@ static int budget_patch_attach (struct saa7146_dev* dev, struct saa7146_pci_exte
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** this means VSYNC line is not connected in the hardware.
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** (check soldering pcb and pins)
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** The same behaviour of missing VSYNC can be duplicated on budget
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** cards, by seting DD1_INIT trigger mode 7 in 3rd nibble.
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** cards, by setting DD1_INIT trigger mode 7 in 3rd nibble.
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*/
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// Setup RPS1 "program" (p35)
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@ -1215,7 +1215,7 @@ static void e100_setup_ucode(struct nic *nic, struct cb *cb, struct sk_buff *skb
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* the literal in the instruction before the code is loaded, the
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* driver can change the algorithm.
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*
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* INTDELAY - This loads the dead-man timer with its inital value.
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* INTDELAY - This loads the dead-man timer with its initial value.
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* When this timer expires the interrupt is asserted, and the
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* timer is reset each time a new packet is received. (see
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* BUNDLEMAX below to set the limit on number of chained packets)
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@ -3868,7 +3868,7 @@ e1000_phy_hw_reset(struct e1000_hw *hw)
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*
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* hw - Struct containing variables accessed by shared code
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*
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* Sets bit 15 of the MII Control regiser
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* Sets bit 15 of the MII Control register
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******************************************************************************/
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int32_t
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e1000_phy_reset(struct e1000_hw *hw)
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@ -160,7 +160,7 @@ struct s_IOCTL {
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/*
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** Interim definition of SK_DRV_TIMER placed in this file until
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** common modules have boon finallized
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** common modules have been finalized
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*/
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#define SK_DRV_TIMER 11
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#define SK_DRV_MODERATION_TIMER 1
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@ -252,7 +252,7 @@ SkDimEnableModerationIfNeeded(SK_AC *pAC) {
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/*******************************************************************************
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** Function : SkDimDisplayModerationSettings
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** Description : Displays the current settings regaring interrupt moderation
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** Description : Displays the current settings regarding interrupt moderation
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** Programmer : Ralph Roesler
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** Last Modified: 22-mar-03
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** Returns : void (!)
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@ -510,7 +510,7 @@ EnableIntMod(SK_AC *pAC) {
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/*******************************************************************************
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** Function : DisableIntMod()
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** Description : Disbles the interrupt moderation independent of what inter-
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** Description : Disables the interrupt moderation independent of what inter-
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** rupts are running or not
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** Programmer : Ralph Roesler
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** Last Modified: 23-mar-03
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@ -6920,8 +6920,8 @@ static int ipw_qos_association(struct ipw_priv *priv,
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}
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/*
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* handling the beaconing responces. if we get different QoS setting
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* of the network from the the associated setting adjust the QoS
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* handling the beaconing responses. if we get different QoS setting
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* off the network from the associated setting, adjust the QoS
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* setting
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*/
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static int ipw_qos_association_resp(struct ipw_priv *priv,
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@ -486,7 +486,7 @@ typedef unsigned long space_t;
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** This bit tells U2 to do R/M/W for partial cachelines. "Streaming"
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** data can avoid this if the mapping covers full cache lines.
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** o STOP_MOST is needed for atomicity across cachelines.
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** Apperently only "some EISA devices" need this.
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** Apparently only "some EISA devices" need this.
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** Using CONFIG_ISA is hack. Only the IOA with EISA under it needs
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** to use this hint iff the EISA devices needs this feature.
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** According to the U2 ERS, STOP_MOST enabled pages hurt performance.
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@ -50,12 +50,12 @@
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**
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** PA Firmware
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** -----------
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** PA-RISC platforms have two fundementally different types of firmware.
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** PA-RISC platforms have two fundamentally different types of firmware.
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** For PCI devices, "Legacy" PDC initializes the "INTERRUPT_LINE" register
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** and BARs similar to a traditional PC BIOS.
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** The newer "PAT" firmware supports PDC calls which return tables.
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** PAT firmware only initializes PCI Console and Boot interface.
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** With these tables, the OS can progam all other PCI devices.
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** PAT firmware only initializes the PCI Console and Boot interface.
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** With these tables, the OS can program all other PCI devices.
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**
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** One such PAT PDC call returns the "Interrupt Routing Table" (IRT).
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** The IRT maps each PCI slot's INTA-D "output" line to an I/O SAPIC
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@ -531,7 +531,7 @@ static u8 hpc_readcmdtoindex (u8 cmd, u8 index)
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*
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* Action: issue a READ command to HPC
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*
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* Input: pslot - can not be NULL for READ_ALLSTAT
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* Input: pslot - cannot be NULL for READ_ALLSTAT
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* pstatus - can be NULL for READ_ALLSTAT
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*
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* Return 0 or error codes
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@ -29,7 +29,7 @@
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#define CLAW_COMPLETE 0xff /* flag to indicate i/o completed */
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/*-----------------------------------------------------*
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* CLAW control comand code *
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* CLAW control command code *
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*------------------------------------------------------*/
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#define SYSTEM_VALIDATE_REQUEST 0x01 /* System Validate request */
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@ -2000,7 +2000,7 @@
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* The host accesses this scratch in a different manner from the
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* central sequencer. The sequencer has to use CSEQ registers CSCRPAGE
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* and CMnSCRPAGE to access the scratch memory. A flat mapping of the
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* scratch memory is avaliable for software convenience and to prevent
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* scratch memory is available for software convenience and to prevent
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* corruption while the sequencer is running. This memory is mapped
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* onto addresses 800h - BFFh, total of 400h bytes.
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*
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@ -64,7 +64,7 @@ struct asd_ocm_dir {
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#define OCM_INIT_DIR_ENTRIES 5
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/***************************************************************************
|
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* OCM dircetory default
|
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* OCM directory default
|
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***************************************************************************/
|
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static struct asd_ocm_dir OCMDirInit =
|
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{
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@ -73,7 +73,7 @@ static struct asd_ocm_dir OCMDirInit =
|
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};
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/***************************************************************************
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* OCM dircetory Entries default
|
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* OCM directory Entries default
|
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***************************************************************************/
|
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static struct asd_ocm_dir_ent OCMDirEntriesInit[OCM_INIT_DIR_ENTRIES] =
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{
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@ -185,7 +185,7 @@ static inline struct list_head *ncr_list_pop(struct list_head *head)
|
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** power of 2 cache line size.
|
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** Enhanced in linux-2.3.44 to provide a memory pool
|
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** per pcidev to support dynamic dma mapping. (I would
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** have preferred a real bus astraction, btw).
|
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** have preferred a real bus abstraction, btw).
|
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**
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**==========================================================
|
||||
*/
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@ -1438,7 +1438,7 @@ struct head {
|
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** The first four bytes (scr_st[4]) are used inside the script by
|
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** "COPY" commands.
|
||||
** Because source and destination must have the same alignment
|
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** in a DWORD, the fields HAVE to be at the choosen offsets.
|
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** in a DWORD, the fields HAVE to be at the chosen offsets.
|
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** xerr_st 0 (0x34) scratcha
|
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** sync_st 1 (0x05) sxfer
|
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** wide_st 3 (0x03) scntl3
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@ -1498,7 +1498,7 @@ struct head {
|
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** the DSA (data structure address) register points
|
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** to this substructure of the ccb.
|
||||
** This substructure contains the header with
|
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** the script-processor-changable data and
|
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** the script-processor-changeable data and
|
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** data blocks for the indirect move commands.
|
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**
|
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**----------------------------------------------------------
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@ -5107,7 +5107,7 @@ void ncr_complete (struct ncb *np, struct ccb *cp)
|
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|
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/*
|
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** This CCB has been skipped by the NCR.
|
||||
** Queue it in the correponding unit queue.
|
||||
** Queue it in the corresponding unit queue.
|
||||
*/
|
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static void ncr_ccb_skipped(struct ncb *np, struct ccb *cp)
|
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{
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@ -5896,8 +5896,8 @@ static void ncr_log_hard_error(struct ncb *np, u16 sist, u_char dstat)
|
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**
|
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** In normal cases, interrupt conditions occur one at a
|
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** time. The ncr is able to stack in some extra registers
|
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** other interrupts that will occurs after the first one.
|
||||
** But severall interrupts may occur at the same time.
|
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** other interrupts that will occur after the first one.
|
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** But, several interrupts may occur at the same time.
|
||||
**
|
||||
** We probably should only try to deal with the normal
|
||||
** case, but it seems that multiple interrupts occur in
|
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|
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@ -6796,7 +6796,7 @@ void ncr_int_sir (struct ncb *np)
|
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** The host status field is set to HS_NEGOTIATE to mark this
|
||||
** situation.
|
||||
**
|
||||
** If the target doesn't answer this message immidiately
|
||||
** If the target doesn't answer this message immediately
|
||||
** (as required by the standard), the SIR_NEGO_FAIL interrupt
|
||||
** will be raised eventually.
|
||||
** The handler removes the HS_NEGOTIATE status, and sets the
|
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@ -218,7 +218,7 @@
|
|||
** Same as option 1, but also deal with
|
||||
** misconfigured interrupts.
|
||||
**
|
||||
** - Edge triggerred instead of level sensitive.
|
||||
** - Edge triggered instead of level sensitive.
|
||||
** - No interrupt line connected.
|
||||
** - IRQ number misconfigured.
|
||||
**
|
||||
|
|
@ -549,7 +549,7 @@ struct ncr_driver_setup {
|
|||
|
||||
/*
|
||||
** Initial setup.
|
||||
** Can be overriden at startup by a command line.
|
||||
** Can be overridden at startup by a command line.
|
||||
*/
|
||||
#define SCSI_NCR_DRIVER_SETUP \
|
||||
{ \
|
||||
|
|
@ -1093,7 +1093,7 @@ struct scr_tblsel {
|
|||
**-----------------------------------------------------------
|
||||
** On 810A, 860, 825A, 875, 895 and 896 chips the content
|
||||
** of SFBR register can be used as data (SCR_SFBR_DATA).
|
||||
** The 896 has additionnal IO registers starting at
|
||||
** The 896 has additional IO registers starting at
|
||||
** offset 0x80. Bit 7 of register offset is stored in
|
||||
** bit 7 of the SCRIPTS instruction first DWORD.
|
||||
**-----------------------------------------------------------
|
||||
|
|
|
|||
|
|
@ -211,7 +211,7 @@ int usb_ftdi_elan_read_pcimem(struct platform_device *pdev, u8 addressofs,
|
|||
int usb_ftdi_elan_write_pcimem(struct platform_device *pdev, u8 addressofs,
|
||||
u8 width, u32 data);
|
||||
/*
|
||||
* these can not be inlines because we need the structure offset!!
|
||||
* these cannot be inlines because we need the structure offset!!
|
||||
* Does anyone have a better way?????
|
||||
*/
|
||||
#define u132_read_pcimem(u132, member, data) \
|
||||
|
|
@ -3045,7 +3045,7 @@ static struct hc_driver u132_hc_driver = {
|
|||
* This function may be called by the USB core whilst the "usb_all_devices_rwsem"
|
||||
* is held for writing, thus this module must not call usb_remove_hcd()
|
||||
* synchronously - but instead should immediately stop activity to the
|
||||
* device and ansynchronously call usb_remove_hcd()
|
||||
* device and asynchronously call usb_remove_hcd()
|
||||
*/
|
||||
static int __devexit u132_remove(struct platform_device *pdev)
|
||||
{
|
||||
|
|
@ -3241,7 +3241,7 @@ static int u132_resume(struct platform_device *pdev)
|
|||
#define u132_resume NULL
|
||||
#endif
|
||||
/*
|
||||
* this driver is loaded explicitely by ftdi_u132
|
||||
* this driver is loaded explicitly by ftdi_u132
|
||||
*
|
||||
* the platform_driver struct is static because it is per type of module
|
||||
*/
|
||||
|
|
|
|||
|
|
@ -52,7 +52,7 @@
|
|||
* the kernel to load the "u132-hcd" module.
|
||||
*
|
||||
* The "ftdi-u132" module provides the interface to the inserted
|
||||
* PC card and the "u132-hcd" module uses the API to send and recieve
|
||||
* PC card and the "u132-hcd" module uses the API to send and receive
|
||||
* data. The API features call-backs, so that part of the "u132-hcd"
|
||||
* module code will run in the context of one of the kernel threads
|
||||
* of the "ftdi-u132" module.
|
||||
|
|
|
|||
|
|
@ -157,7 +157,7 @@
|
|||
* to TASK_RUNNING will be lost and write_chan's subsequent call to
|
||||
* schedule() will never return (unless it catches a signal).
|
||||
* This race condition occurs because write_bulk_callback() (and thus
|
||||
* the wakeup) are called asynchonously from an interrupt, rather than
|
||||
* the wakeup) are called asynchronously from an interrupt, rather than
|
||||
* from the scheduler. We can avoid the race by calling the wakeup
|
||||
* from the scheduler queue and that's our fix: Now, at the end of
|
||||
* write_bulk_callback() we queue up a wakeup call on the scheduler
|
||||
|
|
|
|||
|
|
@ -1464,7 +1464,7 @@ static int flush_journal_list(struct super_block *s,
|
|||
}
|
||||
|
||||
/* if someone has this block in a newer transaction, just make
|
||||
** sure they are commited, and don't try writing it to disk
|
||||
** sure they are committed, and don't try writing it to disk
|
||||
*/
|
||||
if (pjl) {
|
||||
if (atomic_read(&pjl->j_commit_left))
|
||||
|
|
@ -3384,7 +3384,7 @@ static int remove_from_transaction(struct super_block *p_s_sb,
|
|||
|
||||
/*
|
||||
** for any cnode in a journal list, it can only be dirtied of all the
|
||||
** transactions that include it are commited to disk.
|
||||
** transactions that include it are committed to disk.
|
||||
** this checks through each transaction, and returns 1 if you are allowed to dirty,
|
||||
** and 0 if you aren't
|
||||
**
|
||||
|
|
@ -3426,7 +3426,7 @@ static int can_dirty(struct reiserfs_journal_cnode *cn)
|
|||
}
|
||||
|
||||
/* syncs the commit blocks, but does not force the real buffers to disk
|
||||
** will wait until the current transaction is done/commited before returning
|
||||
** will wait until the current transaction is done/committed before returning
|
||||
*/
|
||||
int journal_end_sync(struct reiserfs_transaction_handle *th,
|
||||
struct super_block *p_s_sb, unsigned long nblocks)
|
||||
|
|
|
|||
|
|
@ -37,7 +37,7 @@
|
|||
#define MCFMBUS_MFDR_MBC(a) ((a)&0x3F) /*M-Bus Clock*/
|
||||
|
||||
/*
|
||||
* Define bit flags in Controll Register
|
||||
* Define bit flags in Control Register
|
||||
*/
|
||||
|
||||
#define MCFMBUS_MBCR_MEN (0x80) /* M-Bus Enable */
|
||||
|
|
|
|||
|
|
@ -17,10 +17,10 @@
|
|||
|
||||
/*
|
||||
** DMA_CHUNK_SIZE is used by the SCSI mid-layer to break up
|
||||
** (or rather not merge) DMA's into managable chunks.
|
||||
** (or rather not merge) DMAs into manageable chunks.
|
||||
** On parisc, this is more of the software/tuning constraint
|
||||
** rather than the HW. I/O MMU allocation alogorithms can be
|
||||
** faster with smaller size is (to some degree).
|
||||
** rather than the HW. I/O MMU allocation algorithms can be
|
||||
** faster with smaller sizes (to some degree).
|
||||
*/
|
||||
#define DMA_CHUNK_SIZE (BITS_PER_LONG*PAGE_SIZE)
|
||||
|
||||
|
|
|
|||
|
|
@ -149,7 +149,7 @@ extern int parisc_bus_is_phys; /* in arch/parisc/kernel/setup.c */
|
|||
/*
|
||||
** Most PCI devices (eg Tulip, NCR720) also export the same registers
|
||||
** to both MMIO and I/O port space. Due to poor performance of I/O Port
|
||||
** access under HP PCI bus adapters, strongly reccomend use of MMIO
|
||||
** access under HP PCI bus adapters, strongly recommend the use of MMIO
|
||||
** address space.
|
||||
**
|
||||
** While I'm at it more PA programming notes:
|
||||
|
|
|
|||
|
|
@ -14,7 +14,7 @@
|
|||
#endif
|
||||
|
||||
/*
|
||||
** The number of pdir entries to "free" before issueing
|
||||
** The number of pdir entries to "free" before issuing
|
||||
** a read to PCOM register to flush out PCOM writes.
|
||||
** Interacts with allocation granularity (ie 4 or 8 entries
|
||||
** allocated and free'd/purged at a time might make this
|
||||
|
|
|
|||
|
|
@ -315,7 +315,7 @@ typedef struct {
|
|||
* structures. If the freq0 variable is non-zero, the tone table contents
|
||||
* for the tone_index are updated to the frequencies and gains defined. It
|
||||
* should be noted that DTMF tones cannot be reassigned, so if DTMF tone
|
||||
* table indexs are used in a cadence the frequency and gain variables will
|
||||
* table indexes are used in a cadence the frequency and gain variables will
|
||||
* be ignored.
|
||||
*
|
||||
* If the array elements contain frequency parameters the driver will
|
||||
|
|
|
|||
|
|
@ -429,7 +429,7 @@ enum reiserfs_mount_options {
|
|||
/* -o hash={tea, rupasov, r5, detect} is meant for properly mounting
|
||||
** reiserfs disks from 3.5.19 or earlier. 99% of the time, this option
|
||||
** is not required. If the normal autodection code can't determine which
|
||||
** hash to use (because both hases had the same value for a file)
|
||||
** hash to use (because both hashes had the same value for a file)
|
||||
** use this option to force a specific hash. It won't allow you to override
|
||||
** the existing hash on the FS, so if you have a tea hash disk, and mount
|
||||
** with -o hash=rupasov, the mount will fail.
|
||||
|
|
|
|||
|
|
@ -13,7 +13,7 @@
|
|||
* Due Credit:
|
||||
* Wanpipe socket layer is based on Packet and
|
||||
* the X25 socket layers. The above sockets were
|
||||
* used for the specific use of Sangoma Technoloiges
|
||||
* used for the specific use of Sangoma Technologies
|
||||
* API programs.
|
||||
* Packet socket Authors: Ross Biro, Fred N. van Kempen and
|
||||
* Alan Cox.
|
||||
|
|
@ -23,7 +23,7 @@
|
|||
* Apr 25, 2000 Nenad Corbic o Added the ability to send zero length packets.
|
||||
* Mar 13, 2000 Nenad Corbic o Added a tx buffer check via ioctl call.
|
||||
* Mar 06, 2000 Nenad Corbic o Fixed the corrupt sock lcn problem.
|
||||
* Server and client applicaton can run
|
||||
* Server and client application can run
|
||||
* simultaneously without conflicts.
|
||||
* Feb 29, 2000 Nenad Corbic o Added support for PVC protocols, such as
|
||||
* CHDLC, Frame Relay and HDLC API.
|
||||
|
|
|
|||
|
|
@ -3,7 +3,7 @@
|
|||
*
|
||||
* This module is completely hardware-independent and provides
|
||||
* the following common services for the WAN Link Drivers:
|
||||
* o WAN device managenment (registering, unregistering)
|
||||
* o WAN device management (registering, unregistering)
|
||||
* o Network interface management
|
||||
* o Physical connection management (dial-up, incoming calls)
|
||||
* o Logical connection management (switched virtual circuits)
|
||||
|
|
|
|||
|
|
@ -779,7 +779,7 @@ static unsigned int cs_set_adc_rate(struct cs_state *state, unsigned int rate)
|
|||
rate = 48000 / 9;
|
||||
|
||||
/*
|
||||
* We can not capture at at rate greater than the Input Rate (48000).
|
||||
* We cannot capture at at rate greater than the Input Rate (48000).
|
||||
* Return an error if an attempt is made to stray outside that limit.
|
||||
*/
|
||||
if (rate > 48000)
|
||||
|
|
@ -4754,8 +4754,8 @@ static int cs_hardware_init(struct cs_card *card)
|
|||
mdelay(5 * cs_laptop_wait); /* Shouldnt be needed ?? */
|
||||
|
||||
/*
|
||||
* If we are resuming under 2.2.x then we can not schedule a timeout.
|
||||
* so, just spin the CPU.
|
||||
* If we are resuming under 2.2.x then we cannot schedule a timeout,
|
||||
* so just spin the CPU.
|
||||
*/
|
||||
if (card->pm.flags & CS46XX_PM_IDLE) {
|
||||
/*
|
||||
|
|
|
|||
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