Merge remote-tracking branches 'regulator/topic/s2mps11', 'regulator/topic/s5m8767', 'regulator/topic/stw481x-vmmc', 'regulator/topic/tps51632', 'regulator/topic/tps62360', 'regulator/topic/tps65910', 'regulator/topic/twl' and 'regulator/topic/wm831x' into regulator-linus
This commit is contained in:
Родитель
a2a2be6309
699b36973d
ee5182b59f
991a645d6b
9d9339d3a6
541f597f10
b8903eb983
3db3988593
477b2bacb1
Коммит
07b1980848
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@ -21,7 +21,7 @@ Required properties:
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The valid regulator-compatible values are:
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tps65910: vrtc, vio, vdd1, vdd2, vdd3, vdig1, vdig2, vpll, vdac, vaux1,
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vaux2, vaux33, vmmc
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vaux2, vaux33, vmmc, vbb
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tps65911: vrtc, vio, vdd1, vdd3, vddctrl, ldo1, ldo2, ldo3, ldo4, ldo5,
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ldo6, ldo7, ldo8
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@ -38,7 +38,7 @@ Required properties:
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vcc4-supply: VAUX1 and VAUX2 input.
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vcc5-supply: VPLL and VDAC input.
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vcc6-supply: VDIG1 and VDIG2 input.
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vcc7-supply: VRTC input.
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vcc7-supply: VRTC and VBB input.
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vccio-supply: VIO input.
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tps65911:
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vcc1-supply: VDD1 input.
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@ -79,36 +79,6 @@ static struct of_device_id sec_dt_match[] = {
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};
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#endif
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int sec_reg_read(struct sec_pmic_dev *sec_pmic, u8 reg, void *dest)
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{
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return regmap_read(sec_pmic->regmap_pmic, reg, dest);
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}
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EXPORT_SYMBOL_GPL(sec_reg_read);
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int sec_bulk_read(struct sec_pmic_dev *sec_pmic, u8 reg, int count, u8 *buf)
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{
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return regmap_bulk_read(sec_pmic->regmap_pmic, reg, buf, count);
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}
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EXPORT_SYMBOL_GPL(sec_bulk_read);
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int sec_reg_write(struct sec_pmic_dev *sec_pmic, u8 reg, u8 value)
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{
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return regmap_write(sec_pmic->regmap_pmic, reg, value);
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}
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EXPORT_SYMBOL_GPL(sec_reg_write);
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int sec_bulk_write(struct sec_pmic_dev *sec_pmic, u8 reg, int count, u8 *buf)
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{
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return regmap_raw_write(sec_pmic->regmap_pmic, reg, buf, count);
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}
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EXPORT_SYMBOL_GPL(sec_bulk_write);
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int sec_reg_update(struct sec_pmic_dev *sec_pmic, u8 reg, u8 val, u8 mask)
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{
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return regmap_update_bits(sec_pmic->regmap_pmic, reg, mask, val);
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}
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EXPORT_SYMBOL_GPL(sec_reg_update);
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static bool s2mps11_volatile(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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@ -70,8 +70,6 @@ static int s2mps11_regulator_set_voltage_time_sel(struct regulator_dev *rdev,
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ramp_delay = s2mps11->ramp_delay2;
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break;
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case S2MPS11_BUCK3:
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ramp_delay = s2mps11->ramp_delay34;
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break;
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case S2MPS11_BUCK4:
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ramp_delay = s2mps11->ramp_delay34;
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break;
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@ -23,6 +23,7 @@
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#include <linux/mfd/samsung/core.h>
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#include <linux/mfd/samsung/s5m8767.h>
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#include <linux/regulator/of_regulator.h>
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#include <linux/regmap.h>
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#define S5M8767_OPMODE_NORMAL_MODE 0x1
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@ -120,8 +121,8 @@ static const struct sec_voltage_desc *reg_voltage_map[] = {
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[S5M8767_BUCK4] = &buck_voltage_val2,
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[S5M8767_BUCK5] = &buck_voltage_val1,
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[S5M8767_BUCK6] = &buck_voltage_val1,
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[S5M8767_BUCK7] = NULL,
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[S5M8767_BUCK8] = NULL,
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[S5M8767_BUCK7] = &buck_voltage_val3,
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[S5M8767_BUCK8] = &buck_voltage_val3,
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[S5M8767_BUCK9] = &buck_voltage_val3,
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};
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@ -217,7 +218,7 @@ static int s5m8767_reg_is_enabled(struct regulator_dev *rdev)
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{
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struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
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int ret, reg;
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int mask = 0xc0, enable_ctrl;
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int enable_ctrl;
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unsigned int val;
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ret = s5m8767_get_register(rdev, ®, &enable_ctrl);
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@ -226,37 +227,38 @@ static int s5m8767_reg_is_enabled(struct regulator_dev *rdev)
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else if (ret)
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return ret;
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ret = sec_reg_read(s5m8767->iodev, reg, &val);
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ret = regmap_read(s5m8767->iodev->regmap_pmic, reg, &val);
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if (ret)
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return ret;
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return (val & mask) == enable_ctrl;
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return (val & S5M8767_ENCTRL_MASK) == enable_ctrl;
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}
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static int s5m8767_reg_enable(struct regulator_dev *rdev)
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{
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struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
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int ret, reg;
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int mask = 0xc0, enable_ctrl;
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int enable_ctrl;
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ret = s5m8767_get_register(rdev, ®, &enable_ctrl);
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if (ret)
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return ret;
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return sec_reg_update(s5m8767->iodev, reg, enable_ctrl, mask);
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return regmap_update_bits(s5m8767->iodev->regmap_pmic, reg,
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S5M8767_ENCTRL_MASK, enable_ctrl);
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}
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static int s5m8767_reg_disable(struct regulator_dev *rdev)
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{
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struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
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int ret, reg;
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int mask = 0xc0, enable_ctrl;
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int ret, reg, enable_ctrl;
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ret = s5m8767_get_register(rdev, ®, &enable_ctrl);
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if (ret)
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return ret;
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return sec_reg_update(s5m8767->iodev, reg, ~mask, mask);
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return regmap_update_bits(s5m8767->iodev->regmap_pmic, reg,
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S5M8767_ENCTRL_MASK, ~S5M8767_ENCTRL_MASK);
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}
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static int s5m8767_get_vsel_reg(int reg_id, struct s5m8767_info *s5m8767)
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@ -417,9 +419,12 @@ static struct regulator_ops s5m8767_ops = {
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};
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static struct regulator_ops s5m8767_buck78_ops = {
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.list_voltage = regulator_list_voltage_linear,
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.is_enabled = s5m8767_reg_is_enabled,
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.enable = s5m8767_reg_enable,
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.disable = s5m8767_reg_disable,
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.get_voltage_sel = regulator_get_voltage_sel_regmap,
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.set_voltage_sel = regulator_set_voltage_sel_regmap,
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};
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#define s5m8767_regulator_desc(_name) { \
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@ -745,17 +750,20 @@ static int s5m8767_pmic_probe(struct platform_device *pdev)
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buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
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pdata->buck2_init);
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sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK2DVS2, buck_init);
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regmap_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK2DVS2,
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buck_init);
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buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
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pdata->buck3_init);
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sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK3DVS2, buck_init);
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regmap_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK3DVS2,
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buck_init);
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buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
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pdata->buck4_init);
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sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK4DVS2, buck_init);
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regmap_write(s5m8767->iodev->regmap_pmic, S5M8767_REG_BUCK4DVS2,
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buck_init);
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for (i = 0; i < 8; i++) {
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if (s5m8767->buck2_gpiodvs) {
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@ -837,71 +845,76 @@ static int s5m8767_pmic_probe(struct platform_device *pdev)
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if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs ||
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pdata->buck4_gpiodvs) {
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sec_reg_update(s5m8767->iodev, S5M8767_REG_BUCK2CTRL,
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(pdata->buck2_gpiodvs) ? (1 << 1) : (0 << 1),
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1 << 1);
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sec_reg_update(s5m8767->iodev, S5M8767_REG_BUCK3CTRL,
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(pdata->buck3_gpiodvs) ? (1 << 1) : (0 << 1),
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1 << 1);
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sec_reg_update(s5m8767->iodev, S5M8767_REG_BUCK4CTRL,
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(pdata->buck4_gpiodvs) ? (1 << 1) : (0 << 1),
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1 << 1);
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regmap_update_bits(s5m8767->iodev->regmap_pmic,
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S5M8767_REG_BUCK2CTRL, 1 << 1,
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(pdata->buck2_gpiodvs) ? (1 << 1) : (0 << 1));
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regmap_update_bits(s5m8767->iodev->regmap_pmic,
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S5M8767_REG_BUCK3CTRL, 1 << 1,
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(pdata->buck3_gpiodvs) ? (1 << 1) : (0 << 1));
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regmap_update_bits(s5m8767->iodev->regmap_pmic,
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S5M8767_REG_BUCK4CTRL, 1 << 1,
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(pdata->buck4_gpiodvs) ? (1 << 1) : (0 << 1));
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}
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/* Initialize GPIO DVS registers */
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for (i = 0; i < 8; i++) {
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if (s5m8767->buck2_gpiodvs) {
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sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK2DVS1 + i,
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s5m8767->buck2_vol[i]);
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regmap_write(s5m8767->iodev->regmap_pmic,
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S5M8767_REG_BUCK2DVS1 + i,
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s5m8767->buck2_vol[i]);
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}
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if (s5m8767->buck3_gpiodvs) {
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sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK3DVS1 + i,
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s5m8767->buck3_vol[i]);
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regmap_write(s5m8767->iodev->regmap_pmic,
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S5M8767_REG_BUCK3DVS1 + i,
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s5m8767->buck3_vol[i]);
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}
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if (s5m8767->buck4_gpiodvs) {
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sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK4DVS1 + i,
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s5m8767->buck4_vol[i]);
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regmap_write(s5m8767->iodev->regmap_pmic,
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S5M8767_REG_BUCK4DVS1 + i,
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s5m8767->buck4_vol[i]);
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}
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}
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if (s5m8767->buck2_ramp)
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sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 0x08, 0x08);
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regmap_update_bits(s5m8767->iodev->regmap_pmic,
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S5M8767_REG_DVSRAMP, 0x08, 0x08);
|
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|
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if (s5m8767->buck3_ramp)
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sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 0x04, 0x04);
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regmap_update_bits(s5m8767->iodev->regmap_pmic,
|
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S5M8767_REG_DVSRAMP, 0x04, 0x04);
|
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|
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if (s5m8767->buck4_ramp)
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sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 0x02, 0x02);
|
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regmap_update_bits(s5m8767->iodev->regmap_pmic,
|
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S5M8767_REG_DVSRAMP, 0x02, 0x02);
|
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|
||||
if (s5m8767->buck2_ramp || s5m8767->buck3_ramp
|
||||
|| s5m8767->buck4_ramp) {
|
||||
unsigned int val;
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switch (s5m8767->ramp_delay) {
|
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case 5:
|
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sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
|
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0x40, 0xf0);
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val = S5M8767_DVS_BUCK_RAMP_5;
|
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break;
|
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case 10:
|
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sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
|
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0x90, 0xf0);
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val = S5M8767_DVS_BUCK_RAMP_10;
|
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break;
|
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case 25:
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sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
|
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0xd0, 0xf0);
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val = S5M8767_DVS_BUCK_RAMP_25;
|
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break;
|
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case 50:
|
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sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
|
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0xe0, 0xf0);
|
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val = S5M8767_DVS_BUCK_RAMP_50;
|
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break;
|
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case 100:
|
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sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
|
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0xf0, 0xf0);
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val = S5M8767_DVS_BUCK_RAMP_100;
|
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break;
|
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default:
|
||||
sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
|
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0x90, 0xf0);
|
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val = S5M8767_DVS_BUCK_RAMP_10;
|
||||
}
|
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regmap_update_bits(s5m8767->iodev->regmap_pmic,
|
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S5M8767_REG_DVSRAMP,
|
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S5M8767_DVS_BUCK_RAMP_MASK,
|
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val << S5M8767_DVS_BUCK_RAMP_SHIFT);
|
||||
}
|
||||
|
||||
for (i = 0; i < pdata->num_regulators; i++) {
|
||||
|
|
|
@ -74,7 +74,8 @@ static int stw481x_vmmc_regulator_probe(struct platform_device *pdev)
|
|||
config.init_data = of_get_regulator_init_data(&pdev->dev,
|
||||
pdev->dev.of_node);
|
||||
|
||||
stw481x->vmmc_regulator = regulator_register(&vmmc_regulator, &config);
|
||||
stw481x->vmmc_regulator = devm_regulator_register(&pdev->dev,
|
||||
&vmmc_regulator, &config);
|
||||
if (IS_ERR(stw481x->vmmc_regulator)) {
|
||||
dev_err(&pdev->dev,
|
||||
"error initializing STw481x VMMC regulator\n");
|
||||
|
@ -85,14 +86,6 @@ static int stw481x_vmmc_regulator_probe(struct platform_device *pdev)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int stw481x_vmmc_regulator_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct stw481x *stw481x = dev_get_platdata(&pdev->dev);
|
||||
|
||||
regulator_unregister(stw481x->vmmc_regulator);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct of_device_id stw481x_vmmc_match[] = {
|
||||
{ .compatible = "st,stw481x-vmmc", },
|
||||
{},
|
||||
|
@ -105,7 +98,6 @@ static struct platform_driver stw481x_vmmc_regulator_driver = {
|
|||
.of_match_table = stw481x_vmmc_match,
|
||||
},
|
||||
.probe = stw481x_vmmc_regulator_probe,
|
||||
.remove = stw481x_vmmc_regulator_remove,
|
||||
};
|
||||
|
||||
module_platform_driver(stw481x_vmmc_regulator_driver);
|
||||
|
|
|
@ -70,16 +70,16 @@
|
|||
#define TPS51632_POWER_STATE_SINGLE_PHASE_CCM 0x1
|
||||
#define TPS51632_POWER_STATE_SINGLE_PHASE_DCM 0x2
|
||||
|
||||
#define TPS51632_MIN_VOLATGE 500000
|
||||
#define TPS51632_MAX_VOLATGE 1520000
|
||||
#define TPS51632_VOLATGE_STEP_10mV 10000
|
||||
#define TPS51632_VOLATGE_STEP_20mV 20000
|
||||
#define TPS51632_MIN_VOLTAGE 500000
|
||||
#define TPS51632_MAX_VOLTAGE 1520000
|
||||
#define TPS51632_VOLTAGE_STEP_10mV 10000
|
||||
#define TPS51632_VOLTAGE_STEP_20mV 20000
|
||||
#define TPS51632_MAX_VSEL 0x7F
|
||||
#define TPS51632_MIN_VSEL 0x19
|
||||
#define TPS51632_DEFAULT_RAMP_DELAY 6000
|
||||
#define TPS51632_VOLT_VSEL(uV) \
|
||||
(DIV_ROUND_UP(uV - TPS51632_MIN_VOLATGE, \
|
||||
TPS51632_VOLATGE_STEP_10mV) + \
|
||||
(DIV_ROUND_UP(uV - TPS51632_MIN_VOLTAGE, \
|
||||
TPS51632_VOLTAGE_STEP_10mV) + \
|
||||
TPS51632_MIN_VSEL)
|
||||
|
||||
/* TPS51632 chip information */
|
||||
|
@ -243,9 +243,9 @@ static struct tps51632_regulator_platform_data *
|
|||
pdata->dvfs_step_20mV = of_property_read_bool(np, "ti,dvfs-step-20mV");
|
||||
|
||||
pdata->base_voltage_uV = pdata->reg_init_data->constraints.min_uV ? :
|
||||
TPS51632_MIN_VOLATGE;
|
||||
TPS51632_MIN_VOLTAGE;
|
||||
pdata->max_voltage_uV = pdata->reg_init_data->constraints.max_uV ? :
|
||||
TPS51632_MAX_VOLATGE;
|
||||
TPS51632_MAX_VOLTAGE;
|
||||
return pdata;
|
||||
}
|
||||
#else
|
||||
|
@ -284,15 +284,15 @@ static int tps51632_probe(struct i2c_client *client,
|
|||
}
|
||||
|
||||
if (pdata->enable_pwm_dvfs) {
|
||||
if ((pdata->base_voltage_uV < TPS51632_MIN_VOLATGE) ||
|
||||
(pdata->base_voltage_uV > TPS51632_MAX_VOLATGE)) {
|
||||
if ((pdata->base_voltage_uV < TPS51632_MIN_VOLTAGE) ||
|
||||
(pdata->base_voltage_uV > TPS51632_MAX_VOLTAGE)) {
|
||||
dev_err(&client->dev, "Invalid base_voltage_uV setting\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if ((pdata->max_voltage_uV) &&
|
||||
((pdata->max_voltage_uV < TPS51632_MIN_VOLATGE) ||
|
||||
(pdata->max_voltage_uV > TPS51632_MAX_VOLATGE))) {
|
||||
((pdata->max_voltage_uV < TPS51632_MIN_VOLTAGE) ||
|
||||
(pdata->max_voltage_uV > TPS51632_MAX_VOLTAGE))) {
|
||||
dev_err(&client->dev, "Invalid max_voltage_uV setting\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
|
@ -305,11 +305,11 @@ static int tps51632_probe(struct i2c_client *client,
|
|||
}
|
||||
|
||||
tps->dev = &client->dev;
|
||||
tps->desc.name = id->name;
|
||||
tps->desc.name = client->name;
|
||||
tps->desc.id = 0;
|
||||
tps->desc.ramp_delay = TPS51632_DEFAULT_RAMP_DELAY;
|
||||
tps->desc.min_uV = TPS51632_MIN_VOLATGE;
|
||||
tps->desc.uV_step = TPS51632_VOLATGE_STEP_10mV;
|
||||
tps->desc.min_uV = TPS51632_MIN_VOLTAGE;
|
||||
tps->desc.uV_step = TPS51632_VOLTAGE_STEP_10mV;
|
||||
tps->desc.linear_min_sel = TPS51632_MIN_VSEL;
|
||||
tps->desc.n_voltages = TPS51632_MAX_VSEL + 1;
|
||||
tps->desc.ops = &tps51632_dcdc_ops;
|
||||
|
|
|
@ -360,7 +360,7 @@ static int tps62360_probe(struct i2c_client *client,
|
|||
dev_err(&client->dev, "Error: No device match found\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
chip_id = (int)match->data;
|
||||
chip_id = (int)(long)match->data;
|
||||
if (!pdata)
|
||||
pdata = of_get_tps62360_platform_data(&client->dev);
|
||||
} else if (id) {
|
||||
|
|
|
@ -88,6 +88,11 @@ static const unsigned int VMMC_VSEL_table[] = {
|
|||
1800000, 2800000, 3000000, 3300000,
|
||||
};
|
||||
|
||||
/* supported BBCH voltages in microvolts */
|
||||
static const unsigned int VBB_VSEL_table[] = {
|
||||
3000000, 2520000, 3150000, 5000000,
|
||||
};
|
||||
|
||||
struct tps_info {
|
||||
const char *name;
|
||||
const char *vin_name;
|
||||
|
@ -183,6 +188,12 @@ static struct tps_info tps65910_regs[] = {
|
|||
.voltage_table = VMMC_VSEL_table,
|
||||
.enable_time_us = 100,
|
||||
},
|
||||
{
|
||||
.name = "vbb",
|
||||
.vin_name = "vcc7",
|
||||
.n_voltages = ARRAY_SIZE(VBB_VSEL_table),
|
||||
.voltage_table = VBB_VSEL_table,
|
||||
},
|
||||
};
|
||||
|
||||
static struct tps_info tps65911_regs[] = {
|
||||
|
@ -339,6 +350,8 @@ static int tps65910_get_ctrl_register(int id)
|
|||
return TPS65910_VAUX33;
|
||||
case TPS65910_REG_VMMC:
|
||||
return TPS65910_VMMC;
|
||||
case TPS65910_REG_VBB:
|
||||
return TPS65910_BBCH;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
@ -528,6 +541,10 @@ static int tps65910_get_voltage_sel(struct regulator_dev *dev)
|
|||
value &= LDO_SEL_MASK;
|
||||
value >>= LDO_SEL_SHIFT;
|
||||
break;
|
||||
case TPS65910_REG_VBB:
|
||||
value &= BBCH_BBSEL_MASK;
|
||||
value >>= BBCH_BBSEL_SHIFT;
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
@ -638,6 +655,9 @@ static int tps65910_set_voltage_sel(struct regulator_dev *dev,
|
|||
case TPS65910_REG_VMMC:
|
||||
return tps65910_reg_update_bits(pmic->mfd, reg, LDO_SEL_MASK,
|
||||
selector << LDO_SEL_SHIFT);
|
||||
case TPS65910_REG_VBB:
|
||||
return tps65910_reg_update_bits(pmic->mfd, reg, BBCH_BBSEL_MASK,
|
||||
selector << BBCH_BBSEL_SHIFT);
|
||||
}
|
||||
|
||||
return -EINVAL;
|
||||
|
@ -669,6 +689,9 @@ static int tps65911_set_voltage_sel(struct regulator_dev *dev,
|
|||
case TPS65910_REG_VIO:
|
||||
return tps65910_reg_update_bits(pmic->mfd, reg, LDO_SEL_MASK,
|
||||
selector << LDO_SEL_SHIFT);
|
||||
case TPS65910_REG_VBB:
|
||||
return tps65910_reg_update_bits(pmic->mfd, reg, BBCH_BBSEL_MASK,
|
||||
selector << BBCH_BBSEL_SHIFT);
|
||||
}
|
||||
|
||||
return -EINVAL;
|
||||
|
@ -762,6 +785,18 @@ static struct regulator_ops tps65910_ops_vdd3 = {
|
|||
.map_voltage = regulator_map_voltage_ascend,
|
||||
};
|
||||
|
||||
static struct regulator_ops tps65910_ops_vbb = {
|
||||
.is_enabled = regulator_is_enabled_regmap,
|
||||
.enable = regulator_enable_regmap,
|
||||
.disable = regulator_disable_regmap,
|
||||
.set_mode = tps65910_set_mode,
|
||||
.get_mode = tps65910_get_mode,
|
||||
.get_voltage_sel = tps65910_get_voltage_sel,
|
||||
.set_voltage_sel = tps65910_set_voltage_sel,
|
||||
.list_voltage = regulator_list_voltage_table,
|
||||
.map_voltage = regulator_map_voltage_iterate,
|
||||
};
|
||||
|
||||
static struct regulator_ops tps65910_ops = {
|
||||
.is_enabled = regulator_is_enabled_regmap,
|
||||
.enable = regulator_enable_regmap,
|
||||
|
@ -944,6 +979,7 @@ static struct of_regulator_match tps65910_matches[] = {
|
|||
{ .name = "vaux2", .driver_data = (void *) &tps65910_regs[10] },
|
||||
{ .name = "vaux33", .driver_data = (void *) &tps65910_regs[11] },
|
||||
{ .name = "vmmc", .driver_data = (void *) &tps65910_regs[12] },
|
||||
{ .name = "vbb", .driver_data = (void *) &tps65910_regs[13] },
|
||||
};
|
||||
|
||||
static struct of_regulator_match tps65911_matches[] = {
|
||||
|
@ -1145,6 +1181,10 @@ static int tps65910_probe(struct platform_device *pdev)
|
|||
pmic->desc[i].ops = &tps65910_ops_dcdc;
|
||||
pmic->desc[i].ramp_delay = 5000;
|
||||
}
|
||||
} else if (i == TPS65910_REG_VBB &&
|
||||
tps65910_chip_id(tps65910) == TPS65910) {
|
||||
pmic->desc[i].ops = &tps65910_ops_vbb;
|
||||
pmic->desc[i].volt_table = info->voltage_table;
|
||||
} else {
|
||||
if (tps65910_chip_id(tps65910) == TPS65910) {
|
||||
pmic->desc[i].ops = &tps65910_ops;
|
||||
|
|
|
@ -58,7 +58,7 @@ struct twlreg_info {
|
|||
struct regulator_desc desc;
|
||||
|
||||
/* chip specific features */
|
||||
unsigned long features;
|
||||
unsigned long features;
|
||||
|
||||
/*
|
||||
* optional override functions for voltage set/get
|
||||
|
@ -1128,7 +1128,7 @@ static int twlreg_probe(struct platform_device *pdev)
|
|||
if (!initdata)
|
||||
return -EINVAL;
|
||||
|
||||
info = kmemdup(template, sizeof (*info), GFP_KERNEL);
|
||||
info = kmemdup(template, sizeof(*info), GFP_KERNEL);
|
||||
if (!info)
|
||||
return -ENOMEM;
|
||||
|
||||
|
|
|
@ -762,8 +762,7 @@ static int wm831x_boostp_probe(struct platform_device *pdev)
|
|||
res = platform_get_resource(pdev, IORESOURCE_REG, 0);
|
||||
if (res == NULL) {
|
||||
dev_err(&pdev->dev, "No REG resource\n");
|
||||
ret = -EINVAL;
|
||||
goto err;
|
||||
return -EINVAL;
|
||||
}
|
||||
dcdc->base = res->start;
|
||||
|
||||
|
@ -788,7 +787,7 @@ static int wm831x_boostp_probe(struct platform_device *pdev)
|
|||
ret = PTR_ERR(dcdc->regulator);
|
||||
dev_err(wm831x->dev, "Failed to register DCDC%d: %d\n",
|
||||
id + 1, ret);
|
||||
goto err;
|
||||
return ret;
|
||||
}
|
||||
|
||||
irq = wm831x_irq(wm831x, platform_get_irq_byname(pdev, "UV"));
|
||||
|
@ -799,15 +798,12 @@ static int wm831x_boostp_probe(struct platform_device *pdev)
|
|||
if (ret != 0) {
|
||||
dev_err(&pdev->dev, "Failed to request UV IRQ %d: %d\n",
|
||||
irq, ret);
|
||||
goto err;
|
||||
return ret;
|
||||
}
|
||||
|
||||
platform_set_drvdata(pdev, dcdc);
|
||||
|
||||
return 0;
|
||||
|
||||
err:
|
||||
return ret;
|
||||
}
|
||||
|
||||
static struct platform_driver wm831x_boostp_driver = {
|
||||
|
|
|
@ -59,12 +59,6 @@ int sec_irq_init(struct sec_pmic_dev *sec_pmic);
|
|||
void sec_irq_exit(struct sec_pmic_dev *sec_pmic);
|
||||
int sec_irq_resume(struct sec_pmic_dev *sec_pmic);
|
||||
|
||||
extern int sec_reg_read(struct sec_pmic_dev *sec_pmic, u8 reg, void *dest);
|
||||
extern int sec_bulk_read(struct sec_pmic_dev *sec_pmic, u8 reg, int count, u8 *buf);
|
||||
extern int sec_reg_write(struct sec_pmic_dev *sec_pmic, u8 reg, u8 value);
|
||||
extern int sec_bulk_write(struct sec_pmic_dev *sec_pmic, u8 reg, int count, u8 *buf);
|
||||
extern int sec_reg_update(struct sec_pmic_dev *sec_pmic, u8 reg, u8 val, u8 mask);
|
||||
|
||||
struct sec_platform_data {
|
||||
struct sec_regulator_data *regulators;
|
||||
struct sec_opmode_data *opmode;
|
||||
|
|
|
@ -183,6 +183,22 @@ enum s5m8767_regulators {
|
|||
S5M8767_REG_MAX,
|
||||
};
|
||||
|
||||
#define S5M8767_ENCTRL_SHIFT 6
|
||||
#define S5M8767_ENCTRL_SHIFT 6
|
||||
#define S5M8767_ENCTRL_MASK (0x3 << S5M8767_ENCTRL_SHIFT)
|
||||
|
||||
/*
|
||||
* Values for BUCK_RAMP field in DVS_RAMP register, matching raw values
|
||||
* in mV/us.
|
||||
*/
|
||||
enum s5m8767_dvs_buck_ramp_values {
|
||||
S5M8767_DVS_BUCK_RAMP_5 = 0x4,
|
||||
S5M8767_DVS_BUCK_RAMP_10 = 0x9,
|
||||
S5M8767_DVS_BUCK_RAMP_12_5 = 0xb,
|
||||
S5M8767_DVS_BUCK_RAMP_25 = 0xd,
|
||||
S5M8767_DVS_BUCK_RAMP_50 = 0xe,
|
||||
S5M8767_DVS_BUCK_RAMP_100 = 0xf,
|
||||
};
|
||||
#define S5M8767_DVS_BUCK_RAMP_SHIFT 4
|
||||
#define S5M8767_DVS_BUCK_RAMP_MASK (0xf << S5M8767_DVS_BUCK_RAMP_SHIFT)
|
||||
|
||||
#endif /* __LINUX_MFD_S5M8767_H */
|
||||
|
|
|
@ -358,8 +358,6 @@
|
|||
/*Register BBCH (0x80) register.RegisterDescription */
|
||||
#define BBCH_BBSEL_MASK 0x06
|
||||
#define BBCH_BBSEL_SHIFT 1
|
||||
#define BBCH_BBCHEN_MASK 0x01
|
||||
#define BBCH_BBCHEN_SHIFT 0
|
||||
|
||||
|
||||
/*Register DCDCCTRL (0x80) register.RegisterDescription */
|
||||
|
@ -833,6 +831,7 @@
|
|||
#define TPS65910_REG_VAUX2 10
|
||||
#define TPS65910_REG_VAUX33 11
|
||||
#define TPS65910_REG_VMMC 12
|
||||
#define TPS65910_REG_VBB 13
|
||||
|
||||
#define TPS65911_REG_VDDCTRL 4
|
||||
#define TPS65911_REG_LDO1 5
|
||||
|
@ -845,7 +844,7 @@
|
|||
#define TPS65911_REG_LDO8 12
|
||||
|
||||
/* Max number of TPS65910/11 regulators */
|
||||
#define TPS65910_NUM_REGS 13
|
||||
#define TPS65910_NUM_REGS 14
|
||||
|
||||
/* External sleep controls through EN1/EN2/EN3/SLEEP inputs */
|
||||
#define TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1 0x1
|
||||
|
|
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