Merge branch 'omap/hwmod' into next/drivers
This is needed as a dependency for omap/ehci. Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Коммит
07b98403ee
9
CREDITS
9
CREDITS
|
@ -688,10 +688,13 @@ S: Oxfordshire, UK.
|
|||
|
||||
N: Kees Cook
|
||||
E: kees@outflux.net
|
||||
W: http://outflux.net/
|
||||
P: 1024D/17063E6D 9FA3 C49C 23C9 D1BC 2E30 1975 1FFF 4BA9 1706 3E6D
|
||||
D: Minor updates to SCSI types, added /proc/pid/maps protection
|
||||
E: kees@ubuntu.com
|
||||
E: keescook@chromium.org
|
||||
W: http://outflux.net/blog/
|
||||
P: 4096R/DC6DC026 A5C3 F68F 229D D60F 723E 6E13 8972 F4DF DC6D C026
|
||||
D: Various security things, bug fixes, and documentation.
|
||||
S: (ask for current address)
|
||||
S: Portland, Oregon
|
||||
S: USA
|
||||
|
||||
N: Robin Cornelius
|
||||
|
|
|
@ -315,12 +315,12 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
|
|||
CPU-intensive style benchmark, and it can vary highly in
|
||||
a microbenchmark depending on workload and compiler.
|
||||
|
||||
1: only for 32-bit processes
|
||||
2: only for 64-bit processes
|
||||
32: only for 32-bit processes
|
||||
64: only for 64-bit processes
|
||||
on: enable for both 32- and 64-bit processes
|
||||
off: disable for both 32- and 64-bit processes
|
||||
|
||||
amd_iommu= [HW,X86-84]
|
||||
amd_iommu= [HW,X86-64]
|
||||
Pass parameters to the AMD IOMMU driver in the system.
|
||||
Possible values are:
|
||||
fullflush - enable flushing of IO/TLB entries when
|
||||
|
|
|
@ -282,11 +282,11 @@ tcp_max_ssthresh - INTEGER
|
|||
Default: 0 (off)
|
||||
|
||||
tcp_max_syn_backlog - INTEGER
|
||||
Maximal number of remembered connection requests, which are
|
||||
still did not receive an acknowledgment from connecting client.
|
||||
Default value is 1024 for systems with more than 128Mb of memory,
|
||||
and 128 for low memory machines. If server suffers of overload,
|
||||
try to increase this number.
|
||||
Maximal number of remembered connection requests, which have not
|
||||
received an acknowledgment from connecting client.
|
||||
The minimal value is 128 for low memory machines, and it will
|
||||
increase in proportion to the memory of machine.
|
||||
If server suffers from overload, try increasing this number.
|
||||
|
||||
tcp_max_tw_buckets - INTEGER
|
||||
Maximal number of timewait sockets held by system simultaneously.
|
||||
|
|
|
@ -50,8 +50,7 @@ Machine DAI Configuration
|
|||
The machine DAI configuration glues all the codec and CPU DAIs together. It can
|
||||
also be used to set up the DAI system clock and for any machine related DAI
|
||||
initialisation e.g. the machine audio map can be connected to the codec audio
|
||||
map, unconnected codec pins can be set as such. Please see corgi.c, spitz.c
|
||||
for examples.
|
||||
map, unconnected codec pins can be set as such.
|
||||
|
||||
struct snd_soc_dai_link is used to set up each DAI in your machine. e.g.
|
||||
|
||||
|
@ -83,8 +82,7 @@ Machine Power Map
|
|||
The machine driver can optionally extend the codec power map and to become an
|
||||
audio power map of the audio subsystem. This allows for automatic power up/down
|
||||
of speaker/HP amplifiers, etc. Codec pins can be connected to the machines jack
|
||||
sockets in the machine init function. See soc/pxa/spitz.c and dapm.txt for
|
||||
details.
|
||||
sockets in the machine init function.
|
||||
|
||||
|
||||
Machine Controls
|
||||
|
|
|
@ -90,10 +90,10 @@ ServiceBinary=%12%\USBSER.sys
|
|||
[SourceDisksFiles]
|
||||
[SourceDisksNames]
|
||||
[DeviceList]
|
||||
%DESCRIPTION%=DriverInstall, USB\VID_0525&PID_A4A7, USB\VID_1D6B&PID_0104&MI_02
|
||||
%DESCRIPTION%=DriverInstall, USB\VID_0525&PID_A4A7, USB\VID_1D6B&PID_0104&MI_02, USB\VID_1D6B&PID_0106&MI_00
|
||||
|
||||
[DeviceList.NTamd64]
|
||||
%DESCRIPTION%=DriverInstall, USB\VID_0525&PID_A4A7, USB\VID_1D6B&PID_0104&MI_02
|
||||
%DESCRIPTION%=DriverInstall, USB\VID_0525&PID_A4A7, USB\VID_1D6B&PID_0104&MI_02, USB\VID_1D6B&PID_0106&MI_00
|
||||
|
||||
|
||||
;------------------------------------------------------------------------------
|
||||
|
|
34
MAINTAINERS
34
MAINTAINERS
|
@ -511,8 +511,8 @@ M: Joerg Roedel <joerg.roedel@amd.com>
|
|||
L: iommu@lists.linux-foundation.org
|
||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/joro/linux-2.6-iommu.git
|
||||
S: Supported
|
||||
F: arch/x86/kernel/amd_iommu*.c
|
||||
F: arch/x86/include/asm/amd_iommu*.h
|
||||
F: drivers/iommu/amd_iommu*.[ch]
|
||||
F: include/linux/amd-iommu.h
|
||||
|
||||
AMD MICROCODE UPDATE SUPPORT
|
||||
M: Andreas Herrmann <andreas.herrmann3@amd.com>
|
||||
|
@ -1054,35 +1054,18 @@ ARM/SAMSUNG ARM ARCHITECTURES
|
|||
M: Ben Dooks <ben-linux@fluff.org>
|
||||
M: Kukjin Kim <kgene.kim@samsung.com>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
L: linux-samsung-soc@vger.kernel.org (moderated for non-subscribers)
|
||||
W: http://www.fluff.org/ben/linux/
|
||||
S: Maintained
|
||||
F: arch/arm/plat-samsung/
|
||||
F: arch/arm/plat-s3c24xx/
|
||||
F: arch/arm/plat-s5p/
|
||||
F: arch/arm/mach-s3c24*/
|
||||
F: arch/arm/mach-s3c64xx/
|
||||
F: drivers/*/*s3c2410*
|
||||
F: drivers/*/*/*s3c2410*
|
||||
|
||||
ARM/S3C2410 ARM ARCHITECTURE
|
||||
M: Ben Dooks <ben-linux@fluff.org>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
W: http://www.fluff.org/ben/linux/
|
||||
S: Maintained
|
||||
F: arch/arm/mach-s3c2410/
|
||||
|
||||
ARM/S3C244x ARM ARCHITECTURE
|
||||
M: Ben Dooks <ben-linux@fluff.org>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
W: http://www.fluff.org/ben/linux/
|
||||
S: Maintained
|
||||
F: arch/arm/mach-s3c2440/
|
||||
F: arch/arm/mach-s3c2443/
|
||||
|
||||
ARM/S3C64xx ARM ARCHITECTURE
|
||||
M: Ben Dooks <ben-linux@fluff.org>
|
||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||
W: http://www.fluff.org/ben/linux/
|
||||
S: Maintained
|
||||
F: arch/arm/mach-s3c64xx/
|
||||
F: drivers/spi/spi-s3c*
|
||||
F: sound/soc/samsung/*
|
||||
|
||||
ARM/S5P EXYNOS ARM ARCHITECTURES
|
||||
M: Kukjin Kim <kgene.kim@samsung.com>
|
||||
|
@ -4319,8 +4302,9 @@ F: include/linux/mm.h
|
|||
F: mm/
|
||||
|
||||
MEMORY RESOURCE CONTROLLER
|
||||
M: Johannes Weiner <hannes@cmpxchg.org>
|
||||
M: Michal Hocko <mhocko@suse.cz>
|
||||
M: Balbir Singh <bsingharora@gmail.com>
|
||||
M: Daisuke Nishimura <nishimura@mxp.nes.nec.co.jp>
|
||||
M: KAMEZAWA Hiroyuki <kamezawa.hiroyu@jp.fujitsu.com>
|
||||
L: cgroups@vger.kernel.org
|
||||
L: linux-mm@kvack.org
|
||||
|
|
2
Makefile
2
Makefile
|
@ -1,7 +1,7 @@
|
|||
VERSION = 3
|
||||
PATCHLEVEL = 2
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc4
|
||||
EXTRAVERSION = -rc5
|
||||
NAME = Saber-toothed Squirrel
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
|
@ -48,12 +48,7 @@ CONFIG_MACH_SX1=y
|
|||
CONFIG_MACH_NOKIA770=y
|
||||
CONFIG_MACH_AMS_DELTA=y
|
||||
CONFIG_MACH_OMAP_GENERIC=y
|
||||
CONFIG_OMAP_ARM_216MHZ=y
|
||||
CONFIG_OMAP_ARM_195MHZ=y
|
||||
CONFIG_OMAP_ARM_192MHZ=y
|
||||
CONFIG_OMAP_ARM_182MHZ=y
|
||||
CONFIG_OMAP_ARM_168MHZ=y
|
||||
# CONFIG_OMAP_ARM_60MHZ is not set
|
||||
# CONFIG_ARM_THUMB is not set
|
||||
CONFIG_PCCARD=y
|
||||
CONFIG_OMAP_CF=y
|
||||
|
|
|
@ -353,15 +353,15 @@ validate_group(struct perf_event *event)
|
|||
fake_pmu.used_mask = fake_used_mask;
|
||||
|
||||
if (!validate_event(&fake_pmu, leader))
|
||||
return -ENOSPC;
|
||||
return -EINVAL;
|
||||
|
||||
list_for_each_entry(sibling, &leader->sibling_list, group_entry) {
|
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if (!validate_event(&fake_pmu, sibling))
|
||||
return -ENOSPC;
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (!validate_event(&fake_pmu, event))
|
||||
return -ENOSPC;
|
||||
return -EINVAL;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -83,7 +83,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
|
|||
* USB Device (Gadget)
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
#ifdef CONFIG_USB_GADGET_AT91
|
||||
#ifdef CONFIG_USB_AT91
|
||||
static struct at91_udc_data udc_data;
|
||||
|
||||
static struct resource udc_resources[] = {
|
||||
|
|
|
@ -197,9 +197,9 @@ static struct clk_lookup periph_clocks_lookups[] = {
|
|||
CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tc0_clk),
|
||||
CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.0", &tc1_clk),
|
||||
CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.0", &tc2_clk),
|
||||
CLKDEV_CON_DEV_ID("t3_clk", "atmel_tcb.1", &tc3_clk),
|
||||
CLKDEV_CON_DEV_ID("t4_clk", "atmel_tcb.1", &tc4_clk),
|
||||
CLKDEV_CON_DEV_ID("t5_clk", "atmel_tcb.1", &tc5_clk),
|
||||
CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.1", &tc3_clk),
|
||||
CLKDEV_CON_DEV_ID("t1_clk", "atmel_tcb.1", &tc4_clk),
|
||||
CLKDEV_CON_DEV_ID("t2_clk", "atmel_tcb.1", &tc5_clk),
|
||||
CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc_clk),
|
||||
/* more usart lookup table for DT entries */
|
||||
CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck),
|
||||
|
|
|
@ -84,7 +84,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
|
|||
* USB Device (Gadget)
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
#ifdef CONFIG_USB_GADGET_AT91
|
||||
#ifdef CONFIG_USB_AT91
|
||||
static struct at91_udc_data udc_data;
|
||||
|
||||
static struct resource udc_resources[] = {
|
||||
|
|
|
@ -87,7 +87,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
|
|||
* USB Device (Gadget)
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
#ifdef CONFIG_USB_GADGET_AT91
|
||||
#ifdef CONFIG_USB_AT91
|
||||
static struct at91_udc_data udc_data;
|
||||
|
||||
static struct resource udc_resources[] = {
|
||||
|
|
|
@ -92,7 +92,7 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) {}
|
|||
* USB Device (Gadget)
|
||||
* -------------------------------------------------------------------- */
|
||||
|
||||
#ifdef CONFIG_USB_GADGET_AT91
|
||||
#ifdef CONFIG_USB_AT91
|
||||
static struct at91_udc_data udc_data;
|
||||
|
||||
static struct resource udc_resources[] = {
|
||||
|
|
|
@ -19,7 +19,7 @@
|
|||
#define BOARD_HAVE_NAND_16BIT (1 << 31)
|
||||
static inline int board_have_nand_16bit(void)
|
||||
{
|
||||
return system_rev & BOARD_HAVE_NAND_16BIT;
|
||||
return (system_rev & BOARD_HAVE_NAND_16BIT) ? 1 : 0;
|
||||
}
|
||||
|
||||
#endif /* __ARCH_SYSTEM_REV_H__ */
|
||||
|
|
|
@ -753,7 +753,7 @@ static struct snd_platform_data da850_evm_snd_data = {
|
|||
.num_serializer = ARRAY_SIZE(da850_iis_serializer_direction),
|
||||
.tdm_slots = 2,
|
||||
.serial_dir = da850_iis_serializer_direction,
|
||||
.asp_chan_q = EVENTQ_1,
|
||||
.asp_chan_q = EVENTQ_0,
|
||||
.version = MCASP_VERSION_2,
|
||||
.txnumevt = 1,
|
||||
.rxnumevt = 1,
|
||||
|
|
|
@ -107,7 +107,7 @@ static struct mtd_partition davinci_nand_partitions[] = {
|
|||
/* UBL (a few copies) plus U-Boot */
|
||||
.name = "bootloader",
|
||||
.offset = 0,
|
||||
.size = 28 * NAND_BLOCK_SIZE,
|
||||
.size = 30 * NAND_BLOCK_SIZE,
|
||||
.mask_flags = MTD_WRITEABLE, /* force read-only */
|
||||
}, {
|
||||
/* U-Boot environment */
|
||||
|
|
|
@ -564,7 +564,7 @@ static int setup_vpif_input_channel_mode(int mux_mode)
|
|||
int val;
|
||||
u32 value;
|
||||
|
||||
if (!vpif_vsclkdis_reg || !cpld_client)
|
||||
if (!vpif_vidclkctl_reg || !cpld_client)
|
||||
return -ENXIO;
|
||||
|
||||
val = i2c_smbus_read_byte(cpld_client);
|
||||
|
@ -572,7 +572,7 @@ static int setup_vpif_input_channel_mode(int mux_mode)
|
|||
return val;
|
||||
|
||||
spin_lock_irqsave(&vpif_reg_lock, flags);
|
||||
value = __raw_readl(vpif_vsclkdis_reg);
|
||||
value = __raw_readl(vpif_vidclkctl_reg);
|
||||
if (mux_mode) {
|
||||
val &= VPIF_INPUT_TWO_CHANNEL;
|
||||
value |= VIDCH1CLK;
|
||||
|
@ -580,7 +580,7 @@ static int setup_vpif_input_channel_mode(int mux_mode)
|
|||
val |= VPIF_INPUT_ONE_CHANNEL;
|
||||
value &= ~VIDCH1CLK;
|
||||
}
|
||||
__raw_writel(value, vpif_vsclkdis_reg);
|
||||
__raw_writel(value, vpif_vidclkctl_reg);
|
||||
spin_unlock_irqrestore(&vpif_reg_lock, flags);
|
||||
|
||||
err = i2c_smbus_write_byte(cpld_client, val);
|
||||
|
|
|
@ -161,7 +161,6 @@ static struct clk dsp_clk = {
|
|||
.name = "dsp",
|
||||
.parent = &pll1_sysclk1,
|
||||
.lpsc = DM646X_LPSC_C64X_CPU,
|
||||
.flags = PSC_DSP,
|
||||
.usecount = 1, /* REVISIT how to disable? */
|
||||
};
|
||||
|
||||
|
|
|
@ -233,7 +233,7 @@
|
|||
#define PTCMD 0x120
|
||||
#define PTSTAT 0x128
|
||||
#define PDSTAT 0x200
|
||||
#define PDCTL1 0x304
|
||||
#define PDCTL 0x300
|
||||
#define MDSTAT 0x800
|
||||
#define MDCTL 0xA00
|
||||
|
||||
|
@ -244,7 +244,10 @@
|
|||
#define PSC_STATE_ENABLE 3
|
||||
|
||||
#define MDSTAT_STATE_MASK 0x3f
|
||||
#define PDSTAT_STATE_MASK 0x1f
|
||||
#define MDCTL_FORCE BIT(31)
|
||||
#define PDCTL_NEXT BIT(1)
|
||||
#define PDCTL_EPCGOOD BIT(8)
|
||||
|
||||
#ifndef __ASSEMBLER__
|
||||
|
||||
|
|
|
@ -52,7 +52,7 @@ int __init davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id)
|
|||
void davinci_psc_config(unsigned int domain, unsigned int ctlr,
|
||||
unsigned int id, bool enable, u32 flags)
|
||||
{
|
||||
u32 epcpr, ptcmd, ptstat, pdstat, pdctl1, mdstat, mdctl;
|
||||
u32 epcpr, ptcmd, ptstat, pdstat, pdctl, mdstat, mdctl;
|
||||
void __iomem *psc_base;
|
||||
struct davinci_soc_info *soc_info = &davinci_soc_info;
|
||||
u32 next_state = PSC_STATE_ENABLE;
|
||||
|
@ -79,11 +79,11 @@ void davinci_psc_config(unsigned int domain, unsigned int ctlr,
|
|||
mdctl |= MDCTL_FORCE;
|
||||
__raw_writel(mdctl, psc_base + MDCTL + 4 * id);
|
||||
|
||||
pdstat = __raw_readl(psc_base + PDSTAT);
|
||||
if ((pdstat & 0x00000001) == 0) {
|
||||
pdctl1 = __raw_readl(psc_base + PDCTL1);
|
||||
pdctl1 |= 0x1;
|
||||
__raw_writel(pdctl1, psc_base + PDCTL1);
|
||||
pdstat = __raw_readl(psc_base + PDSTAT + 4 * domain);
|
||||
if ((pdstat & PDSTAT_STATE_MASK) == 0) {
|
||||
pdctl = __raw_readl(psc_base + PDCTL + 4 * domain);
|
||||
pdctl |= PDCTL_NEXT;
|
||||
__raw_writel(pdctl, psc_base + PDCTL + 4 * domain);
|
||||
|
||||
ptcmd = 1 << domain;
|
||||
__raw_writel(ptcmd, psc_base + PTCMD);
|
||||
|
@ -92,9 +92,9 @@ void davinci_psc_config(unsigned int domain, unsigned int ctlr,
|
|||
epcpr = __raw_readl(psc_base + EPCPR);
|
||||
} while ((((epcpr >> domain) & 1) == 0));
|
||||
|
||||
pdctl1 = __raw_readl(psc_base + PDCTL1);
|
||||
pdctl1 |= 0x100;
|
||||
__raw_writel(pdctl1, psc_base + PDCTL1);
|
||||
pdctl = __raw_readl(psc_base + PDCTL + 4 * domain);
|
||||
pdctl |= PDCTL_EPCGOOD;
|
||||
__raw_writel(pdctl, psc_base + PDCTL + 4 * domain);
|
||||
} else {
|
||||
ptcmd = 1 << domain;
|
||||
__raw_writel(ptcmd, psc_base + PTCMD);
|
||||
|
|
|
@ -37,14 +37,15 @@ static void __init imx6q_map_io(void)
|
|||
imx6q_clock_map_io();
|
||||
}
|
||||
|
||||
static void __init imx6q_gpio_add_irq_domain(struct device_node *np,
|
||||
static int __init imx6q_gpio_add_irq_domain(struct device_node *np,
|
||||
struct device_node *interrupt_parent)
|
||||
{
|
||||
static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS -
|
||||
32 * 7; /* imx6q gets 7 gpio ports */
|
||||
static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
|
||||
|
||||
gpio_irq_base -= 32;
|
||||
irq_domain_add_simple(np, gpio_irq_base);
|
||||
gpio_irq_base += 32;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct of_device_id imx6q_irq_match[] __initconst = {
|
||||
|
|
|
@ -18,6 +18,7 @@
|
|||
#include <linux/kernel.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/bootmem.h>
|
||||
#include <linux/module.h>
|
||||
#include <mach/irqs.h>
|
||||
#include <mach/iommu.h>
|
||||
|
||||
|
|
|
@ -44,20 +44,22 @@ static const struct of_dev_auxdata imx51_auxdata_lookup[] __initconst = {
|
|||
{ /* sentinel */ }
|
||||
};
|
||||
|
||||
static void __init imx51_tzic_add_irq_domain(struct device_node *np,
|
||||
static int __init imx51_tzic_add_irq_domain(struct device_node *np,
|
||||
struct device_node *interrupt_parent)
|
||||
{
|
||||
irq_domain_add_simple(np, 0);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void __init imx51_gpio_add_irq_domain(struct device_node *np,
|
||||
static int __init imx51_gpio_add_irq_domain(struct device_node *np,
|
||||
struct device_node *interrupt_parent)
|
||||
{
|
||||
static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS -
|
||||
32 * 4; /* imx51 gets 4 gpio ports */
|
||||
static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
|
||||
|
||||
gpio_irq_base -= 32;
|
||||
irq_domain_add_simple(np, gpio_irq_base);
|
||||
gpio_irq_base += 32;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct of_device_id imx51_irq_match[] __initconst = {
|
||||
|
|
|
@ -48,20 +48,22 @@ static const struct of_dev_auxdata imx53_auxdata_lookup[] __initconst = {
|
|||
{ /* sentinel */ }
|
||||
};
|
||||
|
||||
static void __init imx53_tzic_add_irq_domain(struct device_node *np,
|
||||
static int __init imx53_tzic_add_irq_domain(struct device_node *np,
|
||||
struct device_node *interrupt_parent)
|
||||
{
|
||||
irq_domain_add_simple(np, 0);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void __init imx53_gpio_add_irq_domain(struct device_node *np,
|
||||
static int __init imx53_gpio_add_irq_domain(struct device_node *np,
|
||||
struct device_node *interrupt_parent)
|
||||
{
|
||||
static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS -
|
||||
32 * 7; /* imx53 gets 7 gpio ports */
|
||||
static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
|
||||
|
||||
gpio_irq_base -= 32;
|
||||
irq_domain_add_simple(np, gpio_irq_base);
|
||||
gpio_irq_base += 32;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct of_device_id imx53_irq_match[] __initconst = {
|
||||
|
|
|
@ -104,8 +104,8 @@
|
|||
#define MX28_INT_CAN1 9
|
||||
#define MX28_INT_LRADC_TOUCH 10
|
||||
#define MX28_INT_HSADC 13
|
||||
#define MX28_INT_IRADC_THRESH0 14
|
||||
#define MX28_INT_IRADC_THRESH1 15
|
||||
#define MX28_INT_LRADC_THRESH0 14
|
||||
#define MX28_INT_LRADC_THRESH1 15
|
||||
#define MX28_INT_LRADC_CH0 16
|
||||
#define MX28_INT_LRADC_CH1 17
|
||||
#define MX28_INT_LRADC_CH2 18
|
||||
|
|
|
@ -30,6 +30,7 @@
|
|||
*/
|
||||
#define cpu_is_mx23() ( \
|
||||
machine_is_mx23evk() || \
|
||||
machine_is_stmp378x() || \
|
||||
0)
|
||||
#define cpu_is_mx28() ( \
|
||||
machine_is_mx28evk() || \
|
||||
|
|
|
@ -361,6 +361,6 @@ static struct sys_timer m28evk_timer = {
|
|||
MACHINE_START(M28EVK, "DENX M28 EVK")
|
||||
.map_io = mx28_map_io,
|
||||
.init_irq = mx28_init_irq,
|
||||
.init_machine = m28evk_init,
|
||||
.timer = &m28evk_timer,
|
||||
.init_machine = m28evk_init,
|
||||
MACHINE_END
|
||||
|
|
|
@ -115,6 +115,6 @@ static struct sys_timer stmp378x_dvb_timer = {
|
|||
MACHINE_START(STMP378X, "STMP378X")
|
||||
.map_io = mx23_map_io,
|
||||
.init_irq = mx23_init_irq,
|
||||
.init_machine = stmp378x_dvb_init,
|
||||
.timer = &stmp378x_dvb_timer,
|
||||
.init_machine = stmp378x_dvb_init,
|
||||
MACHINE_END
|
||||
|
|
|
@ -66,11 +66,11 @@ static const iomux_cfg_t tx28_fec1_pads[] __initconst = {
|
|||
MX28_PAD_ENET0_CRS__ENET1_RX_EN,
|
||||
};
|
||||
|
||||
static struct fec_platform_data tx28_fec0_data = {
|
||||
static const struct fec_platform_data tx28_fec0_data __initconst = {
|
||||
.phy = PHY_INTERFACE_MODE_RMII,
|
||||
};
|
||||
|
||||
static struct fec_platform_data tx28_fec1_data = {
|
||||
static const struct fec_platform_data tx28_fec1_data __initconst = {
|
||||
.phy = PHY_INTERFACE_MODE_RMII,
|
||||
};
|
||||
|
||||
|
|
|
@ -16,6 +16,8 @@
|
|||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/cpufreq.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/io.h>
|
||||
|
||||
#include <asm/mach-types.h> /* for machine_is_* */
|
||||
|
@ -927,16 +929,22 @@ int __init omap1_clk_init(void)
|
|||
|
||||
void __init omap1_clk_late_init(void)
|
||||
{
|
||||
if (ck_dpll1.rate >= OMAP1_DPLL1_SANE_VALUE)
|
||||
unsigned long rate = ck_dpll1.rate;
|
||||
|
||||
if (rate >= OMAP1_DPLL1_SANE_VALUE)
|
||||
return;
|
||||
|
||||
/* System booting at unusable rate, force reprogramming of DPLL1 */
|
||||
ck_dpll1_p->rate = 0;
|
||||
|
||||
/* Find the highest supported frequency and enable it */
|
||||
if (omap1_select_table_rate(&virtual_ck_mpu, ~0)) {
|
||||
pr_err("System frequencies not set, using default. Check your config.\n");
|
||||
omap_writew(0x2290, DPLL_CTL);
|
||||
omap_writew(cpu_is_omap7xx() ? 0x3005 : 0x1005, ARM_CKCTL);
|
||||
omap_writew(cpu_is_omap7xx() ? 0x2005 : 0x0005, ARM_CKCTL);
|
||||
ck_dpll1.rate = OMAP1_DPLL1_SANE_VALUE;
|
||||
}
|
||||
propagate_rate(&ck_dpll1);
|
||||
omap1_show_rates();
|
||||
loops_per_jiffy = cpufreq_scale(loops_per_jiffy, rate, ck_dpll1.rate);
|
||||
}
|
||||
|
|
|
@ -193,7 +193,7 @@ static struct platform_device rx51_charger_device = {
|
|||
static void __init rx51_charger_init(void)
|
||||
{
|
||||
WARN_ON(gpio_request_one(RX51_USB_TRANSCEIVER_RST_GPIO,
|
||||
GPIOF_OUT_INIT_LOW, "isp1704_reset"));
|
||||
GPIOF_OUT_INIT_HIGH, "isp1704_reset"));
|
||||
|
||||
platform_device_register(&rx51_charger_device);
|
||||
}
|
||||
|
|
|
@ -2480,6 +2480,16 @@ static struct clk uart4_fck = {
|
|||
.recalc = &followparent_recalc,
|
||||
};
|
||||
|
||||
static struct clk uart4_fck_am35xx = {
|
||||
.name = "uart4_fck",
|
||||
.ops = &clkops_omap2_dflt_wait,
|
||||
.parent = &per_48m_fck,
|
||||
.enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
|
||||
.enable_bit = OMAP3430_EN_UART4_SHIFT,
|
||||
.clkdm_name = "core_l4_clkdm",
|
||||
.recalc = &followparent_recalc,
|
||||
};
|
||||
|
||||
static struct clk gpt2_fck = {
|
||||
.name = "gpt2_fck",
|
||||
.ops = &clkops_omap2_dflt_wait,
|
||||
|
@ -3403,6 +3413,7 @@ static struct omap_clk omap3xxx_clks[] = {
|
|||
CLK(NULL, "per_48m_fck", &per_48m_fck, CK_3XXX),
|
||||
CLK(NULL, "uart3_fck", &uart3_fck, CK_3XXX),
|
||||
CLK(NULL, "uart4_fck", &uart4_fck, CK_36XX),
|
||||
CLK(NULL, "uart4_fck", &uart4_fck_am35xx, CK_3505 | CK_3517),
|
||||
CLK(NULL, "gpt2_fck", &gpt2_fck, CK_3XXX),
|
||||
CLK(NULL, "gpt3_fck", &gpt3_fck, CK_3XXX),
|
||||
CLK(NULL, "gpt4_fck", &gpt4_fck, CK_3XXX),
|
||||
|
|
|
@ -145,6 +145,9 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
|
|||
pdata->reg_size = 4;
|
||||
pdata->has_ccr = true;
|
||||
}
|
||||
pdata->set_clk_src = omap2_mcbsp_set_clk_src;
|
||||
if (id == 1)
|
||||
pdata->mux_signal = omap2_mcbsp1_mux_rx_clk;
|
||||
|
||||
if (oh->class->rev == MCBSP_CONFIG_TYPE3) {
|
||||
if (id == 2)
|
||||
|
@ -174,9 +177,6 @@ static int omap_init_mcbsp(struct omap_hwmod *oh, void *unused)
|
|||
name, oh->name);
|
||||
return PTR_ERR(pdev);
|
||||
}
|
||||
pdata->set_clk_src = omap2_mcbsp_set_clk_src;
|
||||
if (id == 1)
|
||||
pdata->mux_signal = omap2_mcbsp1_mux_rx_clk;
|
||||
omap_mcbsp_count++;
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -84,6 +84,8 @@ static struct omap_hwmod omap3xxx_mcbsp4_hwmod;
|
|||
static struct omap_hwmod omap3xxx_mcbsp5_hwmod;
|
||||
static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod;
|
||||
static struct omap_hwmod omap3xxx_mcbsp3_sidetone_hwmod;
|
||||
static struct omap_hwmod omap3xxx_usb_host_hs_hwmod;
|
||||
static struct omap_hwmod omap3xxx_usb_tll_hs_hwmod;
|
||||
|
||||
/* L3 -> L4_CORE interface */
|
||||
static struct omap_hwmod_ocp_if omap3xxx_l3_main__l4_core = {
|
||||
|
@ -164,6 +166,7 @@ static struct omap_hwmod omap3xxx_uart1_hwmod;
|
|||
static struct omap_hwmod omap3xxx_uart2_hwmod;
|
||||
static struct omap_hwmod omap3xxx_uart3_hwmod;
|
||||
static struct omap_hwmod omap3xxx_uart4_hwmod;
|
||||
static struct omap_hwmod am35xx_uart4_hwmod;
|
||||
static struct omap_hwmod omap3xxx_usbhsotg_hwmod;
|
||||
|
||||
/* l3_core -> usbhsotg interface */
|
||||
|
@ -299,6 +302,23 @@ static struct omap_hwmod_ocp_if omap3_l4_per__uart4 = {
|
|||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
/* AM35xx: L4 CORE -> UART4 interface */
|
||||
static struct omap_hwmod_addr_space am35xx_uart4_addr_space[] = {
|
||||
{
|
||||
.pa_start = OMAP3_UART4_AM35XX_BASE,
|
||||
.pa_end = OMAP3_UART4_AM35XX_BASE + SZ_1K - 1,
|
||||
.flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT,
|
||||
},
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if am35xx_l4_core__uart4 = {
|
||||
.master = &omap3xxx_l4_core_hwmod,
|
||||
.slave = &am35xx_uart4_hwmod,
|
||||
.clk = "uart4_ick",
|
||||
.addr = am35xx_uart4_addr_space,
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
/* L4 CORE -> I2C1 interface */
|
||||
static struct omap_hwmod_ocp_if omap3_l4_core__i2c1 = {
|
||||
.master = &omap3xxx_l4_core_hwmod,
|
||||
|
@ -1162,6 +1182,7 @@ static struct omap_hwmod_class_sysconfig i2c_sysc = {
|
|||
SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
|
||||
SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS),
|
||||
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
|
||||
.clockact = CLOCKACT_TEST_ICLK,
|
||||
.sysc_fields = &omap_hwmod_sysc_type1,
|
||||
};
|
||||
|
||||
|
@ -1309,6 +1330,39 @@ static struct omap_hwmod omap3xxx_uart4_hwmod = {
|
|||
.class = &omap2_uart_class,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_irq_info am35xx_uart4_mpu_irqs[] = {
|
||||
{ .irq = INT_35XX_UART4_IRQ, },
|
||||
};
|
||||
|
||||
static struct omap_hwmod_dma_info am35xx_uart4_sdma_reqs[] = {
|
||||
{ .name = "rx", .dma_req = AM35XX_DMA_UART4_RX, },
|
||||
{ .name = "tx", .dma_req = AM35XX_DMA_UART4_TX, },
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if *am35xx_uart4_slaves[] = {
|
||||
&am35xx_l4_core__uart4,
|
||||
};
|
||||
|
||||
static struct omap_hwmod am35xx_uart4_hwmod = {
|
||||
.name = "uart4",
|
||||
.mpu_irqs = am35xx_uart4_mpu_irqs,
|
||||
.sdma_reqs = am35xx_uart4_sdma_reqs,
|
||||
.main_clk = "uart4_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
.module_offs = CORE_MOD,
|
||||
.prcm_reg_id = 1,
|
||||
.module_bit = OMAP3430_EN_UART4_SHIFT,
|
||||
.idlest_reg_id = 1,
|
||||
.idlest_idle_bit = OMAP3430_EN_UART4_SHIFT,
|
||||
},
|
||||
},
|
||||
.slaves = am35xx_uart4_slaves,
|
||||
.slaves_cnt = ARRAY_SIZE(am35xx_uart4_slaves),
|
||||
.class = &omap2_uart_class,
|
||||
};
|
||||
|
||||
|
||||
static struct omap_hwmod_class i2c_class = {
|
||||
.name = "i2c",
|
||||
.sysc = &i2c_sysc,
|
||||
|
@ -1636,7 +1690,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c1_slaves[] = {
|
|||
|
||||
static struct omap_hwmod omap3xxx_i2c1_hwmod = {
|
||||
.name = "i2c1",
|
||||
.flags = HWMOD_16BIT_REG,
|
||||
.flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
|
||||
.mpu_irqs = omap2_i2c1_mpu_irqs,
|
||||
.sdma_reqs = omap2_i2c1_sdma_reqs,
|
||||
.main_clk = "i2c1_fck",
|
||||
|
@ -1670,7 +1724,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c2_slaves[] = {
|
|||
|
||||
static struct omap_hwmod omap3xxx_i2c2_hwmod = {
|
||||
.name = "i2c2",
|
||||
.flags = HWMOD_16BIT_REG,
|
||||
.flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
|
||||
.mpu_irqs = omap2_i2c2_mpu_irqs,
|
||||
.sdma_reqs = omap2_i2c2_sdma_reqs,
|
||||
.main_clk = "i2c2_fck",
|
||||
|
@ -1715,7 +1769,7 @@ static struct omap_hwmod_ocp_if *omap3xxx_i2c3_slaves[] = {
|
|||
|
||||
static struct omap_hwmod omap3xxx_i2c3_hwmod = {
|
||||
.name = "i2c3",
|
||||
.flags = HWMOD_16BIT_REG,
|
||||
.flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
|
||||
.mpu_irqs = i2c3_mpu_irqs,
|
||||
.sdma_reqs = i2c3_sdma_reqs,
|
||||
.main_clk = "i2c3_fck",
|
||||
|
@ -3072,7 +3126,35 @@ static struct omap_mmc_dev_attr mmc1_dev_attr = {
|
|||
.flags = OMAP_HSMMC_SUPPORTS_DUAL_VOLT,
|
||||
};
|
||||
|
||||
static struct omap_hwmod omap3xxx_mmc1_hwmod = {
|
||||
/* See 35xx errata 2.1.1.128 in SPRZ278F */
|
||||
static struct omap_mmc_dev_attr mmc1_pre_es3_dev_attr = {
|
||||
.flags = (OMAP_HSMMC_SUPPORTS_DUAL_VOLT |
|
||||
OMAP_HSMMC_BROKEN_MULTIBLOCK_READ),
|
||||
};
|
||||
|
||||
static struct omap_hwmod omap3xxx_pre_es3_mmc1_hwmod = {
|
||||
.name = "mmc1",
|
||||
.mpu_irqs = omap34xx_mmc1_mpu_irqs,
|
||||
.sdma_reqs = omap34xx_mmc1_sdma_reqs,
|
||||
.opt_clks = omap34xx_mmc1_opt_clks,
|
||||
.opt_clks_cnt = ARRAY_SIZE(omap34xx_mmc1_opt_clks),
|
||||
.main_clk = "mmchs1_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
.module_offs = CORE_MOD,
|
||||
.prcm_reg_id = 1,
|
||||
.module_bit = OMAP3430_EN_MMC1_SHIFT,
|
||||
.idlest_reg_id = 1,
|
||||
.idlest_idle_bit = OMAP3430_ST_MMC1_SHIFT,
|
||||
},
|
||||
},
|
||||
.dev_attr = &mmc1_pre_es3_dev_attr,
|
||||
.slaves = omap3xxx_mmc1_slaves,
|
||||
.slaves_cnt = ARRAY_SIZE(omap3xxx_mmc1_slaves),
|
||||
.class = &omap34xx_mmc_class,
|
||||
};
|
||||
|
||||
static struct omap_hwmod omap3xxx_es3plus_mmc1_hwmod = {
|
||||
.name = "mmc1",
|
||||
.mpu_irqs = omap34xx_mmc1_mpu_irqs,
|
||||
.sdma_reqs = omap34xx_mmc1_sdma_reqs,
|
||||
|
@ -3115,7 +3197,34 @@ static struct omap_hwmod_ocp_if *omap3xxx_mmc2_slaves[] = {
|
|||
&omap3xxx_l4_core__mmc2,
|
||||
};
|
||||
|
||||
static struct omap_hwmod omap3xxx_mmc2_hwmod = {
|
||||
/* See 35xx errata 2.1.1.128 in SPRZ278F */
|
||||
static struct omap_mmc_dev_attr mmc2_pre_es3_dev_attr = {
|
||||
.flags = OMAP_HSMMC_BROKEN_MULTIBLOCK_READ,
|
||||
};
|
||||
|
||||
static struct omap_hwmod omap3xxx_pre_es3_mmc2_hwmod = {
|
||||
.name = "mmc2",
|
||||
.mpu_irqs = omap34xx_mmc2_mpu_irqs,
|
||||
.sdma_reqs = omap34xx_mmc2_sdma_reqs,
|
||||
.opt_clks = omap34xx_mmc2_opt_clks,
|
||||
.opt_clks_cnt = ARRAY_SIZE(omap34xx_mmc2_opt_clks),
|
||||
.main_clk = "mmchs2_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
.module_offs = CORE_MOD,
|
||||
.prcm_reg_id = 1,
|
||||
.module_bit = OMAP3430_EN_MMC2_SHIFT,
|
||||
.idlest_reg_id = 1,
|
||||
.idlest_idle_bit = OMAP3430_ST_MMC2_SHIFT,
|
||||
},
|
||||
},
|
||||
.dev_attr = &mmc2_pre_es3_dev_attr,
|
||||
.slaves = omap3xxx_mmc2_slaves,
|
||||
.slaves_cnt = ARRAY_SIZE(omap3xxx_mmc2_slaves),
|
||||
.class = &omap34xx_mmc_class,
|
||||
};
|
||||
|
||||
static struct omap_hwmod omap3xxx_es3plus_mmc2_hwmod = {
|
||||
.name = "mmc2",
|
||||
.mpu_irqs = omap34xx_mmc2_mpu_irqs,
|
||||
.sdma_reqs = omap34xx_mmc2_sdma_reqs,
|
||||
|
@ -3177,13 +3286,223 @@ static struct omap_hwmod omap3xxx_mmc3_hwmod = {
|
|||
.class = &omap34xx_mmc_class,
|
||||
};
|
||||
|
||||
/*
|
||||
* 'usb_host_hs' class
|
||||
* high-speed multi-port usb host controller
|
||||
*/
|
||||
static struct omap_hwmod_ocp_if omap3xxx_usb_host_hs__l3_main_2 = {
|
||||
.master = &omap3xxx_usb_host_hs_hwmod,
|
||||
.slave = &omap3xxx_l3_main_hwmod,
|
||||
.clk = "core_l3_ick",
|
||||
.user = OCP_USER_MPU,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_class_sysconfig omap3xxx_usb_host_hs_sysc = {
|
||||
.rev_offs = 0x0000,
|
||||
.sysc_offs = 0x0010,
|
||||
.syss_offs = 0x0014,
|
||||
.sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_CLOCKACTIVITY |
|
||||
SYSC_HAS_SIDLEMODE | SYSC_HAS_ENAWAKEUP |
|
||||
SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
|
||||
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
|
||||
MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART),
|
||||
.sysc_fields = &omap_hwmod_sysc_type1,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_class omap3xxx_usb_host_hs_hwmod_class = {
|
||||
.name = "usb_host_hs",
|
||||
.sysc = &omap3xxx_usb_host_hs_sysc,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if *omap3xxx_usb_host_hs_masters[] = {
|
||||
&omap3xxx_usb_host_hs__l3_main_2,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_addr_space omap3xxx_usb_host_hs_addrs[] = {
|
||||
{
|
||||
.name = "uhh",
|
||||
.pa_start = 0x48064000,
|
||||
.pa_end = 0x480643ff,
|
||||
.flags = ADDR_TYPE_RT
|
||||
},
|
||||
{
|
||||
.name = "ohci",
|
||||
.pa_start = 0x48064400,
|
||||
.pa_end = 0x480647ff,
|
||||
},
|
||||
{
|
||||
.name = "ehci",
|
||||
.pa_start = 0x48064800,
|
||||
.pa_end = 0x48064cff,
|
||||
},
|
||||
{}
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if omap3xxx_l4_core__usb_host_hs = {
|
||||
.master = &omap3xxx_l4_core_hwmod,
|
||||
.slave = &omap3xxx_usb_host_hs_hwmod,
|
||||
.clk = "usbhost_ick",
|
||||
.addr = omap3xxx_usb_host_hs_addrs,
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if *omap3xxx_usb_host_hs_slaves[] = {
|
||||
&omap3xxx_l4_core__usb_host_hs,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_opt_clk omap3xxx_usb_host_hs_opt_clks[] = {
|
||||
{ .role = "ehci_logic_fck", .clk = "usbhost_120m_fck", },
|
||||
};
|
||||
|
||||
static struct omap_hwmod_irq_info omap3xxx_usb_host_hs_irqs[] = {
|
||||
{ .name = "ohci-irq", .irq = 76 },
|
||||
{ .name = "ehci-irq", .irq = 77 },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod omap3xxx_usb_host_hs_hwmod = {
|
||||
.name = "usb_host_hs",
|
||||
.class = &omap3xxx_usb_host_hs_hwmod_class,
|
||||
.clkdm_name = "l3_init_clkdm",
|
||||
.mpu_irqs = omap3xxx_usb_host_hs_irqs,
|
||||
.main_clk = "usbhost_48m_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
.module_offs = OMAP3430ES2_USBHOST_MOD,
|
||||
.prcm_reg_id = 1,
|
||||
.module_bit = OMAP3430ES2_EN_USBHOST1_SHIFT,
|
||||
.idlest_reg_id = 1,
|
||||
.idlest_idle_bit = OMAP3430ES2_ST_USBHOST_IDLE_SHIFT,
|
||||
.idlest_stdby_bit = OMAP3430ES2_ST_USBHOST_STDBY_SHIFT,
|
||||
},
|
||||
},
|
||||
.opt_clks = omap3xxx_usb_host_hs_opt_clks,
|
||||
.opt_clks_cnt = ARRAY_SIZE(omap3xxx_usb_host_hs_opt_clks),
|
||||
.slaves = omap3xxx_usb_host_hs_slaves,
|
||||
.slaves_cnt = ARRAY_SIZE(omap3xxx_usb_host_hs_slaves),
|
||||
.masters = omap3xxx_usb_host_hs_masters,
|
||||
.masters_cnt = ARRAY_SIZE(omap3xxx_usb_host_hs_masters),
|
||||
|
||||
/*
|
||||
* Errata: USBHOST Configured In Smart-Idle Can Lead To a Deadlock
|
||||
* id: i660
|
||||
*
|
||||
* Description:
|
||||
* In the following configuration :
|
||||
* - USBHOST module is set to smart-idle mode
|
||||
* - PRCM asserts idle_req to the USBHOST module ( This typically
|
||||
* happens when the system is going to a low power mode : all ports
|
||||
* have been suspended, the master part of the USBHOST module has
|
||||
* entered the standby state, and SW has cut the functional clocks)
|
||||
* - an USBHOST interrupt occurs before the module is able to answer
|
||||
* idle_ack, typically a remote wakeup IRQ.
|
||||
* Then the USB HOST module will enter a deadlock situation where it
|
||||
* is no more accessible nor functional.
|
||||
*
|
||||
* Workaround:
|
||||
* Don't use smart idle; use only force idle, hence HWMOD_SWSUP_SIDLE
|
||||
*/
|
||||
|
||||
/*
|
||||
* Errata: USB host EHCI may stall when entering smart-standby mode
|
||||
* Id: i571
|
||||
*
|
||||
* Description:
|
||||
* When the USBHOST module is set to smart-standby mode, and when it is
|
||||
* ready to enter the standby state (i.e. all ports are suspended and
|
||||
* all attached devices are in suspend mode), then it can wrongly assert
|
||||
* the Mstandby signal too early while there are still some residual OCP
|
||||
* transactions ongoing. If this condition occurs, the internal state
|
||||
* machine may go to an undefined state and the USB link may be stuck
|
||||
* upon the next resume.
|
||||
*
|
||||
* Workaround:
|
||||
* Don't use smart standby; use only force standby,
|
||||
* hence HWMOD_SWSUP_MSTANDBY
|
||||
*/
|
||||
|
||||
/*
|
||||
* During system boot; If the hwmod framework resets the module
|
||||
* the module will have smart idle settings; which can lead to deadlock
|
||||
* (above Errata Id:i660); so, dont reset the module during boot;
|
||||
* Use HWMOD_INIT_NO_RESET.
|
||||
*/
|
||||
|
||||
.flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY |
|
||||
HWMOD_INIT_NO_RESET,
|
||||
};
|
||||
|
||||
/*
|
||||
* 'usb_tll_hs' class
|
||||
* usb_tll_hs module is the adapter on the usb_host_hs ports
|
||||
*/
|
||||
static struct omap_hwmod_class_sysconfig omap3xxx_usb_tll_hs_sysc = {
|
||||
.rev_offs = 0x0000,
|
||||
.sysc_offs = 0x0010,
|
||||
.syss_offs = 0x0014,
|
||||
.sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |
|
||||
SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
|
||||
SYSC_HAS_AUTOIDLE),
|
||||
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
|
||||
.sysc_fields = &omap_hwmod_sysc_type1,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_class omap3xxx_usb_tll_hs_hwmod_class = {
|
||||
.name = "usb_tll_hs",
|
||||
.sysc = &omap3xxx_usb_tll_hs_sysc,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_irq_info omap3xxx_usb_tll_hs_irqs[] = {
|
||||
{ .name = "tll-irq", .irq = 78 },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_addr_space omap3xxx_usb_tll_hs_addrs[] = {
|
||||
{
|
||||
.name = "tll",
|
||||
.pa_start = 0x48062000,
|
||||
.pa_end = 0x48062fff,
|
||||
.flags = ADDR_TYPE_RT
|
||||
},
|
||||
{}
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if omap3xxx_l4_core__usb_tll_hs = {
|
||||
.master = &omap3xxx_l4_core_hwmod,
|
||||
.slave = &omap3xxx_usb_tll_hs_hwmod,
|
||||
.clk = "usbtll_ick",
|
||||
.addr = omap3xxx_usb_tll_hs_addrs,
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if *omap3xxx_usb_tll_hs_slaves[] = {
|
||||
&omap3xxx_l4_core__usb_tll_hs,
|
||||
};
|
||||
|
||||
static struct omap_hwmod omap3xxx_usb_tll_hs_hwmod = {
|
||||
.name = "usb_tll_hs",
|
||||
.class = &omap3xxx_usb_tll_hs_hwmod_class,
|
||||
.clkdm_name = "l3_init_clkdm",
|
||||
.mpu_irqs = omap3xxx_usb_tll_hs_irqs,
|
||||
.main_clk = "usbtll_fck",
|
||||
.prcm = {
|
||||
.omap2 = {
|
||||
.module_offs = CORE_MOD,
|
||||
.prcm_reg_id = 3,
|
||||
.module_bit = OMAP3430ES2_EN_USBTLL_SHIFT,
|
||||
.idlest_reg_id = 3,
|
||||
.idlest_idle_bit = OMAP3430ES2_ST_USBTLL_SHIFT,
|
||||
},
|
||||
},
|
||||
.slaves = omap3xxx_usb_tll_hs_slaves,
|
||||
.slaves_cnt = ARRAY_SIZE(omap3xxx_usb_tll_hs_slaves),
|
||||
};
|
||||
|
||||
static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
|
||||
&omap3xxx_l3_main_hwmod,
|
||||
&omap3xxx_l4_core_hwmod,
|
||||
&omap3xxx_l4_per_hwmod,
|
||||
&omap3xxx_l4_wkup_hwmod,
|
||||
&omap3xxx_mmc1_hwmod,
|
||||
&omap3xxx_mmc2_hwmod,
|
||||
&omap3xxx_mmc3_hwmod,
|
||||
&omap3xxx_mpu_hwmod,
|
||||
|
||||
|
@ -3198,12 +3517,12 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
|
|||
&omap3xxx_timer9_hwmod,
|
||||
&omap3xxx_timer10_hwmod,
|
||||
&omap3xxx_timer11_hwmod,
|
||||
&omap3xxx_timer12_hwmod,
|
||||
|
||||
&omap3xxx_wd_timer2_hwmod,
|
||||
&omap3xxx_uart1_hwmod,
|
||||
&omap3xxx_uart2_hwmod,
|
||||
&omap3xxx_uart3_hwmod,
|
||||
|
||||
/* dss class */
|
||||
&omap3xxx_dss_dispc_hwmod,
|
||||
&omap3xxx_dss_dsi1_hwmod,
|
||||
|
@ -3245,20 +3564,38 @@ static __initdata struct omap_hwmod *omap3xxx_hwmods[] = {
|
|||
NULL,
|
||||
};
|
||||
|
||||
/* GP-only hwmods */
|
||||
static __initdata struct omap_hwmod *omap3xxx_gp_hwmods[] = {
|
||||
&omap3xxx_timer12_hwmod,
|
||||
NULL
|
||||
};
|
||||
|
||||
/* 3430ES1-only hwmods */
|
||||
static __initdata struct omap_hwmod *omap3430es1_hwmods[] = {
|
||||
&omap3xxx_iva_hwmod,
|
||||
&omap3430es1_dss_core_hwmod,
|
||||
&omap3xxx_mailbox_hwmod,
|
||||
NULL
|
||||
};
|
||||
|
||||
/* 3430ES2+-only hwmods */
|
||||
static __initdata struct omap_hwmod *omap3430es2plus_hwmods[] = {
|
||||
&omap3xxx_iva_hwmod,
|
||||
&omap3xxx_dss_core_hwmod,
|
||||
&omap3xxx_usbhsotg_hwmod,
|
||||
&omap3xxx_mailbox_hwmod,
|
||||
&omap3xxx_usb_host_hs_hwmod,
|
||||
&omap3xxx_usb_tll_hs_hwmod,
|
||||
NULL
|
||||
};
|
||||
|
||||
/* <= 3430ES3-only hwmods */
|
||||
static struct omap_hwmod *omap3430_pre_es3_hwmods[] __initdata = {
|
||||
&omap3xxx_pre_es3_mmc1_hwmod,
|
||||
&omap3xxx_pre_es3_mmc2_hwmod,
|
||||
NULL
|
||||
};
|
||||
|
||||
/* 3430ES3+-only hwmods */
|
||||
static struct omap_hwmod *omap3430_es3plus_hwmods[] __initdata = {
|
||||
&omap3xxx_es3plus_mmc1_hwmod,
|
||||
&omap3xxx_es3plus_mmc2_hwmod,
|
||||
NULL
|
||||
};
|
||||
|
||||
|
@ -3280,12 +3617,21 @@ static __initdata struct omap_hwmod *omap36xx_hwmods[] = {
|
|||
&omap36xx_sr2_hwmod,
|
||||
&omap3xxx_usbhsotg_hwmod,
|
||||
&omap3xxx_mailbox_hwmod,
|
||||
&omap3xxx_usb_host_hs_hwmod,
|
||||
&omap3xxx_usb_tll_hs_hwmod,
|
||||
&omap3xxx_es3plus_mmc1_hwmod,
|
||||
&omap3xxx_es3plus_mmc2_hwmod,
|
||||
NULL
|
||||
};
|
||||
|
||||
static __initdata struct omap_hwmod *am35xx_hwmods[] = {
|
||||
&omap3xxx_dss_core_hwmod, /* XXX ??? */
|
||||
&am35xx_usbhsotg_hwmod,
|
||||
&am35xx_uart4_hwmod,
|
||||
&omap3xxx_usb_host_hs_hwmod,
|
||||
&omap3xxx_usb_tll_hs_hwmod,
|
||||
&omap3xxx_es3plus_mmc1_hwmod,
|
||||
&omap3xxx_es3plus_mmc2_hwmod,
|
||||
NULL
|
||||
};
|
||||
|
||||
|
@ -3300,6 +3646,13 @@ int __init omap3xxx_hwmod_init(void)
|
|||
if (r < 0)
|
||||
return r;
|
||||
|
||||
/* Register GP-only hwmods. */
|
||||
if (omap_type() == OMAP2_DEVICE_TYPE_GP) {
|
||||
r = omap_hwmod_register(omap3xxx_gp_hwmods);
|
||||
if (r < 0)
|
||||
return r;
|
||||
}
|
||||
|
||||
rev = omap_rev();
|
||||
|
||||
/*
|
||||
|
@ -3338,6 +3691,21 @@ int __init omap3xxx_hwmod_init(void)
|
|||
h = omap3430es2plus_hwmods;
|
||||
};
|
||||
|
||||
if (h) {
|
||||
r = omap_hwmod_register(h);
|
||||
if (r < 0)
|
||||
return r;
|
||||
}
|
||||
|
||||
h = NULL;
|
||||
if (rev == OMAP3430_REV_ES1_0 || rev == OMAP3430_REV_ES2_0 ||
|
||||
rev == OMAP3430_REV_ES2_1) {
|
||||
h = omap3430_pre_es3_hwmods;
|
||||
} else if (rev == OMAP3430_REV_ES3_0 || rev == OMAP3430_REV_ES3_1 ||
|
||||
rev == OMAP3430_REV_ES3_1_2) {
|
||||
h = omap3430_es3plus_hwmods;
|
||||
};
|
||||
|
||||
if (h)
|
||||
r = omap_hwmod_register(h);
|
||||
|
||||
|
|
|
@ -70,6 +70,8 @@ static struct omap_hwmod omap44xx_mmc2_hwmod;
|
|||
static struct omap_hwmod omap44xx_mpu_hwmod;
|
||||
static struct omap_hwmod omap44xx_mpu_private_hwmod;
|
||||
static struct omap_hwmod omap44xx_usb_otg_hs_hwmod;
|
||||
static struct omap_hwmod omap44xx_usb_host_hs_hwmod;
|
||||
static struct omap_hwmod omap44xx_usb_tll_hs_hwmod;
|
||||
|
||||
/*
|
||||
* Interconnects omap_hwmod structures
|
||||
|
@ -2246,6 +2248,7 @@ static struct omap_hwmod_class_sysconfig omap44xx_i2c_sysc = {
|
|||
SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
|
||||
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
|
||||
SIDLE_SMART_WKUP),
|
||||
.clockact = CLOCKACT_TEST_ICLK,
|
||||
.sysc_fields = &omap_hwmod_sysc_type1,
|
||||
};
|
||||
|
||||
|
@ -2300,7 +2303,7 @@ static struct omap_hwmod omap44xx_i2c1_hwmod = {
|
|||
.name = "i2c1",
|
||||
.class = &omap44xx_i2c_hwmod_class,
|
||||
.clkdm_name = "l4_per_clkdm",
|
||||
.flags = HWMOD_16BIT_REG,
|
||||
.flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
|
||||
.mpu_irqs = omap44xx_i2c1_irqs,
|
||||
.sdma_reqs = omap44xx_i2c1_sdma_reqs,
|
||||
.main_clk = "i2c1_fck",
|
||||
|
@ -2356,7 +2359,7 @@ static struct omap_hwmod omap44xx_i2c2_hwmod = {
|
|||
.name = "i2c2",
|
||||
.class = &omap44xx_i2c_hwmod_class,
|
||||
.clkdm_name = "l4_per_clkdm",
|
||||
.flags = HWMOD_16BIT_REG,
|
||||
.flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
|
||||
.mpu_irqs = omap44xx_i2c2_irqs,
|
||||
.sdma_reqs = omap44xx_i2c2_sdma_reqs,
|
||||
.main_clk = "i2c2_fck",
|
||||
|
@ -2412,7 +2415,7 @@ static struct omap_hwmod omap44xx_i2c3_hwmod = {
|
|||
.name = "i2c3",
|
||||
.class = &omap44xx_i2c_hwmod_class,
|
||||
.clkdm_name = "l4_per_clkdm",
|
||||
.flags = HWMOD_16BIT_REG,
|
||||
.flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
|
||||
.mpu_irqs = omap44xx_i2c3_irqs,
|
||||
.sdma_reqs = omap44xx_i2c3_sdma_reqs,
|
||||
.main_clk = "i2c3_fck",
|
||||
|
@ -2468,7 +2471,7 @@ static struct omap_hwmod omap44xx_i2c4_hwmod = {
|
|||
.name = "i2c4",
|
||||
.class = &omap44xx_i2c_hwmod_class,
|
||||
.clkdm_name = "l4_per_clkdm",
|
||||
.flags = HWMOD_16BIT_REG,
|
||||
.flags = HWMOD_16BIT_REG | HWMOD_SET_DEFAULT_CLOCKACT,
|
||||
.mpu_irqs = omap44xx_i2c4_irqs,
|
||||
.sdma_reqs = omap44xx_i2c4_sdma_reqs,
|
||||
.main_clk = "i2c4_fck",
|
||||
|
@ -5276,6 +5279,207 @@ static struct omap_hwmod omap44xx_wd_timer3_hwmod = {
|
|||
.slaves_cnt = ARRAY_SIZE(omap44xx_wd_timer3_slaves),
|
||||
};
|
||||
|
||||
/*
|
||||
* 'usb_host_hs' class
|
||||
* high-speed multi-port usb host controller
|
||||
*/
|
||||
static struct omap_hwmod_ocp_if omap44xx_usb_host_hs__l3_main_2 = {
|
||||
.master = &omap44xx_usb_host_hs_hwmod,
|
||||
.slave = &omap44xx_l3_main_2_hwmod,
|
||||
.clk = "l3_div_ck",
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_class_sysconfig omap44xx_usb_host_hs_sysc = {
|
||||
.rev_offs = 0x0000,
|
||||
.sysc_offs = 0x0010,
|
||||
.syss_offs = 0x0014,
|
||||
.sysc_flags = (SYSC_HAS_MIDLEMODE | SYSC_HAS_SIDLEMODE |
|
||||
SYSC_HAS_SOFTRESET),
|
||||
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
|
||||
SIDLE_SMART_WKUP | MSTANDBY_FORCE | MSTANDBY_NO |
|
||||
MSTANDBY_SMART | MSTANDBY_SMART_WKUP),
|
||||
.sysc_fields = &omap_hwmod_sysc_type2,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_class omap44xx_usb_host_hs_hwmod_class = {
|
||||
.name = "usb_host_hs",
|
||||
.sysc = &omap44xx_usb_host_hs_sysc,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if *omap44xx_usb_host_hs_masters[] = {
|
||||
&omap44xx_usb_host_hs__l3_main_2,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_addr_space omap44xx_usb_host_hs_addrs[] = {
|
||||
{
|
||||
.name = "uhh",
|
||||
.pa_start = 0x4a064000,
|
||||
.pa_end = 0x4a0647ff,
|
||||
.flags = ADDR_TYPE_RT
|
||||
},
|
||||
{
|
||||
.name = "ohci",
|
||||
.pa_start = 0x4a064800,
|
||||
.pa_end = 0x4a064bff,
|
||||
},
|
||||
{
|
||||
.name = "ehci",
|
||||
.pa_start = 0x4a064c00,
|
||||
.pa_end = 0x4a064fff,
|
||||
},
|
||||
{}
|
||||
};
|
||||
|
||||
static struct omap_hwmod_irq_info omap44xx_usb_host_hs_irqs[] = {
|
||||
{ .name = "ohci-irq", .irq = 76 + OMAP44XX_IRQ_GIC_START },
|
||||
{ .name = "ehci-irq", .irq = 77 + OMAP44XX_IRQ_GIC_START },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_host_hs = {
|
||||
.master = &omap44xx_l4_cfg_hwmod,
|
||||
.slave = &omap44xx_usb_host_hs_hwmod,
|
||||
.clk = "l4_div_ck",
|
||||
.addr = omap44xx_usb_host_hs_addrs,
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if *omap44xx_usb_host_hs_slaves[] = {
|
||||
&omap44xx_l4_cfg__usb_host_hs,
|
||||
};
|
||||
|
||||
static struct omap_hwmod omap44xx_usb_host_hs_hwmod = {
|
||||
.name = "usb_host_hs",
|
||||
.class = &omap44xx_usb_host_hs_hwmod_class,
|
||||
.clkdm_name = "l3_init_clkdm",
|
||||
.main_clk = "usb_host_hs_fck",
|
||||
.prcm = {
|
||||
.omap4 = {
|
||||
.clkctrl_offs = OMAP4_CM_L3INIT_USB_HOST_CLKCTRL_OFFSET,
|
||||
.context_offs = OMAP4_RM_L3INIT_USB_HOST_CONTEXT_OFFSET,
|
||||
.modulemode = MODULEMODE_SWCTRL,
|
||||
},
|
||||
},
|
||||
.mpu_irqs = omap44xx_usb_host_hs_irqs,
|
||||
.slaves = omap44xx_usb_host_hs_slaves,
|
||||
.slaves_cnt = ARRAY_SIZE(omap44xx_usb_host_hs_slaves),
|
||||
.masters = omap44xx_usb_host_hs_masters,
|
||||
.masters_cnt = ARRAY_SIZE(omap44xx_usb_host_hs_masters),
|
||||
|
||||
/*
|
||||
* Errata: USBHOST Configured In Smart-Idle Can Lead To a Deadlock
|
||||
* id: i660
|
||||
*
|
||||
* Description:
|
||||
* In the following configuration :
|
||||
* - USBHOST module is set to smart-idle mode
|
||||
* - PRCM asserts idle_req to the USBHOST module ( This typically
|
||||
* happens when the system is going to a low power mode : all ports
|
||||
* have been suspended, the master part of the USBHOST module has
|
||||
* entered the standby state, and SW has cut the functional clocks)
|
||||
* - an USBHOST interrupt occurs before the module is able to answer
|
||||
* idle_ack, typically a remote wakeup IRQ.
|
||||
* Then the USB HOST module will enter a deadlock situation where it
|
||||
* is no more accessible nor functional.
|
||||
*
|
||||
* Workaround:
|
||||
* Don't use smart idle; use only force idle, hence HWMOD_SWSUP_SIDLE
|
||||
*/
|
||||
|
||||
/*
|
||||
* Errata: USB host EHCI may stall when entering smart-standby mode
|
||||
* Id: i571
|
||||
*
|
||||
* Description:
|
||||
* When the USBHOST module is set to smart-standby mode, and when it is
|
||||
* ready to enter the standby state (i.e. all ports are suspended and
|
||||
* all attached devices are in suspend mode), then it can wrongly assert
|
||||
* the Mstandby signal too early while there are still some residual OCP
|
||||
* transactions ongoing. If this condition occurs, the internal state
|
||||
* machine may go to an undefined state and the USB link may be stuck
|
||||
* upon the next resume.
|
||||
*
|
||||
* Workaround:
|
||||
* Don't use smart standby; use only force standby,
|
||||
* hence HWMOD_SWSUP_MSTANDBY
|
||||
*/
|
||||
|
||||
/*
|
||||
* During system boot; If the hwmod framework resets the module
|
||||
* the module will have smart idle settings; which can lead to deadlock
|
||||
* (above Errata Id:i660); so, dont reset the module during boot;
|
||||
* Use HWMOD_INIT_NO_RESET.
|
||||
*/
|
||||
|
||||
.flags = HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY |
|
||||
HWMOD_INIT_NO_RESET,
|
||||
};
|
||||
|
||||
/*
|
||||
* 'usb_tll_hs' class
|
||||
* usb_tll_hs module is the adapter on the usb_host_hs ports
|
||||
*/
|
||||
static struct omap_hwmod_class_sysconfig omap44xx_usb_tll_hs_sysc = {
|
||||
.rev_offs = 0x0000,
|
||||
.sysc_offs = 0x0010,
|
||||
.syss_offs = 0x0014,
|
||||
.sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |
|
||||
SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET |
|
||||
SYSC_HAS_AUTOIDLE),
|
||||
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
|
||||
.sysc_fields = &omap_hwmod_sysc_type1,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_class omap44xx_usb_tll_hs_hwmod_class = {
|
||||
.name = "usb_tll_hs",
|
||||
.sysc = &omap44xx_usb_tll_hs_sysc,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_irq_info omap44xx_usb_tll_hs_irqs[] = {
|
||||
{ .name = "tll-irq", .irq = 78 + OMAP44XX_IRQ_GIC_START },
|
||||
{ .irq = -1 }
|
||||
};
|
||||
|
||||
static struct omap_hwmod_addr_space omap44xx_usb_tll_hs_addrs[] = {
|
||||
{
|
||||
.name = "tll",
|
||||
.pa_start = 0x4a062000,
|
||||
.pa_end = 0x4a063fff,
|
||||
.flags = ADDR_TYPE_RT
|
||||
},
|
||||
{}
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if omap44xx_l4_cfg__usb_tll_hs = {
|
||||
.master = &omap44xx_l4_cfg_hwmod,
|
||||
.slave = &omap44xx_usb_tll_hs_hwmod,
|
||||
.clk = "l4_div_ck",
|
||||
.addr = omap44xx_usb_tll_hs_addrs,
|
||||
.user = OCP_USER_MPU | OCP_USER_SDMA,
|
||||
};
|
||||
|
||||
static struct omap_hwmod_ocp_if *omap44xx_usb_tll_hs_slaves[] = {
|
||||
&omap44xx_l4_cfg__usb_tll_hs,
|
||||
};
|
||||
|
||||
static struct omap_hwmod omap44xx_usb_tll_hs_hwmod = {
|
||||
.name = "usb_tll_hs",
|
||||
.class = &omap44xx_usb_tll_hs_hwmod_class,
|
||||
.clkdm_name = "l3_init_clkdm",
|
||||
.main_clk = "usb_tll_hs_ick",
|
||||
.prcm = {
|
||||
.omap4 = {
|
||||
.clkctrl_offs = OMAP4_CM_L3INIT_USB_TLL_CLKCTRL_OFFSET,
|
||||
.context_offs = OMAP4_RM_L3INIT_USB_TLL_CONTEXT_OFFSET,
|
||||
.modulemode = MODULEMODE_HWCTRL,
|
||||
},
|
||||
},
|
||||
.mpu_irqs = omap44xx_usb_tll_hs_irqs,
|
||||
.slaves = omap44xx_usb_tll_hs_slaves,
|
||||
.slaves_cnt = ARRAY_SIZE(omap44xx_usb_tll_hs_slaves),
|
||||
};
|
||||
|
||||
static __initdata struct omap_hwmod *omap44xx_hwmods[] = {
|
||||
|
||||
/* dmm class */
|
||||
|
@ -5415,13 +5619,16 @@ static __initdata struct omap_hwmod *omap44xx_hwmods[] = {
|
|||
&omap44xx_uart3_hwmod,
|
||||
&omap44xx_uart4_hwmod,
|
||||
|
||||
/* usb host class */
|
||||
&omap44xx_usb_host_hs_hwmod,
|
||||
&omap44xx_usb_tll_hs_hwmod,
|
||||
|
||||
/* usb_otg_hs class */
|
||||
&omap44xx_usb_otg_hs_hwmod,
|
||||
|
||||
/* wd_timer class */
|
||||
&omap44xx_wd_timer2_hwmod,
|
||||
&omap44xx_wd_timer3_hwmod,
|
||||
|
||||
NULL,
|
||||
};
|
||||
|
||||
|
|
|
@ -201,6 +201,8 @@
|
|||
#define OMAP3430_EN_MMC2_SHIFT 25
|
||||
#define OMAP3430_EN_MMC1_MASK (1 << 24)
|
||||
#define OMAP3430_EN_MMC1_SHIFT 24
|
||||
#define OMAP3430_EN_UART4_MASK (1 << 23)
|
||||
#define OMAP3430_EN_UART4_SHIFT 23
|
||||
#define OMAP3430_EN_MCSPI4_MASK (1 << 21)
|
||||
#define OMAP3430_EN_MCSPI4_SHIFT 21
|
||||
#define OMAP3430_EN_MCSPI3_MASK (1 << 20)
|
||||
|
|
|
@ -9,6 +9,7 @@
|
|||
#include <linux/kernel.h>
|
||||
#include <linux/suspend.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/of_device.h>
|
||||
|
|
|
@ -8,6 +8,7 @@
|
|||
|
||||
#include <linux/init.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <asm/sizes.h>
|
||||
#include <asm/mach-types.h>
|
||||
#include <asm/mach/arch.h>
|
||||
#include <linux/of.h>
|
||||
|
|
|
@ -10,6 +10,7 @@
|
|||
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/string.h>
|
||||
#include <linux/export.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/gpio.h>
|
||||
|
|
|
@ -70,7 +70,7 @@ void __init s3c6400_init_irq(void)
|
|||
s3c64xx_init_irq(~0 & ~(0xf << 5), ~0);
|
||||
}
|
||||
|
||||
struct sysdev_class s3c6400_sysclass = {
|
||||
static struct sysdev_class s3c6400_sysclass = {
|
||||
.name = "s3c6400-core",
|
||||
};
|
||||
|
||||
|
|
|
@ -20,7 +20,7 @@
|
|||
#include <plat/fb.h>
|
||||
#include <plat/gpio-cfg.h>
|
||||
|
||||
extern void s3c64xx_fb_gpio_setup_24bpp(void)
|
||||
void s3c64xx_fb_gpio_setup_24bpp(void)
|
||||
{
|
||||
s3c_gpio_cfgrange_nopull(S3C64XX_GPI(0), 16, S3C_GPIO_SFN(2));
|
||||
s3c_gpio_cfgrange_nopull(S3C64XX_GPJ(0), 12, S3C_GPIO_SFN(2));
|
||||
|
|
|
@ -1,5 +1,5 @@
|
|||
ifeq ($(CONFIG_ARCH_SA1100),y)
|
||||
zreladdr-$(CONFIG_SA1111) += 0xc0208000
|
||||
ifeq ($(CONFIG_SA1111),y)
|
||||
zreladdr-y += 0xc0208000
|
||||
else
|
||||
zreladdr-y += 0xc0008000
|
||||
endif
|
||||
|
|
|
@ -357,7 +357,7 @@
|
|||
#define INT_35XX_EMAC_C0_TX_PULSE_IRQ 69
|
||||
#define INT_35XX_EMAC_C0_MISC_PULSE_IRQ 70
|
||||
#define INT_35XX_USBOTG_IRQ 71
|
||||
#define INT_35XX_UART4 84
|
||||
#define INT_35XX_UART4_IRQ 84
|
||||
#define INT_35XX_CCDC_VD0_IRQ 88
|
||||
#define INT_35XX_CCDC_VD1_IRQ 92
|
||||
#define INT_35XX_CCDC_VD2_IRQ 93
|
||||
|
|
|
@ -44,6 +44,7 @@
|
|||
#define OMAP3_UART2_BASE OMAP2_UART2_BASE
|
||||
#define OMAP3_UART3_BASE 0x49020000
|
||||
#define OMAP3_UART4_BASE 0x49042000 /* Only on 36xx */
|
||||
#define OMAP3_UART4_AM35XX_BASE 0x4809E000 /* Only on AM35xx */
|
||||
|
||||
/* OMAP4 serial ports */
|
||||
#define OMAP4_UART1_BASE OMAP2_UART1_BASE
|
||||
|
|
|
@ -350,10 +350,12 @@
|
|||
#define __NR_clock_adjtime 342
|
||||
#define __NR_syncfs 343
|
||||
#define __NR_setns 344
|
||||
#define __NR_process_vm_readv 345
|
||||
#define __NR_process_vm_writev 346
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#define NR_syscalls 345
|
||||
#define NR_syscalls 347
|
||||
|
||||
#define __ARCH_WANT_IPC_PARSE_VERSION
|
||||
#define __ARCH_WANT_OLD_READDIR
|
||||
|
|
|
@ -365,4 +365,6 @@ ENTRY(sys_call_table)
|
|||
.long sys_clock_adjtime
|
||||
.long sys_syncfs
|
||||
.long sys_setns
|
||||
.long sys_process_vm_readv /* 345 */
|
||||
.long sys_process_vm_writev
|
||||
|
||||
|
|
|
@ -623,7 +623,7 @@ static int mipspmu_event_init(struct perf_event *event)
|
|||
if (!atomic_inc_not_zero(&active_events)) {
|
||||
if (atomic_read(&active_events) > MIPS_MAX_HWEVENTS) {
|
||||
atomic_dec(&active_events);
|
||||
return -ENOSPC;
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
mutex_lock(&pmu_reserve_mutex);
|
||||
|
@ -732,15 +732,15 @@ static int validate_group(struct perf_event *event)
|
|||
memset(&fake_cpuc, 0, sizeof(fake_cpuc));
|
||||
|
||||
if (!validate_event(&fake_cpuc, leader))
|
||||
return -ENOSPC;
|
||||
return -EINVAL;
|
||||
|
||||
list_for_each_entry(sibling, &leader->sibling_list, group_entry) {
|
||||
if (!validate_event(&fake_cpuc, sibling))
|
||||
return -ENOSPC;
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
if (!validate_event(&fake_cpuc, event))
|
||||
return -ENOSPC;
|
||||
return -EINVAL;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
@ -599,10 +599,10 @@ static inline pgste_t pgste_update_all(pte_t *ptep, pgste_t pgste)
|
|||
skey = page_get_storage_key(address);
|
||||
bits = skey & (_PAGE_CHANGED | _PAGE_REFERENCED);
|
||||
/* Clear page changed & referenced bit in the storage key */
|
||||
if (bits) {
|
||||
skey ^= bits;
|
||||
page_set_storage_key(address, skey, 1);
|
||||
}
|
||||
if (bits & _PAGE_CHANGED)
|
||||
page_set_storage_key(address, skey ^ bits, 1);
|
||||
else if (bits)
|
||||
page_reset_referenced(address);
|
||||
/* Transfer page changed & referenced bit to guest bits in pgste */
|
||||
pgste_val(pgste) |= bits << 48; /* RCP_GR_BIT & RCP_GC_BIT */
|
||||
/* Get host changed & referenced bits from pgste */
|
||||
|
|
|
@ -296,13 +296,6 @@ static int __poke_user(struct task_struct *child, addr_t addr, addr_t data)
|
|||
((data & PSW_MASK_EA) && !(data & PSW_MASK_BA))))
|
||||
/* Invalid psw mask. */
|
||||
return -EINVAL;
|
||||
if (addr == (addr_t) &dummy->regs.psw.addr)
|
||||
/*
|
||||
* The debugger changed the instruction address,
|
||||
* reset system call restart, see signal.c:do_signal
|
||||
*/
|
||||
task_thread_info(child)->system_call = 0;
|
||||
|
||||
*(addr_t *)((addr_t) &task_pt_regs(child)->psw + addr) = data;
|
||||
|
||||
} else if (addr < (addr_t) (&dummy->regs.orig_gpr2)) {
|
||||
|
@ -614,11 +607,6 @@ static int __poke_user_compat(struct task_struct *child,
|
|||
/* Transfer 31 bit amode bit to psw mask. */
|
||||
regs->psw.mask = (regs->psw.mask & ~PSW_MASK_BA) |
|
||||
(__u64)(tmp & PSW32_ADDR_AMODE);
|
||||
/*
|
||||
* The debugger changed the instruction address,
|
||||
* reset system call restart, see signal.c:do_signal
|
||||
*/
|
||||
task_thread_info(child)->system_call = 0;
|
||||
} else {
|
||||
/* gpr 0-15 */
|
||||
*(__u32*)((addr_t) ®s->psw + addr*2 + 4) = tmp;
|
||||
|
@ -905,6 +893,14 @@ static int s390_last_break_get(struct task_struct *target,
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int s390_last_break_set(struct task_struct *target,
|
||||
const struct user_regset *regset,
|
||||
unsigned int pos, unsigned int count,
|
||||
const void *kbuf, const void __user *ubuf)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
static int s390_system_call_get(struct task_struct *target,
|
||||
|
@ -951,6 +947,7 @@ static const struct user_regset s390_regsets[] = {
|
|||
.size = sizeof(long),
|
||||
.align = sizeof(long),
|
||||
.get = s390_last_break_get,
|
||||
.set = s390_last_break_set,
|
||||
},
|
||||
#endif
|
||||
[REGSET_SYSTEM_CALL] = {
|
||||
|
@ -1116,6 +1113,14 @@ static int s390_compat_last_break_get(struct task_struct *target,
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int s390_compat_last_break_set(struct task_struct *target,
|
||||
const struct user_regset *regset,
|
||||
unsigned int pos, unsigned int count,
|
||||
const void *kbuf, const void __user *ubuf)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct user_regset s390_compat_regsets[] = {
|
||||
[REGSET_GENERAL] = {
|
||||
.core_note_type = NT_PRSTATUS,
|
||||
|
@ -1139,6 +1144,7 @@ static const struct user_regset s390_compat_regsets[] = {
|
|||
.size = sizeof(long),
|
||||
.align = sizeof(long),
|
||||
.get = s390_compat_last_break_get,
|
||||
.set = s390_compat_last_break_set,
|
||||
},
|
||||
[REGSET_SYSTEM_CALL] = {
|
||||
.core_note_type = NT_S390_SYSTEM_CALL,
|
||||
|
|
|
@ -579,7 +579,7 @@ static unsigned long __init find_crash_base(unsigned long crash_size,
|
|||
*msg = "first memory chunk must be at least crashkernel size";
|
||||
return 0;
|
||||
}
|
||||
if (is_kdump_kernel() && (crash_size == OLDMEM_SIZE))
|
||||
if (OLDMEM_BASE && crash_size == OLDMEM_SIZE)
|
||||
return OLDMEM_BASE;
|
||||
|
||||
for (i = MEMORY_CHUNKS - 1; i >= 0; i--) {
|
||||
|
|
|
@ -460,9 +460,9 @@ void do_signal(struct pt_regs *regs)
|
|||
regs->svc_code >> 16);
|
||||
break;
|
||||
}
|
||||
/* No longer in a system call */
|
||||
clear_thread_flag(TIF_SYSCALL);
|
||||
}
|
||||
/* No longer in a system call */
|
||||
clear_thread_flag(TIF_SYSCALL);
|
||||
|
||||
if ((is_compat_task() ?
|
||||
handle_signal32(signr, &ka, &info, oldset, regs) :
|
||||
|
@ -486,6 +486,7 @@ void do_signal(struct pt_regs *regs)
|
|||
}
|
||||
|
||||
/* No handlers present - check for system call restart */
|
||||
clear_thread_flag(TIF_SYSCALL);
|
||||
if (current_thread_info()->system_call) {
|
||||
regs->svc_code = current_thread_info()->system_call;
|
||||
switch (regs->gprs[2]) {
|
||||
|
@ -500,9 +501,6 @@ void do_signal(struct pt_regs *regs)
|
|||
regs->gprs[2] = regs->orig_gpr2;
|
||||
set_thread_flag(TIF_SYSCALL);
|
||||
break;
|
||||
default:
|
||||
clear_thread_flag(TIF_SYSCALL);
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
@ -74,16 +74,6 @@ enum {
|
|||
*/
|
||||
void tile_irq_activate(unsigned int irq, int tile_irq_type);
|
||||
|
||||
/*
|
||||
* For onboard, non-PCI (e.g. TILE_IRQ_PERCPU) devices, drivers know
|
||||
* how to use enable/disable_percpu_irq() to manage interrupts on each
|
||||
* core. We can't use the generic enable/disable_irq() because they
|
||||
* use a single reference count per irq, rather than per cpu per irq.
|
||||
*/
|
||||
void enable_percpu_irq(unsigned int irq);
|
||||
void disable_percpu_irq(unsigned int irq);
|
||||
|
||||
|
||||
void setup_irq_regs(void);
|
||||
|
||||
#endif /* _ASM_TILE_IRQ_H */
|
||||
|
|
|
@ -152,14 +152,13 @@ void tile_dev_intr(struct pt_regs *regs, int intnum)
|
|||
* Remove an irq from the disabled mask. If we're in an interrupt
|
||||
* context, defer enabling the HW interrupt until we leave.
|
||||
*/
|
||||
void enable_percpu_irq(unsigned int irq)
|
||||
static void tile_irq_chip_enable(struct irq_data *d)
|
||||
{
|
||||
get_cpu_var(irq_disable_mask) &= ~(1UL << irq);
|
||||
get_cpu_var(irq_disable_mask) &= ~(1UL << d->irq);
|
||||
if (__get_cpu_var(irq_depth) == 0)
|
||||
unmask_irqs(1UL << irq);
|
||||
unmask_irqs(1UL << d->irq);
|
||||
put_cpu_var(irq_disable_mask);
|
||||
}
|
||||
EXPORT_SYMBOL(enable_percpu_irq);
|
||||
|
||||
/*
|
||||
* Add an irq to the disabled mask. We disable the HW interrupt
|
||||
|
@ -167,13 +166,12 @@ EXPORT_SYMBOL(enable_percpu_irq);
|
|||
* in an interrupt context, the return path is careful to avoid
|
||||
* unmasking a newly disabled interrupt.
|
||||
*/
|
||||
void disable_percpu_irq(unsigned int irq)
|
||||
static void tile_irq_chip_disable(struct irq_data *d)
|
||||
{
|
||||
get_cpu_var(irq_disable_mask) |= (1UL << irq);
|
||||
mask_irqs(1UL << irq);
|
||||
get_cpu_var(irq_disable_mask) |= (1UL << d->irq);
|
||||
mask_irqs(1UL << d->irq);
|
||||
put_cpu_var(irq_disable_mask);
|
||||
}
|
||||
EXPORT_SYMBOL(disable_percpu_irq);
|
||||
|
||||
/* Mask an interrupt. */
|
||||
static void tile_irq_chip_mask(struct irq_data *d)
|
||||
|
@ -209,6 +207,8 @@ static void tile_irq_chip_eoi(struct irq_data *d)
|
|||
|
||||
static struct irq_chip tile_irq_chip = {
|
||||
.name = "tile_irq_chip",
|
||||
.irq_enable = tile_irq_chip_enable,
|
||||
.irq_disable = tile_irq_chip_disable,
|
||||
.irq_ack = tile_irq_chip_ack,
|
||||
.irq_eoi = tile_irq_chip_eoi,
|
||||
.irq_mask = tile_irq_chip_mask,
|
||||
|
|
|
@ -15,6 +15,7 @@
|
|||
#include <linux/mm.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/vmalloc.h>
|
||||
#include <linux/export.h>
|
||||
#include <asm/tlbflush.h>
|
||||
#include <asm/homecache.h>
|
||||
|
||||
|
|
|
@ -24,6 +24,7 @@
|
|||
#include <linux/irq.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/uaccess.h>
|
||||
#include <linux/export.h>
|
||||
|
||||
#include <asm/processor.h>
|
||||
#include <asm/sections.h>
|
||||
|
|
|
@ -18,6 +18,7 @@
|
|||
#include <linux/cpu.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/smp.h>
|
||||
#include <linux/stat.h>
|
||||
#include <hv/hypervisor.h>
|
||||
|
||||
/* Return a string queried from the hypervisor, truncated to page size. */
|
||||
|
|
|
@ -39,6 +39,9 @@ EXPORT_SYMBOL(finv_user_asm);
|
|||
EXPORT_SYMBOL(current_text_addr);
|
||||
EXPORT_SYMBOL(dump_stack);
|
||||
|
||||
/* arch/tile/kernel/head.S */
|
||||
EXPORT_SYMBOL(empty_zero_page);
|
||||
|
||||
/* arch/tile/lib/, various memcpy files */
|
||||
EXPORT_SYMBOL(memcpy);
|
||||
EXPORT_SYMBOL(__copy_to_user_inatomic);
|
||||
|
|
|
@ -449,9 +449,12 @@ void homecache_free_pages(unsigned long addr, unsigned int order)
|
|||
VM_BUG_ON(!virt_addr_valid((void *)addr));
|
||||
page = virt_to_page((void *)addr);
|
||||
if (put_page_testzero(page)) {
|
||||
int pages = (1 << order);
|
||||
homecache_change_page_home(page, order, initial_page_home());
|
||||
while (pages--)
|
||||
__free_page(page++);
|
||||
if (order == 0) {
|
||||
free_hot_cold_page(page, 0);
|
||||
} else {
|
||||
init_page_count(page);
|
||||
__free_pages(page, order);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
@ -390,7 +390,7 @@ config X86_INTEL_CE
|
|||
This option compiles in support for the CE4100 SOC for settop
|
||||
boxes and media devices.
|
||||
|
||||
config X86_INTEL_MID
|
||||
config X86_WANT_INTEL_MID
|
||||
bool "Intel MID platform support"
|
||||
depends on X86_32
|
||||
depends on X86_EXTENDED_PLATFORM
|
||||
|
@ -399,7 +399,10 @@ config X86_INTEL_MID
|
|||
systems which do not have the PCI legacy interfaces (Moorestown,
|
||||
Medfield). If you are building for a PC class system say N here.
|
||||
|
||||
if X86_INTEL_MID
|
||||
if X86_WANT_INTEL_MID
|
||||
|
||||
config X86_INTEL_MID
|
||||
bool
|
||||
|
||||
config X86_MRST
|
||||
bool "Moorestown MID platform"
|
||||
|
@ -411,6 +414,7 @@ config X86_MRST
|
|||
select SPI
|
||||
select INTEL_SCU_IPC
|
||||
select X86_PLATFORM_DEVICES
|
||||
select X86_INTEL_MID
|
||||
---help---
|
||||
Moorestown is Intel's Low Power Intel Architecture (LPIA) based Moblin
|
||||
Internet Device(MID) platform. Moorestown consists of two chips:
|
||||
|
|
|
@ -53,6 +53,13 @@
|
|||
*/
|
||||
#define E820_RESERVED_KERN 128
|
||||
|
||||
/*
|
||||
* Address ranges that need to be mapped by the kernel direct
|
||||
* mapping. This is used to make sure regions such as
|
||||
* EFI_RUNTIME_SERVICES_DATA are directly mapped. See setup_arch().
|
||||
*/
|
||||
#define E820_RESERVED_EFI 129
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
#include <linux/types.h>
|
||||
struct e820entry {
|
||||
|
@ -115,6 +122,7 @@ static inline void early_memtest(unsigned long start, unsigned long end)
|
|||
}
|
||||
#endif
|
||||
|
||||
extern unsigned long e820_end_pfn(unsigned long limit_pfn, unsigned type);
|
||||
extern unsigned long e820_end_of_ram_pfn(void);
|
||||
extern unsigned long e820_end_of_low_ram_pfn(void);
|
||||
extern u64 early_reserve_e820(u64 startt, u64 sizet, u64 align);
|
||||
|
|
|
@ -33,8 +33,6 @@ extern unsigned long asmlinkage efi_call_phys(void *, ...);
|
|||
#define efi_call_virt6(f, a1, a2, a3, a4, a5, a6) \
|
||||
efi_call_virt(f, a1, a2, a3, a4, a5, a6)
|
||||
|
||||
#define efi_ioremap(addr, size, type) ioremap_cache(addr, size)
|
||||
|
||||
#else /* !CONFIG_X86_32 */
|
||||
|
||||
extern u64 efi_call0(void *fp);
|
||||
|
@ -84,9 +82,6 @@ extern u64 efi_call6(void *fp, u64 arg1, u64 arg2, u64 arg3,
|
|||
efi_call6((void *)(efi.systab->runtime->f), (u64)(a1), (u64)(a2), \
|
||||
(u64)(a3), (u64)(a4), (u64)(a5), (u64)(a6))
|
||||
|
||||
extern void __iomem *efi_ioremap(unsigned long addr, unsigned long size,
|
||||
u32 type);
|
||||
|
||||
#endif /* CONFIG_X86_32 */
|
||||
|
||||
extern int add_efi_memmap;
|
||||
|
|
|
@ -3,11 +3,15 @@
|
|||
|
||||
#include <linux/notifier.h>
|
||||
|
||||
#define IPCMSG_VRTC 0xFA /* Set vRTC device */
|
||||
#define IPCMSG_WARM_RESET 0xF0
|
||||
#define IPCMSG_COLD_RESET 0xF1
|
||||
#define IPCMSG_SOFT_RESET 0xF2
|
||||
#define IPCMSG_COLD_BOOT 0xF3
|
||||
|
||||
/* Command id associated with message IPCMSG_VRTC */
|
||||
#define IPC_CMD_VRTC_SETTIME 1 /* Set time */
|
||||
#define IPC_CMD_VRTC_SETALARM 2 /* Set alarm */
|
||||
#define IPCMSG_VRTC 0xFA /* Set vRTC device */
|
||||
/* Command id associated with message IPCMSG_VRTC */
|
||||
#define IPC_CMD_VRTC_SETTIME 1 /* Set time */
|
||||
#define IPC_CMD_VRTC_SETALARM 2 /* Set alarm */
|
||||
|
||||
/* Read single register */
|
||||
int intel_scu_ipc_ioread8(u16 addr, u8 *data);
|
||||
|
|
|
@ -31,11 +31,20 @@ enum mrst_cpu_type {
|
|||
};
|
||||
|
||||
extern enum mrst_cpu_type __mrst_cpu_chip;
|
||||
|
||||
#ifdef CONFIG_X86_INTEL_MID
|
||||
|
||||
static inline enum mrst_cpu_type mrst_identify_cpu(void)
|
||||
{
|
||||
return __mrst_cpu_chip;
|
||||
}
|
||||
|
||||
#else /* !CONFIG_X86_INTEL_MID */
|
||||
|
||||
#define mrst_identify_cpu() (0)
|
||||
|
||||
#endif /* !CONFIG_X86_INTEL_MID */
|
||||
|
||||
enum mrst_timer_options {
|
||||
MRST_TIMER_DEFAULT,
|
||||
MRST_TIMER_APBT_ONLY,
|
||||
|
|
|
@ -169,7 +169,14 @@ static inline int wrmsr_safe(unsigned msr, unsigned low, unsigned high)
|
|||
return native_write_msr_safe(msr, low, high);
|
||||
}
|
||||
|
||||
/* rdmsr with exception handling */
|
||||
/*
|
||||
* rdmsr with exception handling.
|
||||
*
|
||||
* Please note that the exception handling works only after we've
|
||||
* switched to the "smart" #GP handler in trap_init() which knows about
|
||||
* exception tables - using this macro earlier than that causes machine
|
||||
* hangs on boxes which do not implement the @msr in the first argument.
|
||||
*/
|
||||
#define rdmsr_safe(msr, p1, p2) \
|
||||
({ \
|
||||
int __err; \
|
||||
|
|
|
@ -401,6 +401,7 @@ extern unsigned long arch_align_stack(unsigned long sp);
|
|||
extern void free_init_pages(char *what, unsigned long begin, unsigned long end);
|
||||
|
||||
void default_idle(void);
|
||||
bool set_pm_idle_to_default(void);
|
||||
|
||||
void stop_this_cpu(void *dummy);
|
||||
|
||||
|
|
|
@ -32,6 +32,22 @@ extern int no_timer_check;
|
|||
* (mathieu.desnoyers@polymtl.ca)
|
||||
*
|
||||
* -johnstul@us.ibm.com "math is hard, lets go shopping!"
|
||||
*
|
||||
* In:
|
||||
*
|
||||
* ns = cycles * cyc2ns_scale / SC
|
||||
*
|
||||
* Although we may still have enough bits to store the value of ns,
|
||||
* in some cases, we may not have enough bits to store cycles * cyc2ns_scale,
|
||||
* leading to an incorrect result.
|
||||
*
|
||||
* To avoid this, we can decompose 'cycles' into quotient and remainder
|
||||
* of division by SC. Then,
|
||||
*
|
||||
* ns = (quot * SC + rem) * cyc2ns_scale / SC
|
||||
* = quot * cyc2ns_scale + (rem * cyc2ns_scale) / SC
|
||||
*
|
||||
* - sqazi@google.com
|
||||
*/
|
||||
|
||||
DECLARE_PER_CPU(unsigned long, cyc2ns);
|
||||
|
@ -41,9 +57,14 @@ DECLARE_PER_CPU(unsigned long long, cyc2ns_offset);
|
|||
|
||||
static inline unsigned long long __cycles_2_ns(unsigned long long cyc)
|
||||
{
|
||||
unsigned long long quot;
|
||||
unsigned long long rem;
|
||||
int cpu = smp_processor_id();
|
||||
unsigned long long ns = per_cpu(cyc2ns_offset, cpu);
|
||||
ns += cyc * per_cpu(cyc2ns, cpu) >> CYC2NS_SCALE_FACTOR;
|
||||
quot = (cyc >> CYC2NS_SCALE_FACTOR);
|
||||
rem = cyc & ((1ULL << CYC2NS_SCALE_FACTOR) - 1);
|
||||
ns += quot * per_cpu(cyc2ns, cpu) +
|
||||
((rem * per_cpu(cyc2ns, cpu)) >> CYC2NS_SCALE_FACTOR);
|
||||
return ns;
|
||||
}
|
||||
|
||||
|
|
|
@ -57,6 +57,7 @@
|
|||
|
||||
#define UV1_HUB_PART_NUMBER 0x88a5
|
||||
#define UV2_HUB_PART_NUMBER 0x8eb8
|
||||
#define UV2_HUB_PART_NUMBER_X 0x1111
|
||||
|
||||
/* Compat: if this #define is present, UV headers support UV2 */
|
||||
#define UV2_HUB_IS_SUPPORTED 1
|
||||
|
|
|
@ -93,6 +93,8 @@ static int __init early_get_pnodeid(void)
|
|||
|
||||
if (node_id.s.part_number == UV2_HUB_PART_NUMBER)
|
||||
uv_min_hub_revision_id += UV2_HUB_REVISION_BASE - 1;
|
||||
if (node_id.s.part_number == UV2_HUB_PART_NUMBER_X)
|
||||
uv_min_hub_revision_id += UV2_HUB_REVISION_BASE - 1;
|
||||
|
||||
uv_hub_info->hub_revision = uv_min_hub_revision_id;
|
||||
pnode = (node_id.s.node_id >> 1) & ((1 << m_n_config.s.n_skt) - 1);
|
||||
|
|
|
@ -442,8 +442,6 @@ static void __cpuinit bsp_init_amd(struct cpuinfo_x86 *c)
|
|||
|
||||
static void __cpuinit early_init_amd(struct cpuinfo_x86 *c)
|
||||
{
|
||||
u32 dummy;
|
||||
|
||||
early_init_amd_mc(c);
|
||||
|
||||
/*
|
||||
|
@ -473,12 +471,12 @@ static void __cpuinit early_init_amd(struct cpuinfo_x86 *c)
|
|||
set_cpu_cap(c, X86_FEATURE_EXTD_APICID);
|
||||
}
|
||||
#endif
|
||||
|
||||
rdmsr_safe(MSR_AMD64_PATCH_LEVEL, &c->microcode, &dummy);
|
||||
}
|
||||
|
||||
static void __cpuinit init_amd(struct cpuinfo_x86 *c)
|
||||
{
|
||||
u32 dummy;
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
unsigned long long value;
|
||||
|
||||
|
@ -657,6 +655,8 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c)
|
|||
checking_wrmsrl(MSR_AMD64_MCx_MASK(4), mask);
|
||||
}
|
||||
}
|
||||
|
||||
rdmsr_safe(MSR_AMD64_PATCH_LEVEL, &c->microcode, &dummy);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_X86_32
|
||||
|
|
|
@ -547,6 +547,7 @@ static void generic_get_mtrr(unsigned int reg, unsigned long *base,
|
|||
|
||||
if (tmp != mask_lo) {
|
||||
printk(KERN_WARNING "mtrr: your BIOS has configured an incorrect mask, fixing it.\n");
|
||||
add_taint(TAINT_FIRMWARE_WORKAROUND);
|
||||
mask_lo = tmp;
|
||||
}
|
||||
}
|
||||
|
@ -693,6 +694,7 @@ static void prepare_set(void) __acquires(set_atomicity_lock)
|
|||
|
||||
/* Disable MTRRs, and set the default type to uncached */
|
||||
mtrr_wrmsr(MSR_MTRRdefType, deftype_lo & ~0xcff, deftype_hi);
|
||||
wbinvd();
|
||||
}
|
||||
|
||||
static void post_set(void) __releases(set_atomicity_lock)
|
||||
|
|
|
@ -312,12 +312,8 @@ int x86_setup_perfctr(struct perf_event *event)
|
|||
return -EOPNOTSUPP;
|
||||
}
|
||||
|
||||
/*
|
||||
* Do not allow config1 (extended registers) to propagate,
|
||||
* there's no sane user-space generalization yet:
|
||||
*/
|
||||
if (attr->type == PERF_TYPE_RAW)
|
||||
return 0;
|
||||
return x86_pmu_extra_regs(event->attr.config, event);
|
||||
|
||||
if (attr->type == PERF_TYPE_HW_CACHE)
|
||||
return set_ext_hw_attr(hwc, event);
|
||||
|
@ -588,7 +584,7 @@ done:
|
|||
x86_pmu.put_event_constraints(cpuc, cpuc->event_list[i]);
|
||||
}
|
||||
}
|
||||
return num ? -ENOSPC : 0;
|
||||
return num ? -EINVAL : 0;
|
||||
}
|
||||
|
||||
/*
|
||||
|
@ -607,7 +603,7 @@ static int collect_events(struct cpu_hw_events *cpuc, struct perf_event *leader,
|
|||
|
||||
if (is_x86_event(leader)) {
|
||||
if (n >= max_count)
|
||||
return -ENOSPC;
|
||||
return -EINVAL;
|
||||
cpuc->event_list[n] = leader;
|
||||
n++;
|
||||
}
|
||||
|
@ -620,7 +616,7 @@ static int collect_events(struct cpu_hw_events *cpuc, struct perf_event *leader,
|
|||
continue;
|
||||
|
||||
if (n >= max_count)
|
||||
return -ENOSPC;
|
||||
return -EINVAL;
|
||||
|
||||
cpuc->event_list[n] = event;
|
||||
n++;
|
||||
|
@ -1316,7 +1312,7 @@ static int validate_event(struct perf_event *event)
|
|||
c = x86_pmu.get_event_constraints(fake_cpuc, event);
|
||||
|
||||
if (!c || !c->weight)
|
||||
ret = -ENOSPC;
|
||||
ret = -EINVAL;
|
||||
|
||||
if (x86_pmu.put_event_constraints)
|
||||
x86_pmu.put_event_constraints(fake_cpuc, event);
|
||||
|
@ -1341,7 +1337,7 @@ static int validate_group(struct perf_event *event)
|
|||
{
|
||||
struct perf_event *leader = event->group_leader;
|
||||
struct cpu_hw_events *fake_cpuc;
|
||||
int ret = -ENOSPC, n;
|
||||
int ret = -EINVAL, n;
|
||||
|
||||
fake_cpuc = allocate_fake_cpuc();
|
||||
if (IS_ERR(fake_cpuc))
|
||||
|
|
|
@ -199,8 +199,7 @@ static int force_ibs_eilvt_setup(void)
|
|||
goto out;
|
||||
}
|
||||
|
||||
pr_err(FW_BUG "using offset %d for IBS interrupts\n", offset);
|
||||
pr_err(FW_BUG "workaround enabled for IBS LVT offset\n");
|
||||
pr_info("IBS: LVT offset %d assigned\n", offset);
|
||||
|
||||
return 0;
|
||||
out:
|
||||
|
@ -265,19 +264,23 @@ perf_ibs_cpu_notifier(struct notifier_block *self, unsigned long action, void *h
|
|||
static __init int amd_ibs_init(void)
|
||||
{
|
||||
u32 caps;
|
||||
int ret;
|
||||
int ret = -EINVAL;
|
||||
|
||||
caps = __get_ibs_caps();
|
||||
if (!caps)
|
||||
return -ENODEV; /* ibs not supported by the cpu */
|
||||
|
||||
if (!ibs_eilvt_valid()) {
|
||||
ret = force_ibs_eilvt_setup();
|
||||
if (ret) {
|
||||
pr_err("Failed to setup IBS, %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
/*
|
||||
* Force LVT offset assignment for family 10h: The offsets are
|
||||
* not assigned by the BIOS for this family, so the OS is
|
||||
* responsible for doing it. If the OS assignment fails, fall
|
||||
* back to BIOS settings and try to setup this.
|
||||
*/
|
||||
if (boot_cpu_data.x86 == 0x10)
|
||||
force_ibs_eilvt_setup();
|
||||
|
||||
if (!ibs_eilvt_valid())
|
||||
goto out;
|
||||
|
||||
get_online_cpus();
|
||||
ibs_caps = caps;
|
||||
|
@ -287,7 +290,11 @@ static __init int amd_ibs_init(void)
|
|||
smp_call_function(setup_APIC_ibs, NULL, 1);
|
||||
put_online_cpus();
|
||||
|
||||
return perf_event_ibs_init();
|
||||
ret = perf_event_ibs_init();
|
||||
out:
|
||||
if (ret)
|
||||
pr_err("Failed to setup IBS, %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* Since we need the pci subsystem to init ibs we can't do this earlier: */
|
||||
|
|
|
@ -1545,6 +1545,13 @@ static void intel_clovertown_quirks(void)
|
|||
x86_pmu.pebs_constraints = NULL;
|
||||
}
|
||||
|
||||
static void intel_sandybridge_quirks(void)
|
||||
{
|
||||
printk(KERN_WARNING "PEBS disabled due to CPU errata.\n");
|
||||
x86_pmu.pebs = 0;
|
||||
x86_pmu.pebs_constraints = NULL;
|
||||
}
|
||||
|
||||
__init int intel_pmu_init(void)
|
||||
{
|
||||
union cpuid10_edx edx;
|
||||
|
@ -1694,6 +1701,7 @@ __init int intel_pmu_init(void)
|
|||
break;
|
||||
|
||||
case 42: /* SandyBridge */
|
||||
x86_pmu.quirks = intel_sandybridge_quirks;
|
||||
case 45: /* SandyBridge, "Romely-EP" */
|
||||
memcpy(hw_cache_event_ids, snb_hw_cache_event_ids,
|
||||
sizeof(hw_cache_event_ids));
|
||||
|
|
|
@ -493,6 +493,7 @@ static int intel_pmu_pebs_fixup_ip(struct pt_regs *regs)
|
|||
unsigned long from = cpuc->lbr_entries[0].from;
|
||||
unsigned long old_to, to = cpuc->lbr_entries[0].to;
|
||||
unsigned long ip = regs->ip;
|
||||
int is_64bit = 0;
|
||||
|
||||
/*
|
||||
* We don't need to fixup if the PEBS assist is fault like
|
||||
|
@ -544,7 +545,10 @@ static int intel_pmu_pebs_fixup_ip(struct pt_regs *regs)
|
|||
} else
|
||||
kaddr = (void *)to;
|
||||
|
||||
kernel_insn_init(&insn, kaddr);
|
||||
#ifdef CONFIG_X86_64
|
||||
is_64bit = kernel_ip(to) || !test_thread_flag(TIF_IA32);
|
||||
#endif
|
||||
insn_init(&insn, kaddr, is_64bit);
|
||||
insn_get_length(&insn);
|
||||
to += insn.length;
|
||||
} while (to < ip);
|
||||
|
|
|
@ -1268,7 +1268,7 @@ reserve:
|
|||
}
|
||||
|
||||
done:
|
||||
return num ? -ENOSPC : 0;
|
||||
return num ? -EINVAL : 0;
|
||||
}
|
||||
|
||||
static __initconst const struct x86_pmu p4_pmu = {
|
||||
|
|
|
@ -135,6 +135,7 @@ static void __init e820_print_type(u32 type)
|
|||
printk(KERN_CONT "(usable)");
|
||||
break;
|
||||
case E820_RESERVED:
|
||||
case E820_RESERVED_EFI:
|
||||
printk(KERN_CONT "(reserved)");
|
||||
break;
|
||||
case E820_ACPI:
|
||||
|
@ -783,7 +784,7 @@ u64 __init early_reserve_e820(u64 startt, u64 sizet, u64 align)
|
|||
/*
|
||||
* Find the highest page frame number we have available
|
||||
*/
|
||||
static unsigned long __init e820_end_pfn(unsigned long limit_pfn, unsigned type)
|
||||
unsigned long __init e820_end_pfn(unsigned long limit_pfn, unsigned type)
|
||||
{
|
||||
int i;
|
||||
unsigned long last_pfn = 0;
|
||||
|
|
|
@ -1049,6 +1049,14 @@ int hpet_rtc_timer_init(void)
|
|||
}
|
||||
EXPORT_SYMBOL_GPL(hpet_rtc_timer_init);
|
||||
|
||||
static void hpet_disable_rtc_channel(void)
|
||||
{
|
||||
unsigned long cfg;
|
||||
cfg = hpet_readl(HPET_T1_CFG);
|
||||
cfg &= ~HPET_TN_ENABLE;
|
||||
hpet_writel(cfg, HPET_T1_CFG);
|
||||
}
|
||||
|
||||
/*
|
||||
* The functions below are called from rtc driver.
|
||||
* Return 0 if HPET is not being used.
|
||||
|
@ -1060,6 +1068,9 @@ int hpet_mask_rtc_irq_bit(unsigned long bit_mask)
|
|||
return 0;
|
||||
|
||||
hpet_rtc_flags &= ~bit_mask;
|
||||
if (unlikely(!hpet_rtc_flags))
|
||||
hpet_disable_rtc_channel();
|
||||
|
||||
return 1;
|
||||
}
|
||||
EXPORT_SYMBOL_GPL(hpet_mask_rtc_irq_bit);
|
||||
|
@ -1125,15 +1136,11 @@ EXPORT_SYMBOL_GPL(hpet_rtc_dropped_irq);
|
|||
|
||||
static void hpet_rtc_timer_reinit(void)
|
||||
{
|
||||
unsigned int cfg, delta;
|
||||
unsigned int delta;
|
||||
int lost_ints = -1;
|
||||
|
||||
if (unlikely(!hpet_rtc_flags)) {
|
||||
cfg = hpet_readl(HPET_T1_CFG);
|
||||
cfg &= ~HPET_TN_ENABLE;
|
||||
hpet_writel(cfg, HPET_T1_CFG);
|
||||
return;
|
||||
}
|
||||
if (unlikely(!hpet_rtc_flags))
|
||||
hpet_disable_rtc_channel();
|
||||
|
||||
if (!(hpet_rtc_flags & RTC_PIE) || hpet_pie_limit)
|
||||
delta = hpet_default_delta;
|
||||
|
|
|
@ -38,6 +38,9 @@ static inline void stack_overflow_check(struct pt_regs *regs)
|
|||
#ifdef CONFIG_DEBUG_STACKOVERFLOW
|
||||
u64 curbase = (u64)task_stack_page(current);
|
||||
|
||||
if (user_mode_vm(regs))
|
||||
return;
|
||||
|
||||
WARN_ONCE(regs->sp >= curbase &&
|
||||
regs->sp <= curbase + THREAD_SIZE &&
|
||||
regs->sp < curbase + sizeof(struct thread_info) +
|
||||
|
|
|
@ -256,7 +256,7 @@ static int __init microcode_dev_init(void)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static void microcode_dev_exit(void)
|
||||
static void __exit microcode_dev_exit(void)
|
||||
{
|
||||
misc_deregister(µcode_dev);
|
||||
}
|
||||
|
@ -519,10 +519,8 @@ static int __init microcode_init(void)
|
|||
|
||||
microcode_pdev = platform_device_register_simple("microcode", -1,
|
||||
NULL, 0);
|
||||
if (IS_ERR(microcode_pdev)) {
|
||||
microcode_dev_exit();
|
||||
if (IS_ERR(microcode_pdev))
|
||||
return PTR_ERR(microcode_pdev);
|
||||
}
|
||||
|
||||
get_online_cpus();
|
||||
mutex_lock(µcode_mutex);
|
||||
|
@ -532,14 +530,12 @@ static int __init microcode_init(void)
|
|||
mutex_unlock(µcode_mutex);
|
||||
put_online_cpus();
|
||||
|
||||
if (error) {
|
||||
platform_device_unregister(microcode_pdev);
|
||||
return error;
|
||||
}
|
||||
if (error)
|
||||
goto out_pdev;
|
||||
|
||||
error = microcode_dev_init();
|
||||
if (error)
|
||||
return error;
|
||||
goto out_sysdev_driver;
|
||||
|
||||
register_syscore_ops(&mc_syscore_ops);
|
||||
register_hotcpu_notifier(&mc_cpu_notifier);
|
||||
|
@ -548,6 +544,20 @@ static int __init microcode_init(void)
|
|||
" <tigran@aivazian.fsnet.co.uk>, Peter Oruba\n");
|
||||
|
||||
return 0;
|
||||
|
||||
out_sysdev_driver:
|
||||
get_online_cpus();
|
||||
mutex_lock(µcode_mutex);
|
||||
|
||||
sysdev_driver_unregister(&cpu_sysdev_class, &mc_sysdev_driver);
|
||||
|
||||
mutex_unlock(µcode_mutex);
|
||||
put_online_cpus();
|
||||
|
||||
out_pdev:
|
||||
platform_device_unregister(microcode_pdev);
|
||||
return error;
|
||||
|
||||
}
|
||||
module_init(microcode_init);
|
||||
|
||||
|
|
|
@ -95,8 +95,8 @@ static void __init MP_bus_info(struct mpc_bus *m)
|
|||
}
|
||||
#endif
|
||||
|
||||
set_bit(m->busid, mp_bus_not_pci);
|
||||
if (strncmp(str, BUSTYPE_ISA, sizeof(BUSTYPE_ISA) - 1) == 0) {
|
||||
set_bit(m->busid, mp_bus_not_pci);
|
||||
#if defined(CONFIG_EISA) || defined(CONFIG_MCA)
|
||||
mp_bus_id_to_type[m->busid] = MP_BUS_ISA;
|
||||
#endif
|
||||
|
|
|
@ -403,6 +403,14 @@ void default_idle(void)
|
|||
EXPORT_SYMBOL(default_idle);
|
||||
#endif
|
||||
|
||||
bool set_pm_idle_to_default(void)
|
||||
{
|
||||
bool ret = !!pm_idle;
|
||||
|
||||
pm_idle = default_idle;
|
||||
|
||||
return ret;
|
||||
}
|
||||
void stop_this_cpu(void *dummy)
|
||||
{
|
||||
local_irq_disable();
|
||||
|
|
|
@ -553,4 +553,17 @@ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_MISC,
|
|||
quirk_amd_nb_node);
|
||||
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_10H_NB_LINK,
|
||||
quirk_amd_nb_node);
|
||||
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_F0,
|
||||
quirk_amd_nb_node);
|
||||
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_F1,
|
||||
quirk_amd_nb_node);
|
||||
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_F2,
|
||||
quirk_amd_nb_node);
|
||||
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_F3,
|
||||
quirk_amd_nb_node);
|
||||
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_F4,
|
||||
quirk_amd_nb_node);
|
||||
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_15H_NB_F5,
|
||||
quirk_amd_nb_node);
|
||||
|
||||
#endif
|
||||
|
|
|
@ -124,7 +124,7 @@ __setup("reboot=", reboot_setup);
|
|||
*/
|
||||
|
||||
/*
|
||||
* Some machines require the "reboot=b" commandline option,
|
||||
* Some machines require the "reboot=b" or "reboot=k" commandline options,
|
||||
* this quirk makes that automatic.
|
||||
*/
|
||||
static int __init set_bios_reboot(const struct dmi_system_id *d)
|
||||
|
@ -136,6 +136,15 @@ static int __init set_bios_reboot(const struct dmi_system_id *d)
|
|||
return 0;
|
||||
}
|
||||
|
||||
static int __init set_kbd_reboot(const struct dmi_system_id *d)
|
||||
{
|
||||
if (reboot_type != BOOT_KBD) {
|
||||
reboot_type = BOOT_KBD;
|
||||
printk(KERN_INFO "%s series board detected. Selecting KBD-method for reboot.\n", d->ident);
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct dmi_system_id __initdata reboot_dmi_table[] = {
|
||||
{ /* Handle problems with rebooting on Dell E520's */
|
||||
.callback = set_bios_reboot,
|
||||
|
@ -295,7 +304,7 @@ static struct dmi_system_id __initdata reboot_dmi_table[] = {
|
|||
},
|
||||
},
|
||||
{ /* Handle reboot issue on Acer Aspire one */
|
||||
.callback = set_bios_reboot,
|
||||
.callback = set_kbd_reboot,
|
||||
.ident = "Acer Aspire One A110",
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_SYS_VENDOR, "Acer"),
|
||||
|
@ -443,6 +452,14 @@ static struct dmi_system_id __initdata pci_reboot_dmi_table[] = {
|
|||
DMI_MATCH(DMI_PRODUCT_NAME, "Latitude E6420"),
|
||||
},
|
||||
},
|
||||
{ /* Handle problems with rebooting on the OptiPlex 990. */
|
||||
.callback = set_pci_reboot,
|
||||
.ident = "Dell OptiPlex 990",
|
||||
.matches = {
|
||||
DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
|
||||
DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex 990"),
|
||||
},
|
||||
},
|
||||
{ }
|
||||
};
|
||||
|
||||
|
|
|
@ -12,6 +12,7 @@
|
|||
#include <asm/vsyscall.h>
|
||||
#include <asm/x86_init.h>
|
||||
#include <asm/time.h>
|
||||
#include <asm/mrst.h>
|
||||
|
||||
#ifdef CONFIG_X86_32
|
||||
/*
|
||||
|
@ -242,6 +243,10 @@ static __init int add_rtc_cmos(void)
|
|||
if (of_have_populated_dt())
|
||||
return 0;
|
||||
|
||||
/* Intel MID platforms don't have ioport rtc */
|
||||
if (mrst_identify_cpu())
|
||||
return -ENODEV;
|
||||
|
||||
platform_device_register(&rtc_device);
|
||||
dev_info(&rtc_device.dev,
|
||||
"registered platform RTC device (no PNP device found)\n");
|
||||
|
|
|
@ -691,6 +691,8 @@ early_param("reservelow", parse_reservelow);
|
|||
|
||||
void __init setup_arch(char **cmdline_p)
|
||||
{
|
||||
unsigned long end_pfn;
|
||||
|
||||
#ifdef CONFIG_X86_32
|
||||
memcpy(&boot_cpu_data, &new_cpu_data, sizeof(new_cpu_data));
|
||||
visws_early_detect();
|
||||
|
@ -932,7 +934,24 @@ void __init setup_arch(char **cmdline_p)
|
|||
init_gbpages();
|
||||
|
||||
/* max_pfn_mapped is updated here */
|
||||
max_low_pfn_mapped = init_memory_mapping(0, max_low_pfn<<PAGE_SHIFT);
|
||||
end_pfn = max_low_pfn;
|
||||
|
||||
#ifdef CONFIG_X86_64
|
||||
/*
|
||||
* There may be regions after the last E820_RAM region that we
|
||||
* want to include in the kernel direct mapping, such as
|
||||
* EFI_RUNTIME_SERVICES_DATA.
|
||||
*/
|
||||
if (efi_enabled) {
|
||||
unsigned long efi_end;
|
||||
|
||||
efi_end = e820_end_pfn(MAXMEM>>PAGE_SHIFT, E820_RESERVED_EFI);
|
||||
if (efi_end > max_low_pfn)
|
||||
end_pfn = efi_end;
|
||||
}
|
||||
#endif
|
||||
|
||||
max_low_pfn_mapped = init_memory_mapping(0, end_pfn << PAGE_SHIFT);
|
||||
max_pfn_mapped = max_low_pfn_mapped;
|
||||
|
||||
#ifdef CONFIG_X86_64
|
||||
|
|
|
@ -201,6 +201,8 @@ static noinline int gup_huge_pud(pud_t pud, unsigned long addr,
|
|||
do {
|
||||
VM_BUG_ON(compound_head(page) != head);
|
||||
pages[*nr] = page;
|
||||
if (PageTail(page))
|
||||
get_huge_page_tail(page);
|
||||
(*nr)++;
|
||||
page++;
|
||||
refs++;
|
||||
|
|
|
@ -45,6 +45,7 @@ void *kmap_atomic_prot(struct page *page, pgprot_t prot)
|
|||
vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
|
||||
BUG_ON(!pte_none(*(kmap_pte-idx)));
|
||||
set_pte(kmap_pte-idx, mk_pte(page, prot));
|
||||
arch_flush_lazy_mmu_mode();
|
||||
|
||||
return (void *)vaddr;
|
||||
}
|
||||
|
@ -88,6 +89,7 @@ void __kunmap_atomic(void *kvaddr)
|
|||
*/
|
||||
kpte_clear_flush(kmap_pte-idx, vaddr);
|
||||
kmap_atomic_idx_pop();
|
||||
arch_flush_lazy_mmu_mode();
|
||||
}
|
||||
#ifdef CONFIG_DEBUG_HIGHMEM
|
||||
else {
|
||||
|
|
|
@ -21,6 +21,7 @@ extern int op_nmi_timer_init(struct oprofile_operations *ops);
|
|||
extern void op_nmi_exit(void);
|
||||
extern void x86_backtrace(struct pt_regs * const regs, unsigned int depth);
|
||||
|
||||
static int nmi_timer;
|
||||
|
||||
int __init oprofile_arch_init(struct oprofile_operations *ops)
|
||||
{
|
||||
|
@ -31,8 +32,9 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
|
|||
#ifdef CONFIG_X86_LOCAL_APIC
|
||||
ret = op_nmi_init(ops);
|
||||
#endif
|
||||
nmi_timer = (ret != 0);
|
||||
#ifdef CONFIG_X86_IO_APIC
|
||||
if (ret < 0)
|
||||
if (nmi_timer)
|
||||
ret = op_nmi_timer_init(ops);
|
||||
#endif
|
||||
ops->backtrace = x86_backtrace;
|
||||
|
@ -44,6 +46,7 @@ int __init oprofile_arch_init(struct oprofile_operations *ops)
|
|||
void oprofile_arch_exit(void)
|
||||
{
|
||||
#ifdef CONFIG_X86_LOCAL_APIC
|
||||
op_nmi_exit();
|
||||
if (!nmi_timer)
|
||||
op_nmi_exit();
|
||||
#endif
|
||||
}
|
||||
|
|
|
@ -323,10 +323,13 @@ static void __init do_add_efi_memmap(void)
|
|||
case EFI_UNUSABLE_MEMORY:
|
||||
e820_type = E820_UNUSABLE;
|
||||
break;
|
||||
case EFI_RUNTIME_SERVICES_DATA:
|
||||
e820_type = E820_RESERVED_EFI;
|
||||
break;
|
||||
default:
|
||||
/*
|
||||
* EFI_RESERVED_TYPE EFI_RUNTIME_SERVICES_CODE
|
||||
* EFI_RUNTIME_SERVICES_DATA EFI_MEMORY_MAPPED_IO
|
||||
* EFI_MEMORY_MAPPED_IO
|
||||
* EFI_MEMORY_MAPPED_IO_PORT_SPACE EFI_PAL_CODE
|
||||
*/
|
||||
e820_type = E820_RESERVED;
|
||||
|
@ -671,10 +674,21 @@ void __init efi_enter_virtual_mode(void)
|
|||
end_pfn = PFN_UP(end);
|
||||
if (end_pfn <= max_low_pfn_mapped
|
||||
|| (end_pfn > (1UL << (32 - PAGE_SHIFT))
|
||||
&& end_pfn <= max_pfn_mapped))
|
||||
&& end_pfn <= max_pfn_mapped)) {
|
||||
va = __va(md->phys_addr);
|
||||
else
|
||||
va = efi_ioremap(md->phys_addr, size, md->type);
|
||||
|
||||
if (!(md->attribute & EFI_MEMORY_WB)) {
|
||||
addr = (u64) (unsigned long)va;
|
||||
npages = md->num_pages;
|
||||
memrange_efi_to_native(&addr, &npages);
|
||||
set_memory_uc(addr, npages);
|
||||
}
|
||||
} else {
|
||||
if (!(md->attribute & EFI_MEMORY_WB))
|
||||
va = ioremap_nocache(md->phys_addr, size);
|
||||
else
|
||||
va = ioremap_cache(md->phys_addr, size);
|
||||
}
|
||||
|
||||
md->virt_addr = (u64) (unsigned long) va;
|
||||
|
||||
|
@ -684,13 +698,6 @@ void __init efi_enter_virtual_mode(void)
|
|||
continue;
|
||||
}
|
||||
|
||||
if (!(md->attribute & EFI_MEMORY_WB)) {
|
||||
addr = md->virt_addr;
|
||||
npages = md->num_pages;
|
||||
memrange_efi_to_native(&addr, &npages);
|
||||
set_memory_uc(addr, npages);
|
||||
}
|
||||
|
||||
systab = (u64) (unsigned long) efi_phys.systab;
|
||||
if (md->phys_addr <= systab && systab < end) {
|
||||
systab += md->virt_addr - md->phys_addr;
|
||||
|
|
|
@ -80,20 +80,3 @@ void __init efi_call_phys_epilog(void)
|
|||
local_irq_restore(efi_flags);
|
||||
early_code_mapping_set_exec(0);
|
||||
}
|
||||
|
||||
void __iomem *__init efi_ioremap(unsigned long phys_addr, unsigned long size,
|
||||
u32 type)
|
||||
{
|
||||
unsigned long last_map_pfn;
|
||||
|
||||
if (type == EFI_MEMORY_MAPPED_IO)
|
||||
return ioremap(phys_addr, size);
|
||||
|
||||
last_map_pfn = init_memory_mapping(phys_addr, phys_addr + size);
|
||||
if ((last_map_pfn << PAGE_SHIFT) < phys_addr + size) {
|
||||
unsigned long top = last_map_pfn << PAGE_SHIFT;
|
||||
efi_ioremap(top, size - (top - phys_addr), type);
|
||||
}
|
||||
|
||||
return (void __iomem *)__va(phys_addr);
|
||||
}
|
||||
|
|
|
@ -76,6 +76,20 @@ struct sfi_rtc_table_entry sfi_mrtc_array[SFI_MRTC_MAX];
|
|||
EXPORT_SYMBOL_GPL(sfi_mrtc_array);
|
||||
int sfi_mrtc_num;
|
||||
|
||||
static void mrst_power_off(void)
|
||||
{
|
||||
if (__mrst_cpu_chip == MRST_CPU_CHIP_LINCROFT)
|
||||
intel_scu_ipc_simple_command(IPCMSG_COLD_RESET, 1);
|
||||
}
|
||||
|
||||
static void mrst_reboot(void)
|
||||
{
|
||||
if (__mrst_cpu_chip == MRST_CPU_CHIP_LINCROFT)
|
||||
intel_scu_ipc_simple_command(IPCMSG_COLD_RESET, 0);
|
||||
else
|
||||
intel_scu_ipc_simple_command(IPCMSG_COLD_BOOT, 0);
|
||||
}
|
||||
|
||||
/* parse all the mtimer info to a static mtimer array */
|
||||
static int __init sfi_parse_mtmr(struct sfi_table_header *table)
|
||||
{
|
||||
|
@ -265,17 +279,6 @@ static int mrst_i8042_detect(void)
|
|||
return 0;
|
||||
}
|
||||
|
||||
/* Reboot and power off are handled by the SCU on a MID device */
|
||||
static void mrst_power_off(void)
|
||||
{
|
||||
intel_scu_ipc_simple_command(0xf1, 1);
|
||||
}
|
||||
|
||||
static void mrst_reboot(void)
|
||||
{
|
||||
intel_scu_ipc_simple_command(0xf1, 0);
|
||||
}
|
||||
|
||||
/*
|
||||
* Moorestown does not have external NMI source nor port 0x61 to report
|
||||
* NMI status. The possible NMI sources are from pmu as a result of NMI
|
||||
|
@ -484,6 +487,46 @@ static void __init *max7315_platform_data(void *info)
|
|||
return max7315;
|
||||
}
|
||||
|
||||
static void *tca6416_platform_data(void *info)
|
||||
{
|
||||
static struct pca953x_platform_data tca6416;
|
||||
struct i2c_board_info *i2c_info = info;
|
||||
int gpio_base, intr;
|
||||
char base_pin_name[SFI_NAME_LEN + 1];
|
||||
char intr_pin_name[SFI_NAME_LEN + 1];
|
||||
|
||||
strcpy(i2c_info->type, "tca6416");
|
||||
strcpy(base_pin_name, "tca6416_base");
|
||||
strcpy(intr_pin_name, "tca6416_int");
|
||||
|
||||
gpio_base = get_gpio_by_name(base_pin_name);
|
||||
intr = get_gpio_by_name(intr_pin_name);
|
||||
|
||||
if (gpio_base == -1)
|
||||
return NULL;
|
||||
tca6416.gpio_base = gpio_base;
|
||||
if (intr != -1) {
|
||||
i2c_info->irq = intr + MRST_IRQ_OFFSET;
|
||||
tca6416.irq_base = gpio_base + MRST_IRQ_OFFSET;
|
||||
} else {
|
||||
i2c_info->irq = -1;
|
||||
tca6416.irq_base = -1;
|
||||
}
|
||||
return &tca6416;
|
||||
}
|
||||
|
||||
static void *mpu3050_platform_data(void *info)
|
||||
{
|
||||
struct i2c_board_info *i2c_info = info;
|
||||
int intr = get_gpio_by_name("mpu3050_int");
|
||||
|
||||
if (intr == -1)
|
||||
return NULL;
|
||||
|
||||
i2c_info->irq = intr + MRST_IRQ_OFFSET;
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static void __init *emc1403_platform_data(void *info)
|
||||
{
|
||||
static short intr2nd_pdata;
|
||||
|
@ -646,12 +689,15 @@ static void *msic_ocd_platform_data(void *info)
|
|||
static const struct devs_id __initconst device_ids[] = {
|
||||
{"bma023", SFI_DEV_TYPE_I2C, 1, &no_platform_data},
|
||||
{"pmic_gpio", SFI_DEV_TYPE_SPI, 1, &pmic_gpio_platform_data},
|
||||
{"pmic_gpio", SFI_DEV_TYPE_IPC, 1, &pmic_gpio_platform_data},
|
||||
{"spi_max3111", SFI_DEV_TYPE_SPI, 0, &max3111_platform_data},
|
||||
{"i2c_max7315", SFI_DEV_TYPE_I2C, 1, &max7315_platform_data},
|
||||
{"i2c_max7315_2", SFI_DEV_TYPE_I2C, 1, &max7315_platform_data},
|
||||
{"tca6416", SFI_DEV_TYPE_I2C, 1, &tca6416_platform_data},
|
||||
{"emc1403", SFI_DEV_TYPE_I2C, 1, &emc1403_platform_data},
|
||||
{"i2c_accel", SFI_DEV_TYPE_I2C, 0, &lis331dl_platform_data},
|
||||
{"pmic_audio", SFI_DEV_TYPE_IPC, 1, &no_platform_data},
|
||||
{"mpu3050", SFI_DEV_TYPE_I2C, 1, &mpu3050_platform_data},
|
||||
|
||||
/* MSIC subdevices */
|
||||
{"msic_battery", SFI_DEV_TYPE_IPC, 1, &msic_battery_platform_data},
|
||||
|
|
|
@ -410,6 +410,6 @@ void __init xen_arch_setup(void)
|
|||
#endif
|
||||
disable_cpuidle();
|
||||
boot_option_idle_override = IDLE_HALT;
|
||||
|
||||
WARN_ON(set_pm_idle_to_default());
|
||||
fiddle_vdso();
|
||||
}
|
||||
|
|
|
@ -1743,8 +1743,10 @@ void device_shutdown(void)
|
|||
*/
|
||||
list_del_init(&dev->kobj.entry);
|
||||
spin_unlock(&devices_kset->list_lock);
|
||||
/* Disable all device's runtime power management */
|
||||
pm_runtime_disable(dev);
|
||||
|
||||
/* Don't allow any more runtime suspends */
|
||||
pm_runtime_get_noresume(dev);
|
||||
pm_runtime_barrier(dev);
|
||||
|
||||
if (dev->bus && dev->bus->shutdown) {
|
||||
dev_dbg(dev, "shutdown\n");
|
||||
|
|
|
@ -14,13 +14,34 @@
|
|||
#include <linux/module.h>
|
||||
#include <linux/sigma.h>
|
||||
|
||||
/* Return: 0==OK, <0==error, =1 ==no more actions */
|
||||
static int
|
||||
process_sigma_action(struct i2c_client *client, struct sigma_firmware *ssfw)
|
||||
static size_t sigma_action_size(struct sigma_action *sa)
|
||||
{
|
||||
size_t payload = 0;
|
||||
|
||||
switch (sa->instr) {
|
||||
case SIGMA_ACTION_WRITEXBYTES:
|
||||
case SIGMA_ACTION_WRITESINGLE:
|
||||
case SIGMA_ACTION_WRITESAFELOAD:
|
||||
payload = sigma_action_len(sa);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
payload = ALIGN(payload, 2);
|
||||
|
||||
return payload + sizeof(struct sigma_action);
|
||||
}
|
||||
|
||||
/*
|
||||
* Returns a negative error value in case of an error, 0 if processing of
|
||||
* the firmware should be stopped after this action, 1 otherwise.
|
||||
*/
|
||||
static int
|
||||
process_sigma_action(struct i2c_client *client, struct sigma_action *sa)
|
||||
{
|
||||
struct sigma_action *sa = (void *)(ssfw->fw->data + ssfw->pos);
|
||||
size_t len = sigma_action_len(sa);
|
||||
int ret = 0;
|
||||
int ret;
|
||||
|
||||
pr_debug("%s: instr:%i addr:%#x len:%zu\n", __func__,
|
||||
sa->instr, sa->addr, len);
|
||||
|
@ -29,44 +50,50 @@ process_sigma_action(struct i2c_client *client, struct sigma_firmware *ssfw)
|
|||
case SIGMA_ACTION_WRITEXBYTES:
|
||||
case SIGMA_ACTION_WRITESINGLE:
|
||||
case SIGMA_ACTION_WRITESAFELOAD:
|
||||
if (ssfw->fw->size < ssfw->pos + len)
|
||||
return -EINVAL;
|
||||
ret = i2c_master_send(client, (void *)&sa->addr, len);
|
||||
if (ret < 0)
|
||||
return -EINVAL;
|
||||
break;
|
||||
|
||||
case SIGMA_ACTION_DELAY:
|
||||
ret = 0;
|
||||
udelay(len);
|
||||
len = 0;
|
||||
break;
|
||||
|
||||
case SIGMA_ACTION_END:
|
||||
return 1;
|
||||
|
||||
return 0;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/* when arrive here ret=0 or sent data */
|
||||
ssfw->pos += sigma_action_size(sa, len);
|
||||
return ssfw->pos == ssfw->fw->size;
|
||||
return 1;
|
||||
}
|
||||
|
||||
static int
|
||||
process_sigma_actions(struct i2c_client *client, struct sigma_firmware *ssfw)
|
||||
{
|
||||
pr_debug("%s: processing %p\n", __func__, ssfw);
|
||||
struct sigma_action *sa;
|
||||
size_t size;
|
||||
int ret;
|
||||
|
||||
while (ssfw->pos + sizeof(*sa) <= ssfw->fw->size) {
|
||||
sa = (struct sigma_action *)(ssfw->fw->data + ssfw->pos);
|
||||
|
||||
size = sigma_action_size(sa);
|
||||
ssfw->pos += size;
|
||||
if (ssfw->pos > ssfw->fw->size || size == 0)
|
||||
break;
|
||||
|
||||
ret = process_sigma_action(client, sa);
|
||||
|
||||
while (1) {
|
||||
int ret = process_sigma_action(client, ssfw);
|
||||
pr_debug("%s: action returned %i\n", __func__, ret);
|
||||
if (ret == 1)
|
||||
return 0;
|
||||
else if (ret)
|
||||
|
||||
if (ret <= 0)
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (ssfw->pos != ssfw->fw->size)
|
||||
return -EINVAL;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int process_sigma_firmware(struct i2c_client *client, const char *name)
|
||||
|
@ -89,16 +116,24 @@ int process_sigma_firmware(struct i2c_client *client, const char *name)
|
|||
|
||||
/* then verify the header */
|
||||
ret = -EINVAL;
|
||||
if (fw->size < sizeof(*ssfw_head))
|
||||
|
||||
/*
|
||||
* Reject too small or unreasonable large files. The upper limit has been
|
||||
* chosen a bit arbitrarily, but it should be enough for all practical
|
||||
* purposes and having the limit makes it easier to avoid integer
|
||||
* overflows later in the loading process.
|
||||
*/
|
||||
if (fw->size < sizeof(*ssfw_head) || fw->size >= 0x4000000)
|
||||
goto done;
|
||||
|
||||
ssfw_head = (void *)fw->data;
|
||||
if (memcmp(ssfw_head->magic, SIGMA_MAGIC, ARRAY_SIZE(ssfw_head->magic)))
|
||||
goto done;
|
||||
|
||||
crc = crc32(0, fw->data, fw->size);
|
||||
crc = crc32(0, fw->data + sizeof(*ssfw_head),
|
||||
fw->size - sizeof(*ssfw_head));
|
||||
pr_debug("%s: crc=%x\n", __func__, crc);
|
||||
if (crc != ssfw_head->crc)
|
||||
if (crc != le32_to_cpu(ssfw_head->crc))
|
||||
goto done;
|
||||
|
||||
ssfw.pos = sizeof(*ssfw_head);
|
||||
|
|
|
@ -18,7 +18,7 @@ obj-$(CONFIG_ARCH_DAVINCI) += gpio-davinci.o
|
|||
obj-$(CONFIG_GPIO_EP93XX) += gpio-ep93xx.o
|
||||
obj-$(CONFIG_GPIO_IT8761E) += gpio-it8761e.o
|
||||
obj-$(CONFIG_GPIO_JANZ_TTL) += gpio-janz-ttl.o
|
||||
obj-$(CONFIG_MACH_KS8695) += gpio-ks8695.o
|
||||
obj-$(CONFIG_ARCH_KS8695) += gpio-ks8695.o
|
||||
obj-$(CONFIG_GPIO_LANGWELL) += gpio-langwell.o
|
||||
obj-$(CONFIG_ARCH_LPC32XX) += gpio-lpc32xx.o
|
||||
obj-$(CONFIG_GPIO_MAX730X) += gpio-max730x.o
|
||||
|
|
|
@ -456,6 +456,30 @@ done:
|
|||
EXPORT_SYMBOL(drm_crtc_helper_set_mode);
|
||||
|
||||
|
||||
static int
|
||||
drm_crtc_helper_disable(struct drm_crtc *crtc)
|
||||
{
|
||||
struct drm_device *dev = crtc->dev;
|
||||
struct drm_connector *connector;
|
||||
struct drm_encoder *encoder;
|
||||
|
||||
/* Decouple all encoders and their attached connectors from this crtc */
|
||||
list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
|
||||
if (encoder->crtc != crtc)
|
||||
continue;
|
||||
|
||||
list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
|
||||
if (connector->encoder != encoder)
|
||||
continue;
|
||||
|
||||
connector->encoder = NULL;
|
||||
}
|
||||
}
|
||||
|
||||
drm_helper_disable_unused_functions(dev);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* drm_crtc_helper_set_config - set a new config from userspace
|
||||
* @crtc: CRTC to setup
|
||||
|
@ -510,8 +534,7 @@ int drm_crtc_helper_set_config(struct drm_mode_set *set)
|
|||
(int)set->num_connectors, set->x, set->y);
|
||||
} else {
|
||||
DRM_DEBUG_KMS("[CRTC:%d] [NOFB]\n", set->crtc->base.id);
|
||||
set->mode = NULL;
|
||||
set->num_connectors = 0;
|
||||
return drm_crtc_helper_disable(set->crtc);
|
||||
}
|
||||
|
||||
dev = set->crtc->dev;
|
||||
|
|
|
@ -2026,8 +2026,13 @@ i915_wait_request(struct intel_ring_buffer *ring,
|
|||
* to handle this, the waiter on a request often wants an associated
|
||||
* buffer to have made it to the inactive list, and we would need
|
||||
* a separate wait queue to handle that.
|
||||
*
|
||||
* To avoid a recursion with the ilk VT-d workaround (that calls
|
||||
* gpu_idle when unbinding objects with interruptible==false) don't
|
||||
* retire requests in that case (because it might call unbind if the
|
||||
* active list holds the last reference to the object).
|
||||
*/
|
||||
if (ret == 0)
|
||||
if (ret == 0 && dev_priv->mm.interruptible)
|
||||
i915_gem_retire_requests_ring(ring);
|
||||
|
||||
return ret;
|
||||
|
|
|
@ -369,3 +369,48 @@ nouveau_finish_page_flip(struct nouveau_channel *chan,
|
|||
spin_unlock_irqrestore(&dev->event_lock, flags);
|
||||
return 0;
|
||||
}
|
||||
|
||||
int
|
||||
nouveau_display_dumb_create(struct drm_file *file_priv, struct drm_device *dev,
|
||||
struct drm_mode_create_dumb *args)
|
||||
{
|
||||
struct nouveau_bo *bo;
|
||||
int ret;
|
||||
|
||||
args->pitch = roundup(args->width * (args->bpp / 8), 256);
|
||||
args->size = args->pitch * args->height;
|
||||
args->size = roundup(args->size, PAGE_SIZE);
|
||||
|
||||
ret = nouveau_gem_new(dev, args->size, 0, TTM_PL_FLAG_VRAM, 0, 0, &bo);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = drm_gem_handle_create(file_priv, bo->gem, &args->handle);
|
||||
drm_gem_object_unreference_unlocked(bo->gem);
|
||||
return ret;
|
||||
}
|
||||
|
||||
int
|
||||
nouveau_display_dumb_destroy(struct drm_file *file_priv, struct drm_device *dev,
|
||||
uint32_t handle)
|
||||
{
|
||||
return drm_gem_handle_delete(file_priv, handle);
|
||||
}
|
||||
|
||||
int
|
||||
nouveau_display_dumb_map_offset(struct drm_file *file_priv,
|
||||
struct drm_device *dev,
|
||||
uint32_t handle, uint64_t *poffset)
|
||||
{
|
||||
struct drm_gem_object *gem;
|
||||
|
||||
gem = drm_gem_object_lookup(dev, file_priv, handle);
|
||||
if (gem) {
|
||||
struct nouveau_bo *bo = gem->driver_private;
|
||||
*poffset = bo->bo.addr_space_offset;
|
||||
drm_gem_object_unreference_unlocked(gem);
|
||||
return 0;
|
||||
}
|
||||
|
||||
return -ENOENT;
|
||||
}
|
||||
|
|
|
@ -433,6 +433,10 @@ static struct drm_driver driver = {
|
|||
.gem_open_object = nouveau_gem_object_open,
|
||||
.gem_close_object = nouveau_gem_object_close,
|
||||
|
||||
.dumb_create = nouveau_display_dumb_create,
|
||||
.dumb_map_offset = nouveau_display_dumb_map_offset,
|
||||
.dumb_destroy = nouveau_display_dumb_destroy,
|
||||
|
||||
.name = DRIVER_NAME,
|
||||
.desc = DRIVER_DESC,
|
||||
#ifdef GIT_REVISION
|
||||
|
|
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